Commit Graph

15 Commits

Author SHA1 Message Date
H.J. Lu
cd888f01a4 x86: Add ENDBR32/ENDBR64 at function entries for Intel CET
To support Intel CET, all indirect branch targets must start with
ENDBR32/ENDBR64.  Here is a patch to define endbranch and add it to
function entries in x86 assembly codes which are indirect branch
targets as discovered by running testsuite on Intel CET machine and
visual inspection.

Verified with

$ CC="gcc -Wl,-z,cet-report=error -fcf-protection" CXX="g++ -Wl,-z,cet-report=error -fcf-protection" .../configure x86_64-linux
$ make -j8
$ make -j8 check

with both nasm and yasm on both CET and non-CET machines.

Change-Id: I9822578e7294fb5043a64ab7de5c41de81a7d337
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2020-05-26 09:16:49 -07:00
Greg Tucker
ede04f0a1f build: Fix for windows to allow nasm use
Previously windows build could only use yasm because some procedural items such
as proc_start were not supported by nasm.  This adds a few macros and fixes so
nasm can be used to build on windows.

Change-Id: Ia05dc3ff482f33b0f915bb1be3c7df5e4a753b3a
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2020-03-17 18:05:46 -07:00
Greg Tucker
e1470f70f6 igzip: Fixup a few labels and return warnings
Change-Id: Iaf2634a939fc741006895407b4b219a2f2cae98e
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2018-11-29 16:37:56 -07:00
Roy Oursler
03bef684a4 igzip: Setup for variable hash mask
Change-Id: I3be94dbc40c2e02dcff4f89e5a9df8ed1f744f02
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-09-18 14:27:25 -07:00
Roy Oursler
6317ce2b78 igzip: Setup for variable lookback distance
Change-Id: Idd52c9392113dfc54feea3c66916a7f5aa128bef
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-09-18 14:27:25 -07:00
Roy Oursler
c1876a1221 igzip: Fixup level 3 first byte handling
Change-Id: Id9f59934d43b09af3c2ec722f5a825aa9b02e2dc
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-08-21 16:35:30 -07:00
Roy Oursler
cd7b70dd41 igzip: Fix level 3 gen_map end of buffer handling
Change-Id: I3ed75b0ade5af23a98d916e867bb93ee9ad3a992
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-08-21 16:35:30 -07:00
Roy Oursler
64aefbfcba igzip: Fix level 3 compression drop
Change-Id: I67d66323850d1e42ab1c38b212f4cb5ad8699920
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-08-15 11:19:28 -07:00
Greg Tucker
b1c4517557 igzip: Add a few missing asm copyright headers
Change-Id: Iddcfbd357efa17dbbd32acacac952579fc052756
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2018-06-21 14:50:40 -07:00
Roy Oursler
ff00a0f927 igzip: Reduce data usage in igzip_gen_icf_map_lh1_06
Change-Id: I453f6c6e71f236145c1e79493710c85847ed8c70
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-06-14 15:30:14 -07:00
Roy Oursler
47e914f98f igzip: Fix Windows prologue for avx 512 gen_map and set_long
Change-Id: I8e326dc7fb67f30101d03dc364ffba25242e1f67
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-03-01 13:27:48 -07:00
Roy Oursler
9acc3ed2ac igzip: Create AVX2 optimized version of level 3
Change-Id: Icfdb67445ee5afff85441cfee23beb66bfe15d5e
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2018-03-01 13:27:38 -07:00
Greg Tucker
6b1c9a95c8 igzip: Fix syntax for win yasm for when avx512 is supported
Currently can't test because yasm doesn't support avx512 but should
get the syntax correct for when it does.

Change-Id: I672b47b83b96861d8b9bfb0af02e726a1949aca0
Signed-off-by: Greg Tucker <greg.b.tucker@intel.com>
2017-12-19 10:33:53 -07:00
Roy Oursler
7a12bcb2a8 igzip: Separate concept of level and compression method
Change-Id: I82a5fbeb93adc77057893c643e044e311e4f393c
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2017-12-15 14:27:14 -07:00
Roy Oursler
4ae2d1be29 igzip: Implement optimized level 2 compression
Change-Id: I8cf5bcd56f290d17205ac36dc2828c8acfc66947
Signed-off-by: Roy Oursler <roy.j.oursler@intel.com>
2017-12-15 14:27:14 -07:00