From ede04f0a1f4d7ea00cbd13d33c9db35d17575a38 Mon Sep 17 00:00:00 2001 From: Greg Tucker Date: Mon, 16 Mar 2020 16:23:55 -0700 Subject: [PATCH] build: Fix for windows to allow nasm use Previously windows build could only use yasm because some procedural items such as proc_start were not supported by nasm. This adds a few macros and fixes so nasm can be used to build on windows. Change-Id: Ia05dc3ff482f33b0f915bb1be3c7df5e4a753b3a Signed-off-by: Greg Tucker --- crc/crc16_t10dif_01.asm | 2 +- crc/crc16_t10dif_02.asm | 2 +- crc/crc16_t10dif_by16_10.asm | 2 +- crc/crc16_t10dif_by4.asm | 2 +- crc/crc16_t10dif_copy_by4.asm | 2 +- crc/crc16_t10dif_copy_by4_02.asm | 2 +- crc/crc32_gzip_refl_by16_10.asm | 2 +- crc/crc32_gzip_refl_by8.asm | 2 +- crc/crc32_gzip_refl_by8_02.asm | 2 +- crc/crc32_ieee_01.asm | 2 +- crc/crc32_ieee_02.asm | 2 +- crc/crc32_ieee_by16_10.asm | 2 +- crc/crc32_ieee_by4.asm | 2 +- crc/crc32_iscsi_00.asm | 2 +- crc/crc32_iscsi_01.asm | 2 +- crc/crc64_ecma_norm_by8.asm | 2 +- crc/crc64_ecma_refl_by8.asm | 2 +- crc/crc64_iso_norm_by16_10.asm | 2 +- crc/crc64_iso_norm_by8.asm | 2 +- crc/crc64_iso_refl_by16_10.asm | 2 +- crc/crc64_iso_refl_by8.asm | 2 +- crc/crc64_jones_norm_by8.asm | 2 +- crc/crc64_jones_refl_by8.asm | 2 +- crc/crc_multibinary.asm | 6 +-- erasure_code/gf_2vect_dot_prod_avx.asm | 2 +- erasure_code/gf_2vect_dot_prod_avx2.asm | 2 +- erasure_code/gf_2vect_dot_prod_avx512.asm | 2 +- erasure_code/gf_2vect_dot_prod_sse.asm | 2 +- erasure_code/gf_2vect_mad_avx.asm | 2 +- erasure_code/gf_2vect_mad_avx2.asm | 2 +- erasure_code/gf_2vect_mad_avx512.asm | 2 +- erasure_code/gf_2vect_mad_sse.asm | 2 +- erasure_code/gf_3vect_dot_prod_avx.asm | 2 +- erasure_code/gf_3vect_dot_prod_avx2.asm | 2 +- erasure_code/gf_3vect_dot_prod_avx512.asm | 2 +- erasure_code/gf_3vect_dot_prod_sse.asm | 2 +- erasure_code/gf_3vect_mad_avx.asm | 2 +- erasure_code/gf_3vect_mad_avx2.asm | 2 +- erasure_code/gf_3vect_mad_avx512.asm | 2 +- erasure_code/gf_3vect_mad_sse.asm | 2 +- erasure_code/gf_4vect_dot_prod_avx.asm | 2 +- erasure_code/gf_4vect_dot_prod_avx2.asm | 2 +- erasure_code/gf_4vect_dot_prod_avx512.asm | 2 +- erasure_code/gf_4vect_dot_prod_sse.asm | 2 +- erasure_code/gf_4vect_mad_avx.asm | 2 +- erasure_code/gf_4vect_mad_avx2.asm | 2 +- erasure_code/gf_4vect_mad_avx512.asm | 2 +- erasure_code/gf_4vect_mad_sse.asm | 2 +- erasure_code/gf_5vect_dot_prod_avx.asm | 2 +- erasure_code/gf_5vect_dot_prod_avx2.asm | 2 +- erasure_code/gf_5vect_dot_prod_avx512.asm | 2 +- erasure_code/gf_5vect_dot_prod_sse.asm | 2 +- erasure_code/gf_5vect_mad_avx.asm | 2 +- erasure_code/gf_5vect_mad_avx2.asm | 2 +- erasure_code/gf_5vect_mad_avx512.asm | 2 +- erasure_code/gf_5vect_mad_sse.asm | 2 +- erasure_code/gf_6vect_dot_prod_avx.asm | 2 +- erasure_code/gf_6vect_dot_prod_avx2.asm | 2 +- erasure_code/gf_6vect_dot_prod_avx512.asm | 2 +- erasure_code/gf_6vect_dot_prod_sse.asm | 2 +- erasure_code/gf_6vect_mad_avx.asm | 2 +- erasure_code/gf_6vect_mad_avx2.asm | 2 +- erasure_code/gf_6vect_mad_avx512.asm | 2 +- erasure_code/gf_6vect_mad_sse.asm | 2 +- erasure_code/gf_vect_dot_prod_avx.asm | 2 +- erasure_code/gf_vect_dot_prod_avx2.asm | 2 +- erasure_code/gf_vect_dot_prod_avx512.asm | 2 +- erasure_code/gf_vect_dot_prod_sse.asm | 2 +- erasure_code/gf_vect_mad_avx.asm | 2 +- erasure_code/gf_vect_mad_avx2.asm | 2 +- erasure_code/gf_vect_mad_avx512.asm | 2 +- erasure_code/gf_vect_mad_sse.asm | 2 +- erasure_code/gf_vect_mul_avx.asm | 2 +- erasure_code/gf_vect_mul_sse.asm | 2 +- igzip/adler32_avx2_4.asm | 5 +- igzip/adler32_sse.asm | 6 ++- igzip/encode_df_04.asm | 3 ++ igzip/encode_df_06.asm | 3 ++ igzip/igzip_body.asm | 5 ++ igzip/igzip_decode_block_stateless.asm | 4 ++ igzip/igzip_deflate_hash.asm | 4 ++ igzip/igzip_finish.asm | 5 ++ igzip/igzip_gen_icf_map_lh1_04.asm | 4 ++ igzip/igzip_gen_icf_map_lh1_06.asm | 4 ++ igzip/igzip_icf_body_h1_gr_bt.asm | 4 ++ igzip/igzip_icf_finish.asm | 4 ++ igzip/igzip_set_long_icf_fg_04.asm | 4 ++ igzip/igzip_set_long_icf_fg_06.asm | 4 ++ igzip/igzip_update_histogram.asm | 4 ++ igzip/proc_heap.asm | 4 ++ igzip/rfc1951_lookup.asm | 2 +- include/multibinary.asm | 2 +- include/reg_sizes.asm | 66 ++++++++++++++++------- mem/mem_zero_detect_avx.asm | 2 +- mem/mem_zero_detect_sse.asm | 2 +- raid/pq_check_sse.asm | 2 +- raid/pq_check_sse_i32.asm | 2 +- raid/pq_gen_avx.asm | 2 +- raid/pq_gen_avx2.asm | 2 +- raid/pq_gen_avx512.asm | 2 +- raid/pq_gen_sse.asm | 2 +- raid/pq_gen_sse_i32.asm | 2 +- raid/raid_multibinary.asm | 4 +- raid/xor_check_sse.asm | 2 +- raid/xor_gen_avx.asm | 2 +- raid/xor_gen_avx512.asm | 2 +- raid/xor_gen_sse.asm | 2 +- 107 files changed, 206 insertions(+), 113 deletions(-) diff --git a/crc/crc16_t10dif_01.asm b/crc/crc16_t10dif_01.asm index f79cd3f..33f4555 100644 --- a/crc/crc16_t10dif_01.asm +++ b/crc/crc16_t10dif_01.asm @@ -73,7 +73,7 @@ section .text %endif align 16 -global crc16_t10dif_01:ISAL_SYM_TYPE_FUNCTION +mk_global crc16_t10dif_01, function crc16_t10dif_01: ; adjust the 16-bit initial_crc value, scale it to 32 bits diff --git a/crc/crc16_t10dif_02.asm b/crc/crc16_t10dif_02.asm index 97fa5e4..157ac53 100644 --- a/crc/crc16_t10dif_02.asm +++ b/crc/crc16_t10dif_02.asm @@ -73,7 +73,7 @@ section .text %endif align 16 -global crc16_t10dif_02:ISAL_SYM_TYPE_FUNCTION +mk_global crc16_t10dif_02, function crc16_t10dif_02: ; adjust the 16-bit initial_crc value, scale it to 32 bits diff --git a/crc/crc16_t10dif_by16_10.asm b/crc/crc16_t10dif_by16_10.asm index 9f39307..479b635 100644 --- a/crc/crc16_t10dif_by16_10.asm +++ b/crc/crc16_t10dif_by16_10.asm @@ -82,7 +82,7 @@ section .text %endif align 16 -global FUNCTION_NAME:ISAL_SYM_TYPE_FUNCTION +mk_global FUNCTION_NAME, function FUNCTION_NAME: ; adjust the 16-bit initial_crc value, scale it to 32 bits diff --git a/crc/crc16_t10dif_by4.asm b/crc/crc16_t10dif_by4.asm index 722ed95..bde071a 100644 --- a/crc/crc16_t10dif_by4.asm +++ b/crc/crc16_t10dif_by4.asm @@ -66,7 +66,7 @@ section .text %endif align 16 -global crc16_t10dif_by4:ISAL_SYM_TYPE_FUNCTION +mk_global crc16_t10dif_by4, function crc16_t10dif_by4: ; adjust the 16-bit initial_crc value, scale it to 32 bits diff --git a/crc/crc16_t10dif_copy_by4.asm b/crc/crc16_t10dif_copy_by4.asm index fd9b754..0f82d69 100644 --- a/crc/crc16_t10dif_copy_by4.asm +++ b/crc/crc16_t10dif_copy_by4.asm @@ -69,7 +69,7 @@ section .text %endif align 16 -global crc16_t10dif_copy_by4:ISAL_SYM_TYPE_FUNCTION +mk_global crc16_t10dif_copy_by4, function crc16_t10dif_copy_by4: ; adjust the 16-bit initial_crc value, scale it to 32 bits diff --git a/crc/crc16_t10dif_copy_by4_02.asm b/crc/crc16_t10dif_copy_by4_02.asm index e12d81f..1a7338f 100644 --- a/crc/crc16_t10dif_copy_by4_02.asm +++ b/crc/crc16_t10dif_copy_by4_02.asm @@ -69,7 +69,7 @@ section .text %endif align 16 -global crc16_t10dif_copy_by4_02:ISAL_SYM_TYPE_FUNCTION +mk_global crc16_t10dif_copy_by4_02, function crc16_t10dif_copy_by4_02: ; adjust the 16-bit initial_crc value, scale it to 32 bits diff --git a/crc/crc32_gzip_refl_by16_10.asm b/crc/crc32_gzip_refl_by16_10.asm index 40236f6..69cb366 100644 --- a/crc/crc32_gzip_refl_by16_10.asm +++ b/crc/crc32_gzip_refl_by16_10.asm @@ -92,7 +92,7 @@ section .text %endif align 16 -global FUNCTION_NAME:ISAL_SYM_TYPE_FUNCTION +mk_global FUNCTION_NAME, function FUNCTION_NAME: not arg1_low32 diff --git a/crc/crc32_gzip_refl_by8.asm b/crc/crc32_gzip_refl_by8.asm index 62f7e7d..780ae35 100644 --- a/crc/crc32_gzip_refl_by8.asm +++ b/crc/crc32_gzip_refl_by8.asm @@ -86,7 +86,7 @@ section .text %endif align 16 -global crc32_gzip_refl_by8:ISAL_SYM_TYPE_FUNCTION +mk_global crc32_gzip_refl_by8, function crc32_gzip_refl_by8: ; unsigned long c = crc ^ 0xffffffffL; diff --git a/crc/crc32_gzip_refl_by8_02.asm b/crc/crc32_gzip_refl_by8_02.asm index 80d849e..bba5ae6 100644 --- a/crc/crc32_gzip_refl_by8_02.asm +++ b/crc/crc32_gzip_refl_by8_02.asm @@ -86,7 +86,7 @@ section .text %endif align 16 -global crc32_gzip_refl_by8_02:ISAL_SYM_TYPE_FUNCTION +mk_global crc32_gzip_refl_by8_02, function crc32_gzip_refl_by8_02: not arg1_low32 sub rsp, VARIABLE_OFFSET diff --git a/crc/crc32_ieee_01.asm b/crc/crc32_ieee_01.asm index 32495ed..5b9d465 100644 --- a/crc/crc32_ieee_01.asm +++ b/crc/crc32_ieee_01.asm @@ -72,7 +72,7 @@ section .text %define VARIABLE_OFFSET 16*2+8 %endif align 16 -global crc32_ieee_01:ISAL_SYM_TYPE_FUNCTION +mk_global crc32_ieee_01, function crc32_ieee_01: not arg1_low32 ;~init_crc diff --git a/crc/crc32_ieee_02.asm b/crc/crc32_ieee_02.asm index 8a472b0..411e923 100644 --- a/crc/crc32_ieee_02.asm +++ b/crc/crc32_ieee_02.asm @@ -72,7 +72,7 @@ section .text %define VARIABLE_OFFSET 16*2+8 %endif align 16 -global crc32_ieee_02:ISAL_SYM_TYPE_FUNCTION +mk_global crc32_ieee_02, function crc32_ieee_02: not arg1_low32 ;~init_crc diff --git a/crc/crc32_ieee_by16_10.asm b/crc/crc32_ieee_by16_10.asm index 200fd93..c6aa741 100644 --- a/crc/crc32_ieee_by16_10.asm +++ b/crc/crc32_ieee_by16_10.asm @@ -82,7 +82,7 @@ section .text %endif align 16 -global FUNCTION_NAME:ISAL_SYM_TYPE_FUNCTION +mk_global FUNCTION_NAME, function FUNCTION_NAME: not arg1_low32 diff --git a/crc/crc32_ieee_by4.asm b/crc/crc32_ieee_by4.asm index 39bed5a..2ce2289 100644 --- a/crc/crc32_ieee_by4.asm +++ b/crc/crc32_ieee_by4.asm @@ -74,7 +74,7 @@ section .text %endif align 16 -global crc32_ieee_by4:ISAL_SYM_TYPE_FUNCTION +mk_global crc32_ieee_by4, function crc32_ieee_by4: not arg1_low32 diff --git a/crc/crc32_iscsi_00.asm b/crc/crc32_iscsi_00.asm index 4f81e3a..e1ad903 100644 --- a/crc/crc32_iscsi_00.asm +++ b/crc/crc32_iscsi_00.asm @@ -153,7 +153,7 @@ default rel ;;; crc_init = r8 ;;; -global crc32_iscsi_00:ISAL_SYM_TYPE_FUNCTION +mk_global crc32_iscsi_00, function crc32_iscsi_00: %ifidn __OUTPUT_FORMAT__, elf64 diff --git a/crc/crc32_iscsi_01.asm b/crc/crc32_iscsi_01.asm index 2a81517..30adb04 100644 --- a/crc/crc32_iscsi_01.asm +++ b/crc/crc32_iscsi_01.asm @@ -50,7 +50,7 @@ default rel ;;; len = rdx ;;; crc_init = r8 -global crc32_iscsi_01:ISAL_SYM_TYPE_FUNCTION +mk_global crc32_iscsi_01, function crc32_iscsi_01: %ifidn __OUTPUT_FORMAT__, elf64 diff --git a/crc/crc64_ecma_norm_by8.asm b/crc/crc64_ecma_norm_by8.asm index 6770e34..5599d98 100644 --- a/crc/crc64_ecma_norm_by8.asm +++ b/crc/crc64_ecma_norm_by8.asm @@ -62,7 +62,7 @@ section .text %define VARIABLE_OFFSET 16*2+8 %endif align 16 -global crc64_ecma_norm_by8:ISAL_SYM_TYPE_FUNCTION +mk_global crc64_ecma_norm_by8, function crc64_ecma_norm_by8: not arg1 ;~init_crc diff --git a/crc/crc64_ecma_refl_by8.asm b/crc/crc64_ecma_refl_by8.asm index e6518f4..b641934 100644 --- a/crc/crc64_ecma_refl_by8.asm +++ b/crc/crc64_ecma_refl_by8.asm @@ -68,7 +68,7 @@ section .text align 16 -global crc64_ecma_refl_by8:ISAL_SYM_TYPE_FUNCTION +mk_global crc64_ecma_refl_by8, function crc64_ecma_refl_by8: ; uint64_t c = crc ^ 0xffffffff,ffffffffL; not arg1 diff --git a/crc/crc64_iso_norm_by16_10.asm b/crc/crc64_iso_norm_by16_10.asm index c9f38b3..28630a1 100644 --- a/crc/crc64_iso_norm_by16_10.asm +++ b/crc/crc64_iso_norm_by16_10.asm @@ -69,7 +69,7 @@ section .text %endif align 16 -global FUNCTION_NAME:ISAL_SYM_TYPE_FUNCTION +mk_global FUNCTION_NAME, function FUNCTION_NAME: not arg1 sub rsp, VARIABLE_OFFSET diff --git a/crc/crc64_iso_norm_by8.asm b/crc/crc64_iso_norm_by8.asm index 9bc38ec..887fca8 100644 --- a/crc/crc64_iso_norm_by8.asm +++ b/crc/crc64_iso_norm_by8.asm @@ -61,7 +61,7 @@ section .text %define VARIABLE_OFFSET 16*2+8 %endif align 16 -global crc64_iso_norm_by8:ISAL_SYM_TYPE_FUNCTION +mk_global crc64_iso_norm_by8, function crc64_iso_norm_by8: not arg1 ;~init_crc diff --git a/crc/crc64_iso_refl_by16_10.asm b/crc/crc64_iso_refl_by16_10.asm index 0ee9b93..d58ac0a 100644 --- a/crc/crc64_iso_refl_by16_10.asm +++ b/crc/crc64_iso_refl_by16_10.asm @@ -70,7 +70,7 @@ section .text %endif align 16 -global FUNCTION_NAME:ISAL_SYM_TYPE_FUNCTION +mk_global FUNCTION_NAME, function FUNCTION_NAME: not arg1 sub rsp, VARIABLE_OFFSET diff --git a/crc/crc64_iso_refl_by8.asm b/crc/crc64_iso_refl_by8.asm index 564a510..3abc5da 100644 --- a/crc/crc64_iso_refl_by8.asm +++ b/crc/crc64_iso_refl_by8.asm @@ -65,7 +65,7 @@ section .text align 16 -global crc64_iso_refl_by8:ISAL_SYM_TYPE_FUNCTION +mk_global crc64_iso_refl_by8, function crc64_iso_refl_by8: ; uint64_t c = crc ^ 0xffffffff,ffffffffL; not arg1 diff --git a/crc/crc64_jones_norm_by8.asm b/crc/crc64_jones_norm_by8.asm index 44ad726..bc3b521 100644 --- a/crc/crc64_jones_norm_by8.asm +++ b/crc/crc64_jones_norm_by8.asm @@ -61,7 +61,7 @@ section .text %define VARIABLE_OFFSET 16*2+8 %endif align 16 -global crc64_jones_norm_by8:ISAL_SYM_TYPE_FUNCTION +mk_global crc64_jones_norm_by8, function crc64_jones_norm_by8: not arg1 ;~init_crc diff --git a/crc/crc64_jones_refl_by8.asm b/crc/crc64_jones_refl_by8.asm index 7081f54..a9ea19a 100644 --- a/crc/crc64_jones_refl_by8.asm +++ b/crc/crc64_jones_refl_by8.asm @@ -65,7 +65,7 @@ section .text align 16 -global crc64_jones_refl_by8:ISAL_SYM_TYPE_FUNCTION +mk_global crc64_jones_refl_by8, function crc64_jones_refl_by8: ; uint64_t c = crc ^ 0xffffffff,ffffffffL; not arg1 diff --git a/crc/crc_multibinary.asm b/crc/crc_multibinary.asm index 9628b16..b1f425a 100644 --- a/crc/crc_multibinary.asm +++ b/crc/crc_multibinary.asm @@ -79,7 +79,7 @@ section .text ;;;; ; crc32_iscsi multibinary function ;;;; -global crc32_iscsi:ISAL_SYM_TYPE_FUNCTION +mk_global crc32_iscsi, function crc32_iscsi_mbinit: call crc32_iscsi_dispatch_init crc32_iscsi: @@ -113,7 +113,7 @@ crc32_iscsi_dispatch_init: ;;;; ; crc32_ieee multibinary function ;;;; -global crc32_ieee:ISAL_SYM_TYPE_FUNCTION +mk_global crc32_ieee, function crc32_ieee_mbinit: call crc32_ieee_dispatch_init crc32_ieee: @@ -192,7 +192,7 @@ crc32_ieee_dispatch_init: ;;;; ; crc16_t10dif multibinary function ;;;; -global crc16_t10dif:ISAL_SYM_TYPE_FUNCTION +mk_global crc16_t10dif, function crc16_t10dif_mbinit: call crc16_t10dif_dispatch_init crc16_t10dif: diff --git a/erasure_code/gf_2vect_dot_prod_avx.asm b/erasure_code/gf_2vect_dot_prod_avx.asm index 99bc95a..f512d7d 100644 --- a/erasure_code/gf_2vect_dot_prod_avx.asm +++ b/erasure_code/gf_2vect_dot_prod_avx.asm @@ -238,7 +238,7 @@ section .text %endif align 16 -global gf_2vect_dot_prod_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_2vect_dot_prod_avx, function func(gf_2vect_dot_prod_avx) FUNC_SAVE diff --git a/erasure_code/gf_2vect_dot_prod_avx2.asm b/erasure_code/gf_2vect_dot_prod_avx2.asm index db37b0e..ba704d0 100644 --- a/erasure_code/gf_2vect_dot_prod_avx2.asm +++ b/erasure_code/gf_2vect_dot_prod_avx2.asm @@ -248,7 +248,7 @@ section .text %endif align 16 -global gf_2vect_dot_prod_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_2vect_dot_prod_avx2, function func(gf_2vect_dot_prod_avx2) FUNC_SAVE diff --git a/erasure_code/gf_2vect_dot_prod_avx512.asm b/erasure_code/gf_2vect_dot_prod_avx512.asm index 470051d..2444216 100644 --- a/erasure_code/gf_2vect_dot_prod_avx512.asm +++ b/erasure_code/gf_2vect_dot_prod_avx512.asm @@ -160,7 +160,7 @@ default rel section .text align 16 -global gf_2vect_dot_prod_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_2vect_dot_prod_avx512, function func(gf_2vect_dot_prod_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_2vect_dot_prod_sse.asm b/erasure_code/gf_2vect_dot_prod_sse.asm index 05a0c28..7e1006b 100644 --- a/erasure_code/gf_2vect_dot_prod_sse.asm +++ b/erasure_code/gf_2vect_dot_prod_sse.asm @@ -238,7 +238,7 @@ section .text %endif align 16 -global gf_2vect_dot_prod_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_2vect_dot_prod_sse, function func(gf_2vect_dot_prod_sse) FUNC_SAVE diff --git a/erasure_code/gf_2vect_mad_avx.asm b/erasure_code/gf_2vect_mad_avx.asm index fcf3a75..65af8b0 100644 --- a/erasure_code/gf_2vect_mad_avx.asm +++ b/erasure_code/gf_2vect_mad_avx.asm @@ -155,7 +155,7 @@ section .text align 16 -global gf_2vect_mad_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_2vect_mad_avx, function func(gf_2vect_mad_avx) FUNC_SAVE diff --git a/erasure_code/gf_2vect_mad_avx2.asm b/erasure_code/gf_2vect_mad_avx2.asm index 0e77ebe..f4c1cae 100644 --- a/erasure_code/gf_2vect_mad_avx2.asm +++ b/erasure_code/gf_2vect_mad_avx2.asm @@ -163,7 +163,7 @@ section .text %define xtmpd2 ymm9 align 16 -global gf_2vect_mad_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_2vect_mad_avx2, function func(gf_2vect_mad_avx2) FUNC_SAVE diff --git a/erasure_code/gf_2vect_mad_avx512.asm b/erasure_code/gf_2vect_mad_avx512.asm index 6d972bb..5a35a89 100644 --- a/erasure_code/gf_2vect_mad_avx512.asm +++ b/erasure_code/gf_2vect_mad_avx512.asm @@ -149,7 +149,7 @@ section .text %define xmask0f zmm14 align 16 -global gf_2vect_mad_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_2vect_mad_avx512, function func(gf_2vect_mad_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_2vect_mad_sse.asm b/erasure_code/gf_2vect_mad_sse.asm index 7ee1b24..c85b431 100644 --- a/erasure_code/gf_2vect_mad_sse.asm +++ b/erasure_code/gf_2vect_mad_sse.asm @@ -154,7 +154,7 @@ section .text align 16 -global gf_2vect_mad_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_2vect_mad_sse, function func(gf_2vect_mad_sse) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_3vect_dot_prod_avx.asm b/erasure_code/gf_3vect_dot_prod_avx.asm index a8b46e8..deb44d0 100644 --- a/erasure_code/gf_3vect_dot_prod_avx.asm +++ b/erasure_code/gf_3vect_dot_prod_avx.asm @@ -261,7 +261,7 @@ section .text %endif align 16 -global gf_3vect_dot_prod_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_3vect_dot_prod_avx, function func(gf_3vect_dot_prod_avx) FUNC_SAVE SLDR len, len_m diff --git a/erasure_code/gf_3vect_dot_prod_avx2.asm b/erasure_code/gf_3vect_dot_prod_avx2.asm index 38dddcf..fa55dd6 100644 --- a/erasure_code/gf_3vect_dot_prod_avx2.asm +++ b/erasure_code/gf_3vect_dot_prod_avx2.asm @@ -269,7 +269,7 @@ section .text %endif align 16 -global gf_3vect_dot_prod_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_3vect_dot_prod_avx2, function func(gf_3vect_dot_prod_avx2) FUNC_SAVE SLDR len, len_m diff --git a/erasure_code/gf_3vect_dot_prod_avx512.asm b/erasure_code/gf_3vect_dot_prod_avx512.asm index 057cd37..eecde81 100644 --- a/erasure_code/gf_3vect_dot_prod_avx512.asm +++ b/erasure_code/gf_3vect_dot_prod_avx512.asm @@ -173,7 +173,7 @@ default rel section .text align 16 -global gf_3vect_dot_prod_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_3vect_dot_prod_avx512, function func(gf_3vect_dot_prod_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_3vect_dot_prod_sse.asm b/erasure_code/gf_3vect_dot_prod_sse.asm index da0bdf9..2b13e71 100644 --- a/erasure_code/gf_3vect_dot_prod_sse.asm +++ b/erasure_code/gf_3vect_dot_prod_sse.asm @@ -261,7 +261,7 @@ section .text %endif align 16 -global gf_3vect_dot_prod_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_3vect_dot_prod_sse, function func(gf_3vect_dot_prod_sse) FUNC_SAVE SLDR len, len_m diff --git a/erasure_code/gf_3vect_mad_avx.asm b/erasure_code/gf_3vect_mad_avx.asm index 1f40eb7..4aea710 100644 --- a/erasure_code/gf_3vect_mad_avx.asm +++ b/erasure_code/gf_3vect_mad_avx.asm @@ -158,7 +158,7 @@ section .text %define xd3 xtmph1 align 16 -global gf_3vect_mad_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_3vect_mad_avx, function func(gf_3vect_mad_avx) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_3vect_mad_avx2.asm b/erasure_code/gf_3vect_mad_avx2.asm index 0b36661..e8071dd 100644 --- a/erasure_code/gf_3vect_mad_avx2.asm +++ b/erasure_code/gf_3vect_mad_avx2.asm @@ -165,7 +165,7 @@ section .text %define xd3 ymm10 align 16 -global gf_3vect_mad_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_3vect_mad_avx2, function func(gf_3vect_mad_avx2) FUNC_SAVE sub len, 32 diff --git a/erasure_code/gf_3vect_mad_avx512.asm b/erasure_code/gf_3vect_mad_avx512.asm index dcafbc7..b8b8d9b 100644 --- a/erasure_code/gf_3vect_mad_avx512.asm +++ b/erasure_code/gf_3vect_mad_avx512.asm @@ -152,7 +152,7 @@ section .text %define xmask0f zmm17 align 16 -global gf_3vect_mad_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_3vect_mad_avx512, function func(gf_3vect_mad_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_3vect_mad_sse.asm b/erasure_code/gf_3vect_mad_sse.asm index 0d9028b..10744ec 100644 --- a/erasure_code/gf_3vect_mad_sse.asm +++ b/erasure_code/gf_3vect_mad_sse.asm @@ -156,7 +156,7 @@ section .text %define xd3 xtmph1 align 16 -global gf_3vect_mad_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_3vect_mad_sse, function func(gf_3vect_mad_sse) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_4vect_dot_prod_avx.asm b/erasure_code/gf_4vect_dot_prod_avx.asm index fbb58cc..f436048 100644 --- a/erasure_code/gf_4vect_dot_prod_avx.asm +++ b/erasure_code/gf_4vect_dot_prod_avx.asm @@ -294,7 +294,7 @@ section .text %define xp4 xmm5 %endif align 16 -global gf_4vect_dot_prod_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_4vect_dot_prod_avx, function func(gf_4vect_dot_prod_avx) FUNC_SAVE SLDR len, len_m diff --git a/erasure_code/gf_4vect_dot_prod_avx2.asm b/erasure_code/gf_4vect_dot_prod_avx2.asm index 181a18d..0c7ae4e 100644 --- a/erasure_code/gf_4vect_dot_prod_avx2.asm +++ b/erasure_code/gf_4vect_dot_prod_avx2.asm @@ -302,7 +302,7 @@ section .text %define xp4 ymm5 %endif align 16 -global gf_4vect_dot_prod_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_4vect_dot_prod_avx2, function func(gf_4vect_dot_prod_avx2) FUNC_SAVE SLDR len, len_m diff --git a/erasure_code/gf_4vect_dot_prod_avx512.asm b/erasure_code/gf_4vect_dot_prod_avx512.asm index 9288678..6d67426 100644 --- a/erasure_code/gf_4vect_dot_prod_avx512.asm +++ b/erasure_code/gf_4vect_dot_prod_avx512.asm @@ -191,7 +191,7 @@ default rel section .text align 16 -global gf_4vect_dot_prod_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_4vect_dot_prod_avx512, function func(gf_4vect_dot_prod_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_4vect_dot_prod_sse.asm b/erasure_code/gf_4vect_dot_prod_sse.asm index b329624..25134c7 100644 --- a/erasure_code/gf_4vect_dot_prod_sse.asm +++ b/erasure_code/gf_4vect_dot_prod_sse.asm @@ -294,7 +294,7 @@ section .text %define xp4 xmm5 %endif align 16 -global gf_4vect_dot_prod_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_4vect_dot_prod_sse, function func(gf_4vect_dot_prod_sse) FUNC_SAVE SLDR len, len_m diff --git a/erasure_code/gf_4vect_mad_avx.asm b/erasure_code/gf_4vect_mad_avx.asm index 62441c1..284c76b 100644 --- a/erasure_code/gf_4vect_mad_avx.asm +++ b/erasure_code/gf_4vect_mad_avx.asm @@ -169,7 +169,7 @@ section .text %define xd4 xtmpl1 align 16 -global gf_4vect_mad_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_4vect_mad_avx, function func(gf_4vect_mad_avx) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_4vect_mad_avx2.asm b/erasure_code/gf_4vect_mad_avx2.asm index 9a7b7d9..bf6cc7e 100644 --- a/erasure_code/gf_4vect_mad_avx2.asm +++ b/erasure_code/gf_4vect_mad_avx2.asm @@ -165,7 +165,7 @@ section .text %define xd4 ymm10 align 16 -global gf_4vect_mad_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_4vect_mad_avx2, function func(gf_4vect_mad_avx2) FUNC_SAVE sub len, 32 diff --git a/erasure_code/gf_4vect_mad_avx512.asm b/erasure_code/gf_4vect_mad_avx512.asm index bc836af..3948ab1 100644 --- a/erasure_code/gf_4vect_mad_avx512.asm +++ b/erasure_code/gf_4vect_mad_avx512.asm @@ -159,7 +159,7 @@ section .text %define xtmpl5 zmm23 align 16 -global gf_4vect_mad_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_4vect_mad_avx512, function func(gf_4vect_mad_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_4vect_mad_sse.asm b/erasure_code/gf_4vect_mad_sse.asm index c3d4c5d..377b31f 100644 --- a/erasure_code/gf_4vect_mad_sse.asm +++ b/erasure_code/gf_4vect_mad_sse.asm @@ -168,7 +168,7 @@ section .text %define xd4 xtmpl1 align 16 -global gf_4vect_mad_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_4vect_mad_sse, function func(gf_4vect_mad_sse) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_5vect_dot_prod_avx.asm b/erasure_code/gf_5vect_dot_prod_avx.asm index d955fc4..3226dde 100644 --- a/erasure_code/gf_5vect_dot_prod_avx.asm +++ b/erasure_code/gf_5vect_dot_prod_avx.asm @@ -184,7 +184,7 @@ section .text %define xp5 xmm6 align 16 -global gf_5vect_dot_prod_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_5vect_dot_prod_avx, function func(gf_5vect_dot_prod_avx) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_5vect_dot_prod_avx2.asm b/erasure_code/gf_5vect_dot_prod_avx2.asm index dfafd8a..4bee087 100644 --- a/erasure_code/gf_5vect_dot_prod_avx2.asm +++ b/erasure_code/gf_5vect_dot_prod_avx2.asm @@ -189,7 +189,7 @@ section .text %define xp5 ymm6 align 16 -global gf_5vect_dot_prod_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_5vect_dot_prod_avx2, function func(gf_5vect_dot_prod_avx2) FUNC_SAVE sub len, 32 diff --git a/erasure_code/gf_5vect_dot_prod_avx512.asm b/erasure_code/gf_5vect_dot_prod_avx512.asm index 41e266b..e955ea5 100644 --- a/erasure_code/gf_5vect_dot_prod_avx512.asm +++ b/erasure_code/gf_5vect_dot_prod_avx512.asm @@ -211,7 +211,7 @@ default rel section .text align 16 -global gf_5vect_dot_prod_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_5vect_dot_prod_avx512, function func(gf_5vect_dot_prod_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_5vect_dot_prod_sse.asm b/erasure_code/gf_5vect_dot_prod_sse.asm index 59b0ac2..5ff9460 100644 --- a/erasure_code/gf_5vect_dot_prod_sse.asm +++ b/erasure_code/gf_5vect_dot_prod_sse.asm @@ -184,7 +184,7 @@ section .text %define xp5 xmm14 align 16 -global gf_5vect_dot_prod_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_5vect_dot_prod_sse, function func(gf_5vect_dot_prod_sse) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_5vect_mad_avx.asm b/erasure_code/gf_5vect_mad_avx.asm index 696b6a0..ccdbc6e 100644 --- a/erasure_code/gf_5vect_mad_avx.asm +++ b/erasure_code/gf_5vect_mad_avx.asm @@ -178,7 +178,7 @@ section .text align 16 -global gf_5vect_mad_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_5vect_mad_avx, function func(gf_5vect_mad_avx) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_5vect_mad_avx2.asm b/erasure_code/gf_5vect_mad_avx2.asm index 3c65c05..ac61437 100644 --- a/erasure_code/gf_5vect_mad_avx2.asm +++ b/erasure_code/gf_5vect_mad_avx2.asm @@ -166,7 +166,7 @@ section .text %define xd5 ymm9 align 16 -global gf_5vect_mad_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_5vect_mad_avx2, function func(gf_5vect_mad_avx2) FUNC_SAVE sub len, 32 diff --git a/erasure_code/gf_5vect_mad_avx512.asm b/erasure_code/gf_5vect_mad_avx512.asm index 96b498c..5de47d1 100644 --- a/erasure_code/gf_5vect_mad_avx512.asm +++ b/erasure_code/gf_5vect_mad_avx512.asm @@ -167,7 +167,7 @@ section .text %define xtmph5 zmm27 align 16 -global gf_5vect_mad_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_5vect_mad_avx512, function func(gf_5vect_mad_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_5vect_mad_sse.asm b/erasure_code/gf_5vect_mad_sse.asm index b16f405..fc99aaf 100644 --- a/erasure_code/gf_5vect_mad_sse.asm +++ b/erasure_code/gf_5vect_mad_sse.asm @@ -177,7 +177,7 @@ section .text align 16 -global gf_5vect_mad_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_5vect_mad_sse, function func(gf_5vect_mad_sse) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_6vect_dot_prod_avx.asm b/erasure_code/gf_6vect_dot_prod_avx.asm index f64e9ef..1f9df8d 100644 --- a/erasure_code/gf_6vect_dot_prod_avx.asm +++ b/erasure_code/gf_6vect_dot_prod_avx.asm @@ -182,7 +182,7 @@ section .text %define xp6 xmm7 align 16 -global gf_6vect_dot_prod_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_6vect_dot_prod_avx, function func(gf_6vect_dot_prod_avx) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_6vect_dot_prod_avx2.asm b/erasure_code/gf_6vect_dot_prod_avx2.asm index a57c52a..ccb4e77 100644 --- a/erasure_code/gf_6vect_dot_prod_avx2.asm +++ b/erasure_code/gf_6vect_dot_prod_avx2.asm @@ -187,7 +187,7 @@ section .text %define xp6 ymm7 align 16 -global gf_6vect_dot_prod_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_6vect_dot_prod_avx2, function func(gf_6vect_dot_prod_avx2) FUNC_SAVE sub len, 32 diff --git a/erasure_code/gf_6vect_dot_prod_avx512.asm b/erasure_code/gf_6vect_dot_prod_avx512.asm index b2bd002..6ebfd26 100644 --- a/erasure_code/gf_6vect_dot_prod_avx512.asm +++ b/erasure_code/gf_6vect_dot_prod_avx512.asm @@ -215,7 +215,7 @@ default rel section .text align 16 -global gf_6vect_dot_prod_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_6vect_dot_prod_avx512, function func(gf_6vect_dot_prod_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_6vect_dot_prod_sse.asm b/erasure_code/gf_6vect_dot_prod_sse.asm index b628811..51bd116 100644 --- a/erasure_code/gf_6vect_dot_prod_sse.asm +++ b/erasure_code/gf_6vect_dot_prod_sse.asm @@ -182,7 +182,7 @@ section .text %define xp6 xmm13 align 16 -global gf_6vect_dot_prod_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_6vect_dot_prod_sse, function func(gf_6vect_dot_prod_sse) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_6vect_mad_avx.asm b/erasure_code/gf_6vect_mad_avx.asm index f2e04cd..4e20dbb 100644 --- a/erasure_code/gf_6vect_mad_avx.asm +++ b/erasure_code/gf_6vect_mad_avx.asm @@ -184,7 +184,7 @@ section .text align 16 -global gf_6vect_mad_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_6vect_mad_avx, function func(gf_6vect_mad_avx) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_6vect_mad_avx2.asm b/erasure_code/gf_6vect_mad_avx2.asm index b344532..45d750e 100644 --- a/erasure_code/gf_6vect_mad_avx2.asm +++ b/erasure_code/gf_6vect_mad_avx2.asm @@ -177,7 +177,7 @@ section .text %define xd6 xd1 align 16 -global gf_6vect_mad_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_6vect_mad_avx2, function func(gf_6vect_mad_avx2) FUNC_SAVE sub len, 32 diff --git a/erasure_code/gf_6vect_mad_avx512.asm b/erasure_code/gf_6vect_mad_avx512.asm index 5f31bf1..6ae11f3 100644 --- a/erasure_code/gf_6vect_mad_avx512.asm +++ b/erasure_code/gf_6vect_mad_avx512.asm @@ -181,7 +181,7 @@ section .text %define xtmph6 zmm31 align 16 -global gf_6vect_mad_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_6vect_mad_avx512, function func(gf_6vect_mad_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_6vect_mad_sse.asm b/erasure_code/gf_6vect_mad_sse.asm index 4fed2aa..695fd6b 100644 --- a/erasure_code/gf_6vect_mad_sse.asm +++ b/erasure_code/gf_6vect_mad_sse.asm @@ -185,7 +185,7 @@ section .text align 16 -global gf_6vect_mad_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_6vect_mad_sse, function func(gf_6vect_mad_sse) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_vect_dot_prod_avx.asm b/erasure_code/gf_vect_dot_prod_avx.asm index c123a3d..179e985 100644 --- a/erasure_code/gf_vect_dot_prod_avx.asm +++ b/erasure_code/gf_vect_dot_prod_avx.asm @@ -194,7 +194,7 @@ section .text %define xp xmm2 align 16 -global gf_vect_dot_prod_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_vect_dot_prod_avx, function func(gf_vect_dot_prod_avx) FUNC_SAVE SLDR len, len_m diff --git a/erasure_code/gf_vect_dot_prod_avx2.asm b/erasure_code/gf_vect_dot_prod_avx2.asm index f84dd47..2cfa0f0 100644 --- a/erasure_code/gf_vect_dot_prod_avx2.asm +++ b/erasure_code/gf_vect_dot_prod_avx2.asm @@ -202,7 +202,7 @@ section .text %define xp ymm2 align 16 -global gf_vect_dot_prod_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_vect_dot_prod_avx2, function func(gf_vect_dot_prod_avx2) FUNC_SAVE SLDR len, len_m diff --git a/erasure_code/gf_vect_dot_prod_avx512.asm b/erasure_code/gf_vect_dot_prod_avx512.asm index ad01fcf..203e95d 100644 --- a/erasure_code/gf_vect_dot_prod_avx512.asm +++ b/erasure_code/gf_vect_dot_prod_avx512.asm @@ -128,7 +128,7 @@ default rel section .text align 16 -global gf_vect_dot_prod_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_vect_dot_prod_avx512, function func(gf_vect_dot_prod_avx512) FUNC_SAVE xor pos, pos diff --git a/erasure_code/gf_vect_dot_prod_sse.asm b/erasure_code/gf_vect_dot_prod_sse.asm index 108fa36..602bd89 100644 --- a/erasure_code/gf_vect_dot_prod_sse.asm +++ b/erasure_code/gf_vect_dot_prod_sse.asm @@ -194,7 +194,7 @@ section .text %define xp xmm2 align 16 -global gf_vect_dot_prod_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_vect_dot_prod_sse, function func(gf_vect_dot_prod_sse) FUNC_SAVE SLDR len, len_m diff --git a/erasure_code/gf_vect_mad_avx.asm b/erasure_code/gf_vect_mad_avx.asm index f444d11..2b0e623 100644 --- a/erasure_code/gf_vect_mad_avx.asm +++ b/erasure_code/gf_vect_mad_avx.asm @@ -131,7 +131,7 @@ section .text %define xtmpd xmm5 align 16 -global gf_vect_mad_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_vect_mad_avx, function func(gf_vect_mad_avx) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_vect_mad_avx2.asm b/erasure_code/gf_vect_mad_avx2.asm index b65d0aa..9941fca 100644 --- a/erasure_code/gf_vect_mad_avx2.asm +++ b/erasure_code/gf_vect_mad_avx2.asm @@ -139,7 +139,7 @@ section .text %define xtmpd ymm5 align 16 -global gf_vect_mad_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global gf_vect_mad_avx2, function func(gf_vect_mad_avx2) FUNC_SAVE sub len, 32 diff --git a/erasure_code/gf_vect_mad_avx512.asm b/erasure_code/gf_vect_mad_avx512.asm index 44fb653..931e0cc 100644 --- a/erasure_code/gf_vect_mad_avx512.asm +++ b/erasure_code/gf_vect_mad_avx512.asm @@ -127,7 +127,7 @@ section .text %define xmask0f zmm8 align 16 -global gf_vect_mad_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global gf_vect_mad_avx512, function func(gf_vect_mad_avx512) FUNC_SAVE sub len, 64 diff --git a/erasure_code/gf_vect_mad_sse.asm b/erasure_code/gf_vect_mad_sse.asm index 8d7e5ee..1ea69fe 100644 --- a/erasure_code/gf_vect_mad_sse.asm +++ b/erasure_code/gf_vect_mad_sse.asm @@ -131,7 +131,7 @@ section .text align 16 -global gf_vect_mad_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_vect_mad_sse, function func(gf_vect_mad_sse) FUNC_SAVE sub len, 16 diff --git a/erasure_code/gf_vect_mul_avx.asm b/erasure_code/gf_vect_mul_avx.asm index ec6a64f..0186bbc 100644 --- a/erasure_code/gf_vect_mul_avx.asm +++ b/erasure_code/gf_vect_mul_avx.asm @@ -111,7 +111,7 @@ section .text %define xtmp2c xmm7 align 16 -global gf_vect_mul_avx:ISAL_SYM_TYPE_FUNCTION +mk_global gf_vect_mul_avx, function func(gf_vect_mul_avx) FUNC_SAVE mov pos, 0 diff --git a/erasure_code/gf_vect_mul_sse.asm b/erasure_code/gf_vect_mul_sse.asm index 36323d6..bad257a 100644 --- a/erasure_code/gf_vect_mul_sse.asm +++ b/erasure_code/gf_vect_mul_sse.asm @@ -112,7 +112,7 @@ section .text align 16 -global gf_vect_mul_sse:ISAL_SYM_TYPE_FUNCTION +mk_global gf_vect_mul_sse, function func(gf_vect_mul_sse) FUNC_SAVE mov pos, 0 diff --git a/igzip/adler32_avx2_4.asm b/igzip/adler32_avx2_4.asm index 8f9d6d5..62c62bb 100644 --- a/igzip/adler32_avx2_4.asm +++ b/igzip/adler32_avx2_4.asm @@ -123,8 +123,11 @@ default rel %define yshuf0 ymm6 %define yshuf1 ymm7 +[bits 64] +default rel +section .text -global adler32_avx2_4:ISAL_SYM_TYPE_FUNCTION +mk_global adler32_avx2_4, function func(adler32_avx2_4) FUNC_SAVE diff --git a/igzip/adler32_sse.asm b/igzip/adler32_sse.asm index 83f577d..6aea7cb 100644 --- a/igzip/adler32_sse.asm +++ b/igzip/adler32_sse.asm @@ -104,7 +104,11 @@ default rel %define xdata1 xmm3 %define xsa xmm4 -global adler32_sse:ISAL_SYM_TYPE_FUNCTION +[bits 64] +default rel +section .text + +mk_global adler32_sse, function func(adler32_sse) FUNC_SAVE diff --git a/igzip/encode_df_04.asm b/igzip/encode_df_04.asm index 81287cc..2c52af8 100644 --- a/igzip/encode_df_04.asm +++ b/igzip/encode_df_04.asm @@ -172,6 +172,9 @@ stack_size equ gpr_save_mem_size + xmm_save_mem_size + bitbuf_mem_size %endmacro +default rel +section .text + global encode_deflate_icf_ %+ ARCH encode_deflate_icf_ %+ ARCH: FUNC_SAVE diff --git a/igzip/encode_df_06.asm b/igzip/encode_df_06.asm index 9fa5163..aaec754 100644 --- a/igzip/encode_df_06.asm +++ b/igzip/encode_df_06.asm @@ -185,6 +185,9 @@ stack_size equ gpr_save_mem_size + xmm_save_mem_size + bitbuf_mem_size %endmacro +default rel +section .text + global encode_deflate_icf_ %+ ARCH encode_deflate_icf_ %+ ARCH: FUNC_SAVE diff --git a/igzip/igzip_body.asm b/igzip/igzip_body.asm index 43de234..d69b27c 100644 --- a/igzip/igzip_body.asm +++ b/igzip/igzip_body.asm @@ -134,6 +134,11 @@ stack_size equ 4*8 + 8*8 + 4*16 + 8 %if ARCH == 04 %define USE_HSWNI %endif + +[bits 64] +default rel +section .text + ; void isal_deflate_body ( isal_zstream *stream ) ; arg 1: rcx: addr of stream global isal_deflate_body_ %+ ARCH diff --git a/igzip/igzip_decode_block_stateless.asm b/igzip/igzip_decode_block_stateless.asm index f5e35cd..733194b 100644 --- a/igzip/igzip_decode_block_stateless.asm +++ b/igzip/igzip_decode_block_stateless.asm @@ -459,6 +459,10 @@ stack_size equ 4 * 8 + 8 * 8 decode_next_dist %%state, %%lookup_size, %%state_offset, %%read_in, %%read_in_length, %%next_sym, %%next_extra_bits, %%next_bits %endm +[bits 64] +default rel +section .text + global decode_huffman_code_block_stateless_ %+ ARCH decode_huffman_code_block_stateless_ %+ ARCH %+ : diff --git a/igzip/igzip_deflate_hash.asm b/igzip/igzip_deflate_hash.asm index b61c4be..bcb0d5d 100644 --- a/igzip/igzip_deflate_hash.asm +++ b/igzip/igzip_deflate_hash.asm @@ -98,6 +98,10 @@ %endif %endm +[bits 64] +default rel +section .text + global isal_deflate_hash_crc_01 isal_deflate_hash_crc_01: FUNC_SAVE diff --git a/igzip/igzip_finish.asm b/igzip/igzip_finish.asm index 36823e1..fbf8839 100644 --- a/igzip/igzip_finish.asm +++ b/igzip/igzip_finish.asm @@ -85,6 +85,11 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; f_end_i_mem_offset equ 0 ; local variable (8 bytes) stack_size equ 8 + +[bits 64] +default rel +section .text + ; void isal_deflate_finish ( isal_zstream *stream ) ; arg 1: rcx: addr of stream global isal_deflate_finish_01 diff --git a/igzip/igzip_gen_icf_map_lh1_04.asm b/igzip/igzip_gen_icf_map_lh1_04.asm index 9b5e85a..077f56c 100644 --- a/igzip/igzip_gen_icf_map_lh1_04.asm +++ b/igzip/igzip_gen_icf_map_lh1_04.asm @@ -169,6 +169,10 @@ %define VECT_SIZE 8 %define HASH_BYTES 2 +[bits 64] +default rel +section .text + global gen_icf_map_lh1_04 func(gen_icf_map_lh1_04) FUNC_SAVE diff --git a/igzip/igzip_gen_icf_map_lh1_06.asm b/igzip/igzip_gen_icf_map_lh1_06.asm index 69af940..d134357 100644 --- a/igzip/igzip_gen_icf_map_lh1_06.asm +++ b/igzip/igzip_gen_icf_map_lh1_06.asm @@ -160,6 +160,10 @@ %define VECT_SIZE 16 %define HASH_BYTES 2 +[bits 64] +default rel +section .text + global gen_icf_map_lh1_06 func(gen_icf_map_lh1_06) FUNC_SAVE diff --git a/igzip/igzip_icf_body_h1_gr_bt.asm b/igzip/igzip_icf_body_h1_gr_bt.asm index c059178..51871c5 100644 --- a/igzip/igzip_icf_body_h1_gr_bt.asm +++ b/igzip/igzip_icf_body_h1_gr_bt.asm @@ -155,6 +155,10 @@ stack_size equ 11*8 + 8*8 + 4*16 %define USE_HSWNI %endif +[bits 64] +default rel +section .text + ; void isal_deflate_icf_body ( isal_zstream *stream ) ; we make 6 different versions of this function ; arg 1: rcx: addr of stream diff --git a/igzip/igzip_icf_finish.asm b/igzip/igzip_icf_finish.asm index ccff445..b9f88a9 100644 --- a/igzip/igzip_icf_finish.asm +++ b/igzip/igzip_icf_finish.asm @@ -94,6 +94,10 @@ stack_size equ 5*8 %xdefine METHOD hash_hist +[bits 64] +default rel +section .text + ; void isal_deflate_icf_finish ( isal_zstream *stream ) ; arg 1: rcx: addr of stream global isal_deflate_icf_finish_ %+ METHOD %+ _01 diff --git a/igzip/igzip_set_long_icf_fg_04.asm b/igzip/igzip_set_long_icf_fg_04.asm index f5c2b98..070e614 100644 --- a/igzip/igzip_set_long_icf_fg_04.asm +++ b/igzip/igzip_set_long_icf_fg_04.asm @@ -135,6 +135,10 @@ default rel %endif %define VECT_SIZE 8 +[bits 64] +default rel +section .text + global set_long_icf_fg_04 func(set_long_icf_fg_04) FUNC_SAVE diff --git a/igzip/igzip_set_long_icf_fg_06.asm b/igzip/igzip_set_long_icf_fg_06.asm index 39708ed..b36871c 100644 --- a/igzip/igzip_set_long_icf_fg_06.asm +++ b/igzip/igzip_set_long_icf_fg_06.asm @@ -142,6 +142,10 @@ %endif %define VECT_SIZE 16 +[bits 64] +default rel +section .text + global set_long_icf_fg_06 func(set_long_icf_fg_06) FUNC_SAVE diff --git a/igzip/igzip_update_histogram.asm b/igzip/igzip_update_histogram.asm index 34ecaf1..e1939ad 100644 --- a/igzip/igzip_update_histogram.asm +++ b/igzip/igzip_update_histogram.asm @@ -249,6 +249,10 @@ _hash_offset equ (_dist_offset + 8 * DIST_LEN) cmovle %%dist_coded, %%dist %endm +[bits 64] +default rel +section .text + ; void isal_update_histogram global isal_update_histogram_ %+ ARCH isal_update_histogram_ %+ ARCH %+ : diff --git a/igzip/proc_heap.asm b/igzip/proc_heap.asm index 40b18ab..5ed9c8e 100644 --- a/igzip/proc_heap.asm +++ b/igzip/proc_heap.asm @@ -54,6 +54,10 @@ %define i r11 %define tmp2 r12 +[bits 64] +default rel +section .text + global build_huff_tree build_huff_tree: %ifidn __OUTPUT_FORMAT__, win64 diff --git a/igzip/rfc1951_lookup.asm b/igzip/rfc1951_lookup.asm index ebf81aa..0701402 100644 --- a/igzip/rfc1951_lookup.asm +++ b/igzip/rfc1951_lookup.asm @@ -45,7 +45,7 @@ section .data ;; uint16_t len_start[32]; ;; }; -global rfc1951_lookup_table:ISAL_SYM_TYPE_DATA_INTERNAL +mk_global rfc1951_lookup_table, data, internal rfc1951_lookup_table: len_to_code: db 0x00, 0x00, 0x00 diff --git a/include/multibinary.asm b/include/multibinary.asm index bd3a529..16838cb 100644 --- a/include/multibinary.asm +++ b/include/multibinary.asm @@ -69,7 +69,7 @@ mbin_def_ptr %1_mbinit section .text - global %1:ISAL_SYM_TYPE_FUNCTION + mk_global %1, function %1_mbinit: ;;; only called the first time to setup hardware match call %1_dispatch_init diff --git a/include/reg_sizes.asm b/include/reg_sizes.asm index fec6a8a..37d61f8 100644 --- a/include/reg_sizes.asm +++ b/include/reg_sizes.asm @@ -30,14 +30,6 @@ %ifndef _REG_SIZES_ASM_ %define _REG_SIZES_ASM_ -%ifdef __NASM_VER__ -%ifidn __OUTPUT_FORMAT__, win64 -%error nasm not supported in windows -%else -%define endproc_frame -%endif -%endif - %ifndef AS_FEATURE_LEVEL %define AS_FEATURE_LEVEL 4 %endif @@ -220,19 +212,57 @@ section .text %define WRT_OPT %endif +%macro mk_global 1-3 + %ifdef __NASM_VER__ + %ifidn __OUTPUT_FORMAT__, macho64 + global %1 + %elifidn __OUTPUT_FORMAT__, win64 + global %1 + %else + global %1:%2 %3 + %endif + %else + global %1:%2 %3 + %endif +%endmacro + + +; Fixes for nasm lack of MS proc helpers +%ifdef __NASM_VER__ + %ifidn __OUTPUT_FORMAT__, win64 + %macro alloc_stack 1 + sub rsp, %1 + %endmacro + + %macro proc_frame 1 + %1: + %endmacro + + %macro save_xmm128 2 + movdqa [rsp + %2], %1 + %endmacro + + %macro save_reg 2 + mov [rsp + %2], %1 + %endmacro + + %macro rex_push_reg 1 + push %1 + %endmacro + + %macro push_reg 1 + push %1 + %endmacro + + %define end_prolog + %endif + + %define endproc_frame +%endif + %ifidn __OUTPUT_FORMAT__, macho64 %define elf64 macho64 mac_equ equ 1 - %ifdef __NASM_VER__ - %define ISAL_SYM_TYPE_FUNCTION - %define ISAL_SYM_TYPE_DATA_INTERNAL - %else - %define ISAL_SYM_TYPE_FUNCTION function - %define ISAL_SYM_TYPE_DATA_INTERNAL data internal - %endif -%else - %define ISAL_SYM_TYPE_FUNCTION function - %define ISAL_SYM_TYPE_DATA_INTERNAL data internal %endif %macro slversion 4 diff --git a/mem/mem_zero_detect_avx.asm b/mem/mem_zero_detect_avx.asm index 871b652..e85e08d 100644 --- a/mem/mem_zero_detect_avx.asm +++ b/mem/mem_zero_detect_avx.asm @@ -73,7 +73,7 @@ default rel section .text align 16 -global mem_zero_detect_avx:ISAL_SYM_TYPE_FUNCTION +mk_global mem_zero_detect_avx, function func(mem_zero_detect_avx) FUNC_SAVE mov pos, 0 diff --git a/mem/mem_zero_detect_sse.asm b/mem/mem_zero_detect_sse.asm index 63dad4f..78350aa 100644 --- a/mem/mem_zero_detect_sse.asm +++ b/mem/mem_zero_detect_sse.asm @@ -73,7 +73,7 @@ default rel section .text align 16 -global mem_zero_detect_sse:ISAL_SYM_TYPE_FUNCTION +mk_global mem_zero_detect_sse, function func(mem_zero_detect_sse) FUNC_SAVE mov pos, 0 diff --git a/raid/pq_check_sse.asm b/raid/pq_check_sse.asm index 57cab3a..ca32051 100644 --- a/raid/pq_check_sse.asm +++ b/raid/pq_check_sse.asm @@ -122,7 +122,7 @@ default rel section .text align 16 -global pq_check_sse:ISAL_SYM_TYPE_FUNCTION +mk_global pq_check_sse, function func(pq_check_sse) FUNC_SAVE sub vec, 3 ;Keep as offset to last source diff --git a/raid/pq_check_sse_i32.asm b/raid/pq_check_sse_i32.asm index 1c3b95d..f05d43a 100644 --- a/raid/pq_check_sse_i32.asm +++ b/raid/pq_check_sse_i32.asm @@ -141,7 +141,7 @@ section .text align 16 -global pq_check_sse:ISAL_SYM_TYPE_FUNCTION +mk_global pq_check_sse, function func(pq_check_sse) FUNC_SAVE sub vec, 3 ;Keep as offset to last source diff --git a/raid/pq_gen_avx.asm b/raid/pq_gen_avx.asm index 513530c..57d2b22 100644 --- a/raid/pq_gen_avx.asm +++ b/raid/pq_gen_avx.asm @@ -125,7 +125,7 @@ default rel section .text align 16 -global pq_gen_avx:ISAL_SYM_TYPE_FUNCTION +mk_global pq_gen_avx, function func(pq_gen_avx) FUNC_SAVE sub vec, 3 ;Keep as offset to last source diff --git a/raid/pq_gen_avx2.asm b/raid/pq_gen_avx2.asm index 2222151..7def9ea 100644 --- a/raid/pq_gen_avx2.asm +++ b/raid/pq_gen_avx2.asm @@ -126,7 +126,7 @@ default rel section .text align 16 -global pq_gen_avx2:ISAL_SYM_TYPE_FUNCTION +mk_global pq_gen_avx2, function func(pq_gen_avx2) FUNC_SAVE sub vec, 3 ;Keep as offset to last source diff --git a/raid/pq_gen_avx512.asm b/raid/pq_gen_avx512.asm index 639cef2..9ec6584 100644 --- a/raid/pq_gen_avx512.asm +++ b/raid/pq_gen_avx512.asm @@ -123,7 +123,7 @@ default rel section .text align 16 -global pq_gen_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global pq_gen_avx512, function func(pq_gen_avx512) FUNC_SAVE sub vec, 3 ;Keep as offset to last source diff --git a/raid/pq_gen_sse.asm b/raid/pq_gen_sse.asm index f95e75a..4c5a349 100644 --- a/raid/pq_gen_sse.asm +++ b/raid/pq_gen_sse.asm @@ -122,7 +122,7 @@ default rel section .text align 16 -global pq_gen_sse:ISAL_SYM_TYPE_FUNCTION +mk_global pq_gen_sse, function func(pq_gen_sse) FUNC_SAVE sub vec, 3 ;Keep as offset to last source diff --git a/raid/pq_gen_sse_i32.asm b/raid/pq_gen_sse_i32.asm index 57064b7..7a918f4 100644 --- a/raid/pq_gen_sse_i32.asm +++ b/raid/pq_gen_sse_i32.asm @@ -140,7 +140,7 @@ section .text align 16 -global pq_gen_sse:ISAL_SYM_TYPE_FUNCTION +mk_global pq_gen_sse, function func(pq_gen_sse) FUNC_SAVE sub vec, 3 ;Keep as offset to last source diff --git a/raid/raid_multibinary.asm b/raid/raid_multibinary.asm index 3180627..c84e5ef 100644 --- a/raid/raid_multibinary.asm +++ b/raid/raid_multibinary.asm @@ -72,7 +72,7 @@ section .text ;;;; ; pq_check multibinary function ;;;; -global pq_check:ISAL_SYM_TYPE_FUNCTION +mk_global pq_check, function pq_check_mbinit: call pq_check_dispatch_init pq_check: @@ -104,7 +104,7 @@ pq_check_dispatch_init: ;;;; ; xor_check multibinary function ;;;; -global xor_check:ISAL_SYM_TYPE_FUNCTION +mk_global xor_check, function xor_check_mbinit: call xor_check_dispatch_init xor_check: diff --git a/raid/xor_check_sse.asm b/raid/xor_check_sse.asm index 395ee20..9620412 100644 --- a/raid/xor_check_sse.asm +++ b/raid/xor_check_sse.asm @@ -137,7 +137,7 @@ section .text align 16 -global xor_check_sse:ISAL_SYM_TYPE_FUNCTION +mk_global xor_check_sse, function func(xor_check_sse) FUNC_SAVE %ifidn PS,8 ;64-bit code diff --git a/raid/xor_gen_avx.asm b/raid/xor_gen_avx.asm index c1e5be0..cddd539 100644 --- a/raid/xor_gen_avx.asm +++ b/raid/xor_gen_avx.asm @@ -100,7 +100,7 @@ default rel section .text align 16 -global xor_gen_avx:ISAL_SYM_TYPE_FUNCTION +mk_global xor_gen_avx, function func(xor_gen_avx) FUNC_SAVE diff --git a/raid/xor_gen_avx512.asm b/raid/xor_gen_avx512.asm index 4beae09..552c590 100644 --- a/raid/xor_gen_avx512.asm +++ b/raid/xor_gen_avx512.asm @@ -103,7 +103,7 @@ default rel section .text align 16 -global xor_gen_avx512:ISAL_SYM_TYPE_FUNCTION +mk_global xor_gen_avx512, function func(xor_gen_avx512) FUNC_SAVE sub vec, 2 ;Keep as offset to last source diff --git a/raid/xor_gen_sse.asm b/raid/xor_gen_sse.asm index a1c16c7..7509548 100644 --- a/raid/xor_gen_sse.asm +++ b/raid/xor_gen_sse.asm @@ -137,7 +137,7 @@ section .text align 16 -global xor_gen_sse:ISAL_SYM_TYPE_FUNCTION +mk_global xor_gen_sse, function func(xor_gen_sse) FUNC_SAVE %ifidn PS,8 ;64-bit code