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aarch64_multibinary.h: Fix -Wasm-operand-widths

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Compilation with clang gave warnings as per below.
Arm64 is has a width of 64 bit and these warnings came up.

In file included from igzip/aarch64/igzip_multibinary_aarch64_dispatcher.c:29:
./include/aarch64_multibinary.h:338:35: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths]
                asm("mrs %0, MIDR_EL1 " : "=r" (id));
                                                ^
./include/aarch64_multibinary.h:338:12: note: use constraint modifier "w"
                asm("mrs %0, MIDR_EL1 " : "=r" (id));
                         ^~
                         %w0
1 warning generated.
In file included from mem/aarch64/mem_aarch64_dispatcher.c:29:
./include/aarch64_multibinary.h:338:35: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths]
                asm("mrs %0, MIDR_EL1 " : "=r" (id));
                                                ^
./include/aarch64_multibinary.h:338:12: note: use constraint modifier "w"
                asm("mrs %0, MIDR_EL1 " : "=r" (id));
                         ^~
                         %w0
1 warning generated.

Signed-off-by: Bernd Schubert <bschubert@ddn.com>
This commit is contained in:
Bernd Schubert 2024-04-25 10:10:51 +00:00 committed by Pablo de Lara
parent 4e898eced6
commit dbaf284e11
1 changed files with 1 additions and 1 deletions
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include/aarch64_multibinary.h
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@ -331,7 +331,7 @@ static inline int sysctlEnabled(const char* name){
*/
static inline uint32_t get_micro_arch_id(void)
{
uint32_t id=CPU_IMPLEMENTER_RESERVE;
uint64_t id=CPU_IMPLEMENTER_RESERVE;
#ifndef __APPLE__
if ((getauxval(AT_HWCAP) & HWCAP_CPUID)) {
/** Here will trap into kernel space */