mirror of
https://github.com/intel/isa-l.git
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erasure_code: add AVX2 3vect mad with GFNI implementation
Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>
This commit is contained in:
Marcel Cornu
Pablo de Lara
parent
a139dd7302
commit
22b7f33d68
@ -87,6 +87,7 @@ objs = \
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bin\ec_multibinary.obj \
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bin\ec_multibinary.obj \
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bin\gf_vect_mad_avx2_gfni.obj \
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bin\gf_vect_mad_avx2_gfni.obj \
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bin\gf_2vect_mad_avx2_gfni.obj \
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bin\gf_2vect_mad_avx2_gfni.obj \
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bin\gf_3vect_mad_avx2_gfni.obj \
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bin\gf_vect_dot_prod_avx512.obj \
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bin\gf_vect_dot_prod_avx512.obj \
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bin\gf_2vect_dot_prod_avx512.obj \
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bin\gf_2vect_dot_prod_avx512.obj \
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bin\gf_3vect_dot_prod_avx512.obj \
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bin\gf_3vect_dot_prod_avx512.obj \
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@ -80,6 +80,7 @@ lsrc_x86_64 += \
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lsrc_x86_64 += \
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lsrc_x86_64 += \
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erasure_code/gf_vect_mad_avx2_gfni.asm \
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erasure_code/gf_vect_mad_avx2_gfni.asm \
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erasure_code/gf_2vect_mad_avx2_gfni.asm \
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erasure_code/gf_2vect_mad_avx2_gfni.asm \
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erasure_code/gf_3vect_mad_avx2_gfni.asm \
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erasure_code/gf_vect_dot_prod_avx512.asm \
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erasure_code/gf_vect_dot_prod_avx512.asm \
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erasure_code/gf_2vect_dot_prod_avx512.asm \
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erasure_code/gf_2vect_dot_prod_avx512.asm \
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erasure_code/gf_3vect_dot_prod_avx512.asm \
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erasure_code/gf_3vect_dot_prod_avx512.asm \
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@ -277,6 +277,8 @@ extern void gf_vect_mad_avx2_gfni(int len, int vec, int vec_i, unsigned char *gf
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unsigned char *src, unsigned char *dest);
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unsigned char *src, unsigned char *dest);
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extern void gf_2vect_mad_avx2_gfni(int len, int vec, int vec_i, unsigned char *gftbls,
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extern void gf_2vect_mad_avx2_gfni(int len, int vec, int vec_i, unsigned char *gftbls,
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unsigned char *src, unsigned char **dest);
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unsigned char *src, unsigned char **dest);
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extern void gf_3vect_mad_avx2_gfni(int len, int vec, int vec_i, unsigned char *gftbls,
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unsigned char *src, unsigned char **dest);
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void ec_init_tables_gfni(int k, int rows, unsigned char *a, unsigned char *g_tbls)
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void ec_init_tables_gfni(int k, int rows, unsigned char *a, unsigned char *g_tbls)
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{
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{
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@ -380,17 +382,22 @@ void ec_encode_data_update_avx2_gfni(int len, int k, int rows, int vec_i,
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unsigned char *g_tbls, unsigned char *data,
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unsigned char *g_tbls, unsigned char *data,
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unsigned char **coding)
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unsigned char **coding)
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{
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{
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while (rows >= 2) {
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while (rows >= 3) {
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gf_2vect_mad_avx2_gfni(len, k, vec_i, g_tbls, data, coding);
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gf_3vect_mad_avx2_gfni(len, k, vec_i, g_tbls, data, coding);
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g_tbls += 2 * k * 8;
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g_tbls += 3 * k * 8;
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coding += 2;
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coding += 3;
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rows -= 2;
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rows -= 3;
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}
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}
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while (rows) {
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switch (rows) {
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case 2:
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gf_2vect_mad_avx2_gfni(len, k, vec_i, g_tbls, data, coding);
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break;
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case 1:
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gf_vect_mad_avx2_gfni(len, k, vec_i, g_tbls, data, *coding);
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gf_vect_mad_avx2_gfni(len, k, vec_i, g_tbls, data, *coding);
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g_tbls += k * 8;
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break;
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coding++;
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case 0:
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rows--;
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default:
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break;
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}
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}
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}
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}
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276
erasure_code/gf_3vect_mad_avx2_gfni.asm
Normal file
276
erasure_code/gf_3vect_mad_avx2_gfni.asm
Normal file
@ -0,0 +1,276 @@
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright(c) 2023 Intel Corporation All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; * Neither the name of Intel Corporation nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;
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;;; gf_3vect_mad_avx2_gfni(len, vec, vec_i, mul_array, src, dest);
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;;;
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%include "reg_sizes.asm"
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%include "gf_vect_gfni.inc"
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%include "memcpy.asm"
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%if AS_FEATURE_LEVEL >= 10
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%ifidn __OUTPUT_FORMAT__, elf64
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%define arg0 rdi
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%define arg1 rsi
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%define arg2 rdx
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%define arg3 rcx
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%define arg4 r8
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%define arg5 r9
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%define tmp r11
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%define tmp2 r10
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%define func(x) x: endbranch
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%define FUNC_SAVE
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%define FUNC_RESTORE
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%endif
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%ifidn __OUTPUT_FORMAT__, win64
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%define arg0 rcx
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%define arg1 rdx
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%define arg2 r8
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%define arg3 r9
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%define arg4 r12 ; must be saved, loaded and restored
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%define arg5 r13 ; must be saved and restored
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%define tmp r11
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%define tmp2 r10
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%define stack_size 16*10 + 3*8
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%define arg(x) [rsp + stack_size + 8 + 8*x]
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%define func(x) proc_frame x
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%macro FUNC_SAVE 0
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sub rsp, stack_size
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vmovdqa [rsp + 0*16], xmm6
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vmovdqa [rsp + 1*16], xmm7
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vmovdqa [rsp + 2*16], xmm8
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vmovdqa [rsp + 3*16], xmm9
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vmovdqa [rsp + 4*16], xmm10
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vmovdqa [rsp + 5*16], xmm11
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vmovdqa [rsp + 6*16], xmm12
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vmovdqa [rsp + 7*16], xmm13
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vmovdqa [rsp + 8*16], xmm14
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vmovdqa [rsp + 9*16], xmm15
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mov [rsp + 10*16 + 0*8], r12
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mov [rsp + 10*16 + 1*8], r13
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end_prolog
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mov arg4, arg(4)
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mov arg5, arg(5)
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%endmacro
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%macro FUNC_RESTORE 0
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vmovdqa xmm6, [rsp + 0*16]
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vmovdqa xmm7, [rsp + 1*16]
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vmovdqa xmm8, [rsp + 2*16]
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vmovdqa xmm9, [rsp + 3*16]
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vmovdqa xmm10, [rsp + 4*16]
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vmovdqa xmm11, [rsp + 5*16]
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vmovdqa xmm12, [rsp + 6*16]
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vmovdqa xmm13, [rsp + 7*16]
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vmovdqa xmm14, [rsp + 8*16]
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vmovdqa xmm15, [rsp + 9*16]
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mov r12, [rsp + 10*16 + 0*8]
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mov r13, [rsp + 10*16 + 1*8]
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add rsp, stack_size
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%endmacro
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%endif
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%define len arg0
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%define vec arg1
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%define vec_i arg2
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%define mul_array arg3
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%define src arg4
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%define dest1 arg5
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%define pos rax
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%define dest2 mul_array
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%define dest3 vec_i
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%ifndef EC_ALIGNED_ADDR
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;;; Use Un-aligned load/store
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%define XLDR vmovdqu
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%define XSTR vmovdqu
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%else
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;;; Use Non-temporal load/stor
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%ifdef NO_NT_LDST
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%define XLDR vmovdqa
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%define XSTR vmovdqa
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%else
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%define XLDR vmovntdqa
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%define XSTR vmovntdq
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%endif
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%endif
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default rel
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[bits 64]
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section .text
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%define x0l ymm0
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%define x0h ymm0 ; reuse ymm0
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%define xgft1 ymm1
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%define xgft2 ymm2
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%define xgft3 ymm3
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%define xd1l ymm4
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%define xd1h ymm5
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%define xd2l ymm6
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%define xd2h ymm7
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%define xd3l ymm8
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%define xd3h ymm9
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%define xret1l ymm10
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%define xret1h ymm11
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%define xret2l ymm12
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%define xret2h ymm13
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%define xret3l ymm14
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%define xret3h ymm15
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%define x0 x0l
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%define xd1 xd1l
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%define xd2 xd2l
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%define xd3 xd3l
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%define xret1 xret1l
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%define xret2 xret2l
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%define xret3 xret3l
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;;
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;; Encodes 64 bytes of a single source into 3x 64 bytes (parity disks)
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;;
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%macro ENCODE_64B_3 0
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; get next source vector
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XLDR x0l, [src + pos] ;; read low 32 bytes
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; get next dest vectors
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XLDR xd1l, [dest1 + pos]
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XLDR xd1h, [dest1 + pos + 32]
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XLDR xd2l, [dest2 + pos]
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XLDR xd2h, [dest2 + pos + 32]
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XLDR xd3l, [dest3 + pos]
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XLDR xd3h, [dest3 + pos + 32]
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GF_MUL_XOR VEX, x0l, xgft1, xret1l, xd1l, xgft2, xret2l, xd2l, xgft3, xret3l, xd3l
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XLDR x0h, [src + pos + 32] ;; read high 32 bytes
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GF_MUL_XOR VEX, x0h, xgft1, xret1h, xd1h, xgft2, xret2h, xd2h, xgft3, xret3h, xd3h
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XSTR [dest1 + pos], xd1l
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XSTR [dest1 + pos + 32], xd1h
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XSTR [dest2 + pos], xd2l
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XSTR [dest2 + pos + 32], xd2h
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XSTR [dest3 + pos], xd3l
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XSTR [dest3 + pos + 32], xd3h
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%endmacro
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;;
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;; Encodes 32 bytes of a single source into 3x 32 bytes (parity disks)
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;;
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%macro ENCODE_32B_3 0
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; get next source vector
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XLDR x0, [src + pos]
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; get next dest vectors
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XLDR xd1, [dest1 + pos]
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XLDR xd2, [dest2 + pos]
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XLDR xd3, [dest3 + pos]
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GF_MUL_XOR VEX, x0, xgft1, xret1, xd1, xgft2, xret2, xd2, xgft3, xret3, xd3
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XSTR [dest1 + pos], xd1
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XSTR [dest2 + pos], xd2
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XSTR [dest3 + pos], xd3
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%endmacro
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;;
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;; Encodes less than 32 bytes of a single source into 3x parity disks
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;;
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%macro ENCODE_LT_32B_3 1
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%define %%LEN %1
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; get next source vector
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simd_load_avx2 x0, src + pos, %%LEN, tmp, tmp2
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; get next dest vectors
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simd_load_avx2 xd1, dest1 + pos, %%LEN, tmp, tmp2
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simd_load_avx2 xd2, dest2 + pos, %%LEN, tmp, tmp2
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simd_load_avx2 xd3, dest3 + pos, %%LEN, tmp, tmp2
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GF_MUL_XOR VEX, x0, xgft1, xret1, xd1, xgft2, xret2, xd2, xgft3, xret3, xd3
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lea dest1, [dest1 + pos]
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simd_store_avx2 dest1, xd1, %%LEN, tmp, tmp2
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lea dest2, [dest2 + pos]
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simd_store_avx2 dest2, xd2, %%LEN, tmp, tmp2
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lea dest3, [dest3 + pos]
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simd_store_avx2 dest3, xd3, %%LEN, tmp, tmp2
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%endmacro
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align 16
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mk_global gf_3vect_mad_avx2_gfni, function
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func(gf_3vect_mad_avx2_gfni)
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FUNC_SAVE
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xor pos, pos
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shl vec_i, 3 ;Multiply by 8
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shl vec, 3 ;Multiply by 8
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lea tmp, [mul_array + vec_i]
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vbroadcastsd xgft1, [tmp]
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vbroadcastsd xgft2, [tmp + vec]
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vbroadcastsd xgft3, [tmp + vec*2]
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mov dest2, [dest1 + 8] ; reuse mul_array
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mov dest3, [dest1 + 2*8] ; reuse vec_i
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mov dest1, [dest1]
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cmp len, 64
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jb .len_lt_64
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.loop64:
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ENCODE_64B_3 ;; loop on 64 bytes at a time
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add pos, 64
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sub len, 64
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cmp len, 64
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jge .loop64
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.len_lt_64:
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cmp len, 32
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jb .len_lt_32
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ENCODE_32B_3 ;; encode next 32 bytes
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add pos, 32
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sub len, 32
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.len_lt_32:
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cmp len, 0
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jle .exit
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ENCODE_LT_32B_3 len ;; encode final bytes
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.exit:
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vzeroupper
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FUNC_RESTORE
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ret
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endproc_frame
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%endif ; if AS_FEATURE_LEVEL >= 10
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