isa-l/erasure_code/gf_vect_gfni.inc

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;
; Multiply 1 source register to up to 6 different GF table registers
; and XOR the results to partial registers
;
%macro GF_MUL_XOR 5-20
%define %%ENCODING %1
%define %%SRC      %2
%define %%GFTABLE1 %3
%define %%TMP1     %4
%define %%PARTIAL1 %5
%define %%GFTABLE2 %6
%define %%TMP2     %7
%define %%PARTIAL2 %8
%define %%GFTABLE3 %9
%define %%TMP3     %10
%define %%PARTIAL3 %11
%define %%GFTABLE4 %12
%define %%TMP4     %13
%define %%PARTIAL4 %14
%define %%GFTABLE5 %15
%define %%TMP5     %16
%define %%PARTIAL5 %17
%define %%GFTABLE6 %18
%define %%TMP6     %19
%define %%PARTIAL6 %20

%define %%N_BLOCKS ((%0 - 2) / 3)

%assign %%I 1
%rep %%N_BLOCKS
        vgf2p8affineqb  %%TMP %+ %%I, %%SRC, %%GFTABLE %+ %%I, 0x00
%assign %%I (%%I + 1)
%endrep
%assign %%I 1
%rep %%N_BLOCKS
%ifidn %%ENCODING, VEX
        vpxor           %%PARTIAL %+ %%I, %%TMP %+ %%I
%else
        vpxorq          %%PARTIAL %+ %%I, %%TMP %+ %%I
%endif
%assign %%I (%%I + 1)
%endrep
%endmacro