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%include "reg_sizes.asm"
%include "multibinary.asm"

default rel
[bits 64]

extern pq_gen_base
extern pq_gen_sse
extern pq_gen_avx
extern pq_gen_avx2

extern xor_gen_base
extern xor_gen_sse
extern xor_gen_avx

extern pq_check_base
extern pq_check_sse

extern xor_check_base
extern xor_check_sse

extern xor_gen_avx512
extern pq_gen_avx512

extern pq_gen_avx512_gfni
extern pq_gen_avx2_gfni

mbin_interface xor_gen
mbin_interface pq_gen


mbin_dispatch_init6 xor_gen, xor_gen_base, xor_gen_sse, xor_gen_avx, xor_gen_avx, xor_gen_avx512
mbin_dispatch_init8 pq_gen, pq_gen_base, pq_gen_sse, pq_gen_avx, pq_gen_avx2, pq_gen_avx512, pq_gen_avx2_gfni, pq_gen_avx512_gfni

section .data

xor_check_dispatched:
	dq      xor_check_mbinit
pq_check_dispatched:
	dq      pq_check_mbinit

section .text

;;;;
; pq_check multibinary function
;;;;
mk_global  pq_check, function
pq_check_mbinit:
	endbranch
	call	pq_check_dispatch_init
pq_check:
	endbranch
	jmp     qword [pq_check_dispatched]

pq_check_dispatch_init:
	push    rax
	push    rbx
	push    rcx
	push    rdx
	push    rsi
	lea     rsi, [pq_check_base WRT_OPT] ; Default

	mov     eax, 1
	cpuid
	test    ecx, FLAG_CPUID1_ECX_SSE4_1
	lea     rbx, [pq_check_sse WRT_OPT]
	cmovne	rsi, rbx

	mov     [pq_check_dispatched], rsi
	pop     rsi
	pop     rdx
	pop     rcx
	pop     rbx
	pop     rax
	ret


;;;;
; xor_check multibinary function
;;;;
mk_global  xor_check, function
xor_check_mbinit:
	endbranch
	call    xor_check_dispatch_init
xor_check:
	endbranch
	jmp     qword [xor_check_dispatched]

xor_check_dispatch_init:
	push    rax
	push    rbx
	push    rcx
	push    rdx
	push    rsi
	lea     rsi, [xor_check_base WRT_OPT] ; Default

	mov     eax, 1
	cpuid
	test    ecx, FLAG_CPUID1_ECX_SSE4_1
	lea     rbx, [xor_check_sse WRT_OPT]
	cmovne  rsi, rbx

	mov     [xor_check_dispatched], rsi
	pop     rsi
	pop     rdx
	pop     rcx
	pop     rbx
	pop     rax
	ret
