05c062e9da
AS libavcodec/arm/ac3dsp_armv6.o ffmpeg-src/libavcodec/arm/ac3dsp_armv6.S: Assembler messages: ffmpeg-src/libavcodec/arm/ac3dsp_armv6.S:40: Error: selected processor does not support `movw r8,#0x1fe0' make[1]: *** [libavcodec/arm/ac3dsp_armv6.o] Error 1 MOVW is ARMv7 way to load constant: * movw, or move wide, will move a 16-bit constant into a register, implicitly zeroing the top 16 bits of the target register. * movt, or move top, will move a 16-bit constant into the top half of a given register without altering the bottom 16 bits To load 32 bit constant, movw lower16; movt upper16; is better than ldr if available, because: While this approach takes two instructions, it does not require any extra space to store the constant so both the movw/movt method and the ldr method will end up using the same amount of memory. Memory bandwidth is precious in and the movw/movt approach avoids an extra read on the data side, not to mention the read could have missed the cache. But here it is armv6 optimization, so that we have to use ldr. Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
84 lines
3.4 KiB
ArmAsm
84 lines
3.4 KiB
ArmAsm
/*
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* Copyright (c) 2011 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of Libav.
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*
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* Libav is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* Libav is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with Libav; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "asm.S"
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function ff_ac3_bit_alloc_calc_bap_armv6, export=1
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ldr r12, [sp]
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cmp r12, #-960
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beq 4f
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push {r4-r11,lr}
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add r5, sp, #40
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movrel r4, X(ff_ac3_bin_to_band_tab)
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movrel lr, X(ff_ac3_band_start_tab)
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ldm r5, {r5-r7}
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ldrb r4, [r4, r2]
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add r1, r1, r2, lsl #1 @ psd + start
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add r0, r0, r4, lsl #1 @ mask + band
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add r4, lr, r4
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add r7, r7, r2 @ bap + start
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ldrb r10, [r4], #1
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1:
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ldrsh r9, [r0], #2 @ mask[band]
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ldr r8, =0x1fe0
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sub r9, r9, r12 @ - snr_offset
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mov r11, r10
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ldrb r10, [r4], #1 @ band_start_tab[band++]
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subs r9, r9, r5 @ - floor
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movlt r9, #0
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cmp r10, r3 @ - end
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and r9, r9, r8 @ & 0x1fe0
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subgt r8, r3, r11
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suble r8, r10, r11
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add r9, r9, r5 @ + floor => m
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tst r8, #1
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add r2, r7, r8
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bne 3f
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b 5f
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2:
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ldrsh r8, [r1], #2
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ldrsh lr, [r1], #2
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sub r8, r8, r9
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sub lr, lr, r9
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usat r8, #6, r8, asr #5 @ address
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usat lr, #6, lr, asr #5
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ldrb r8, [r6, r8] @ bap_tab[address]
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ldrb lr, [r6, lr]
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strb r8, [r7], #1 @ bap[bin]
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strb lr, [r7], #1
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5: cmp r7, r2
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blo 2b
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cmp r3, r11
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bgt 1b
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pop {r4-r11,pc}
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3:
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ldrsh r8, [r1], #2 @ psd[bin]
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sub r8, r8, r9 @ - m
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usat r8, #6, r8, asr #5 @ address
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ldrb r8, [r6, r8] @ bap_tab[address]
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strb r8, [r7], #1 @ bap[bin]
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b 5b
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4:
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ldr r0, [sp, #12]
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mov r1, #0
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mov r2, #256
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b memset
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endfunc
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