394 lines
15 KiB
C
394 lines
15 KiB
C
/*
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* XVID MPEG-4 VIDEO CODEC
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* - SSE2 inverse discrete cosine transform -
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*
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* Copyright(C) 2003 Pascal Massimino <skal@planet-d.net>
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*
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* Conversion to gcc syntax with modifications
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* by Alexander Strange <astrange@ithinksw.com>
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*
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* Originally from dct/x86_asm/fdct_sse2_skal.asm in Xvid.
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*
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* This file is part of FFmpeg.
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*
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* Vertical pass is an implementation of the scheme:
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* Loeffler C., Ligtenberg A., and Moschytz C.S.:
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* Practical Fast 1D DCT Algorithm with Eleven Multiplications,
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* Proc. ICASSP 1989, 988-991.
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*
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* Horizontal pass is a double 4x4 vector/matrix multiplication,
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* (see also Intel's Application Note 922:
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* http://developer.intel.com/vtune/cbts/strmsimd/922down.htm
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* Copyright (C) 1999 Intel Corporation)
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*
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* More details at http://skal.planet-d.net/coding/dct.html
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with FFmpeg; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "dsputil.h"
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/*!
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* @file idct_sse2_xvid.c
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* @brief SSE2 idct compatible with xvidmmx
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*/
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#define X8(x) x,x,x,x,x,x,x,x
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#define ROW_SHIFT 11
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#define COL_SHIFT 6
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DECLARE_ASM_CONST(16, int16_t, tan1[]) = {X8(13036)}; // tan( pi/16)
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DECLARE_ASM_CONST(16, int16_t, tan2[]) = {X8(27146)}; // tan(2pi/16) = sqrt(2)-1
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DECLARE_ASM_CONST(16, int16_t, tan3[]) = {X8(43790)}; // tan(3pi/16)-1
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DECLARE_ASM_CONST(16, int16_t, sqrt2[])= {X8(23170)}; // 0.5/sqrt(2)
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DECLARE_ASM_CONST(8, uint8_t, m127[]) = {X8(127)};
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DECLARE_ASM_CONST(16, int16_t, iTab1[]) = {
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0x4000, 0x539f, 0xc000, 0xac61, 0x4000, 0xdd5d, 0x4000, 0xdd5d,
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0x4000, 0x22a3, 0x4000, 0x22a3, 0xc000, 0x539f, 0x4000, 0xac61,
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0x3249, 0x11a8, 0x4b42, 0xee58, 0x11a8, 0x4b42, 0x11a8, 0xcdb7,
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0x58c5, 0x4b42, 0xa73b, 0xcdb7, 0x3249, 0xa73b, 0x4b42, 0xa73b
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};
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DECLARE_ASM_CONST(16, int16_t, iTab2[]) = {
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0x58c5, 0x73fc, 0xa73b, 0x8c04, 0x58c5, 0xcff5, 0x58c5, 0xcff5,
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0x58c5, 0x300b, 0x58c5, 0x300b, 0xa73b, 0x73fc, 0x58c5, 0x8c04,
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0x45bf, 0x187e, 0x6862, 0xe782, 0x187e, 0x6862, 0x187e, 0xba41,
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0x7b21, 0x6862, 0x84df, 0xba41, 0x45bf, 0x84df, 0x6862, 0x84df
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};
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DECLARE_ASM_CONST(16, int16_t, iTab3[]) = {
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0x539f, 0x6d41, 0xac61, 0x92bf, 0x539f, 0xd2bf, 0x539f, 0xd2bf,
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0x539f, 0x2d41, 0x539f, 0x2d41, 0xac61, 0x6d41, 0x539f, 0x92bf,
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0x41b3, 0x1712, 0x6254, 0xe8ee, 0x1712, 0x6254, 0x1712, 0xbe4d,
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0x73fc, 0x6254, 0x8c04, 0xbe4d, 0x41b3, 0x8c04, 0x6254, 0x8c04
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};
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DECLARE_ASM_CONST(16, int16_t, iTab4[]) = {
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0x4b42, 0x6254, 0xb4be, 0x9dac, 0x4b42, 0xd746, 0x4b42, 0xd746,
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0x4b42, 0x28ba, 0x4b42, 0x28ba, 0xb4be, 0x6254, 0x4b42, 0x9dac,
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0x3b21, 0x14c3, 0x587e, 0xeb3d, 0x14c3, 0x587e, 0x14c3, 0xc4df,
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0x6862, 0x587e, 0x979e, 0xc4df, 0x3b21, 0x979e, 0x587e, 0x979e
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};
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DECLARE_ASM_CONST(16, int32_t, walkenIdctRounders[]) = {
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65536, 65536, 65536, 65536,
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3597, 3597, 3597, 3597,
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2260, 2260, 2260, 2260,
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1203, 1203, 1203, 1203,
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120, 120, 120, 120,
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512, 512, 512, 512
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};
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// Temporary storage before the column pass
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#define ROW1 "%%xmm6"
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#define ROW3 "%%xmm4"
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#define ROW5 "%%xmm5"
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#define ROW7 "%%xmm7"
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#define CLEAR_ODD(r) "pxor "r","r" \n\t"
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#define PUT_ODD(dst) "pshufhw $0x1B, %%xmm2, "dst" \n\t"
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#ifdef ARCH_X86_64
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# define ROW0 "%%xmm8"
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# define REG0 ROW0
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# define ROW2 "%%xmm9"
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# define REG2 ROW2
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# define ROW4 "%%xmm10"
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# define REG4 ROW4
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# define ROW6 "%%xmm11"
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# define REG6 ROW6
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# define CLEAR_EVEN(r) CLEAR_ODD(r)
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# define PUT_EVEN(dst) PUT_ODD(dst)
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# define XMMS "%%xmm12"
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# define MOV_32_ONLY "#"
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# define SREG2 REG2
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# define TAN3 "%%xmm13"
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# define TAN1 "%%xmm14"
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#else
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# define ROW0 "(%0)"
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# define REG0 "%%xmm4"
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# define ROW2 "2*16(%0)"
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# define REG2 "%%xmm4"
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# define ROW4 "4*16(%0)"
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# define REG4 "%%xmm6"
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# define ROW6 "6*16(%0)"
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# define REG6 "%%xmm6"
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# define CLEAR_EVEN(r)
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# define PUT_EVEN(dst) \
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"pshufhw $0x1B, %%xmm2, %%xmm2 \n\t" \
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"movdqa %%xmm2, "dst" \n\t"
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# define XMMS "%%xmm2"
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# define MOV_32_ONLY "movdqa "
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# define SREG2 "%%xmm7"
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# define TAN3 "%%xmm0"
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# define TAN1 "%%xmm2"
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#endif
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#define ROUND(x) "paddd "MANGLE(x)
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#define JZ(reg, to) \
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"testl "reg","reg" \n\t" \
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"jz "to" \n\t"
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#define JNZ(reg, to) \
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"testl "reg","reg" \n\t" \
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"jnz "to" \n\t"
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#define TEST_ONE_ROW(src, reg, clear) \
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clear \
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"movq "src", %%mm1 \n\t" \
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"por 8+"src", %%mm1 \n\t" \
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"paddusb %%mm0, %%mm1 \n\t" \
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"pmovmskb %%mm1, "reg" \n\t"
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#define TEST_TWO_ROWS(row1, row2, reg1, reg2, clear1, clear2) \
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clear1 \
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clear2 \
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"movq "row1", %%mm1 \n\t" \
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"por 8+"row1", %%mm1 \n\t" \
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"movq "row2", %%mm2 \n\t" \
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"por 8+"row2", %%mm2 \n\t" \
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"paddusb %%mm0, %%mm1 \n\t" \
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"paddusb %%mm0, %%mm2 \n\t" \
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"pmovmskb %%mm1, "reg1" \n\t" \
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"pmovmskb %%mm2, "reg2" \n\t"
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///IDCT pass on rows.
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#define iMTX_MULT(src, table, rounder, put) \
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"movdqa "src", %%xmm3 \n\t" \
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"movdqa %%xmm3, %%xmm0 \n\t" \
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"pshufd $0x11, %%xmm3, %%xmm1 \n\t" /* 4602 */ \
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"punpcklqdq %%xmm0, %%xmm0 \n\t" /* 0246 */ \
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"pmaddwd "table", %%xmm0 \n\t" \
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"pmaddwd 16+"table", %%xmm1 \n\t" \
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"pshufd $0xBB, %%xmm3, %%xmm2 \n\t" /* 5713 */ \
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"punpckhqdq %%xmm3, %%xmm3 \n\t" /* 1357 */ \
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"pmaddwd 32+"table", %%xmm2 \n\t" \
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"pmaddwd 48+"table", %%xmm3 \n\t" \
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"paddd %%xmm1, %%xmm0 \n\t" \
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"paddd %%xmm3, %%xmm2 \n\t" \
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rounder", %%xmm0 \n\t" \
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"movdqa %%xmm2, %%xmm3 \n\t" \
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"paddd %%xmm0, %%xmm2 \n\t" \
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"psubd %%xmm3, %%xmm0 \n\t" \
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"psrad $11, %%xmm2 \n\t" \
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"psrad $11, %%xmm0 \n\t" \
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"packssdw %%xmm0, %%xmm2 \n\t" \
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put \
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"1: \n\t"
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#define iLLM_HEAD \
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"movdqa "MANGLE(tan3)", "TAN3" \n\t" \
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"movdqa "MANGLE(tan1)", "TAN1" \n\t" \
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///IDCT pass on columns.
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#define iLLM_PASS(dct) \
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"movdqa "TAN3", %%xmm1 \n\t" \
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"movdqa "TAN1", %%xmm3 \n\t" \
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"pmulhw %%xmm4, "TAN3" \n\t" \
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"pmulhw %%xmm5, %%xmm1 \n\t" \
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"paddsw %%xmm4, "TAN3" \n\t" \
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"paddsw %%xmm5, %%xmm1 \n\t" \
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"psubsw %%xmm5, "TAN3" \n\t" \
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"paddsw %%xmm4, %%xmm1 \n\t" \
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"pmulhw %%xmm7, %%xmm3 \n\t" \
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"pmulhw %%xmm6, "TAN1" \n\t" \
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"paddsw %%xmm6, %%xmm3 \n\t" \
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"psubsw %%xmm7, "TAN1" \n\t" \
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"movdqa %%xmm3, %%xmm7 \n\t" \
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"movdqa "TAN1", %%xmm6 \n\t" \
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"psubsw %%xmm1, %%xmm3 \n\t" \
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"psubsw "TAN3", "TAN1" \n\t" \
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"paddsw %%xmm7, %%xmm1 \n\t" \
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"paddsw %%xmm6, "TAN3" \n\t" \
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"movdqa %%xmm3, %%xmm6 \n\t" \
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"psubsw "TAN3", %%xmm3 \n\t" \
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"paddsw %%xmm6, "TAN3" \n\t" \
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"movdqa "MANGLE(sqrt2)", %%xmm4 \n\t" \
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"pmulhw %%xmm4, %%xmm3 \n\t" \
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"pmulhw %%xmm4, "TAN3" \n\t" \
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"paddsw "TAN3", "TAN3" \n\t" \
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"paddsw %%xmm3, %%xmm3 \n\t" \
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"movdqa "MANGLE(tan2)", %%xmm7 \n\t" \
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MOV_32_ONLY ROW2", "REG2" \n\t" \
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MOV_32_ONLY ROW6", "REG6" \n\t" \
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"movdqa %%xmm7, %%xmm5 \n\t" \
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"pmulhw "REG6", %%xmm7 \n\t" \
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"pmulhw "REG2", %%xmm5 \n\t" \
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"paddsw "REG2", %%xmm7 \n\t" \
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"psubsw "REG6", %%xmm5 \n\t" \
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MOV_32_ONLY ROW0", "REG0" \n\t" \
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MOV_32_ONLY ROW4", "REG4" \n\t" \
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MOV_32_ONLY" "TAN1", (%0) \n\t" \
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"movdqa "REG0", "XMMS" \n\t" \
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"psubsw "REG4", "REG0" \n\t" \
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"paddsw "XMMS", "REG4" \n\t" \
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"movdqa "REG4", "XMMS" \n\t" \
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"psubsw %%xmm7, "REG4" \n\t" \
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"paddsw "XMMS", %%xmm7 \n\t" \
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"movdqa "REG0", "XMMS" \n\t" \
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"psubsw %%xmm5, "REG0" \n\t" \
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"paddsw "XMMS", %%xmm5 \n\t" \
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"movdqa %%xmm5, "XMMS" \n\t" \
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"psubsw "TAN3", %%xmm5 \n\t" \
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"paddsw "XMMS", "TAN3" \n\t" \
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"movdqa "REG0", "XMMS" \n\t" \
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"psubsw %%xmm3, "REG0" \n\t" \
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"paddsw "XMMS", %%xmm3 \n\t" \
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MOV_32_ONLY" (%0), "TAN1" \n\t" \
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"psraw $6, %%xmm5 \n\t" \
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"psraw $6, "REG0" \n\t" \
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"psraw $6, "TAN3" \n\t" \
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"psraw $6, %%xmm3 \n\t" \
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"movdqa "TAN3", 1*16("dct") \n\t" \
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"movdqa %%xmm3, 2*16("dct") \n\t" \
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"movdqa "REG0", 5*16("dct") \n\t" \
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"movdqa %%xmm5, 6*16("dct") \n\t" \
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"movdqa %%xmm7, %%xmm0 \n\t" \
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"movdqa "REG4", %%xmm4 \n\t" \
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"psubsw %%xmm1, %%xmm7 \n\t" \
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"psubsw "TAN1", "REG4" \n\t" \
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"paddsw %%xmm0, %%xmm1 \n\t" \
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"paddsw %%xmm4, "TAN1" \n\t" \
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"psraw $6, %%xmm1 \n\t" \
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"psraw $6, %%xmm7 \n\t" \
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"psraw $6, "TAN1" \n\t" \
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"psraw $6, "REG4" \n\t" \
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"movdqa %%xmm1, ("dct") \n\t" \
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"movdqa "TAN1", 3*16("dct") \n\t" \
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"movdqa "REG4", 4*16("dct") \n\t" \
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"movdqa %%xmm7, 7*16("dct") \n\t"
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///IDCT pass on columns, assuming rows 4-7 are zero.
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#define iLLM_PASS_SPARSE(dct) \
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"pmulhw %%xmm4, "TAN3" \n\t" \
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"paddsw %%xmm4, "TAN3" \n\t" \
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"movdqa %%xmm6, %%xmm3 \n\t" \
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"pmulhw %%xmm6, "TAN1" \n\t" \
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"movdqa %%xmm4, %%xmm1 \n\t" \
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"psubsw %%xmm1, %%xmm3 \n\t" \
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"paddsw %%xmm6, %%xmm1 \n\t" \
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"movdqa "TAN1", %%xmm6 \n\t" \
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"psubsw "TAN3", "TAN1" \n\t" \
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"paddsw %%xmm6, "TAN3" \n\t" \
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"movdqa %%xmm3, %%xmm6 \n\t" \
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"psubsw "TAN3", %%xmm3 \n\t" \
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"paddsw %%xmm6, "TAN3" \n\t" \
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"movdqa "MANGLE(sqrt2)", %%xmm4 \n\t" \
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"pmulhw %%xmm4, %%xmm3 \n\t" \
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"pmulhw %%xmm4, "TAN3" \n\t" \
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"paddsw "TAN3", "TAN3" \n\t" \
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"paddsw %%xmm3, %%xmm3 \n\t" \
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"movdqa "MANGLE(tan2)", %%xmm5 \n\t" \
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MOV_32_ONLY ROW2", "SREG2" \n\t" \
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"pmulhw "SREG2", %%xmm5 \n\t" \
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MOV_32_ONLY ROW0", "REG0" \n\t" \
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"movdqa "REG0", %%xmm6 \n\t" \
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"psubsw "SREG2", %%xmm6 \n\t" \
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"paddsw "REG0", "SREG2" \n\t" \
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MOV_32_ONLY" "TAN1", (%0) \n\t" \
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"movdqa "REG0", "XMMS" \n\t" \
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"psubsw %%xmm5, "REG0" \n\t" \
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"paddsw "XMMS", %%xmm5 \n\t" \
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"movdqa %%xmm5, "XMMS" \n\t" \
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"psubsw "TAN3", %%xmm5 \n\t" \
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"paddsw "XMMS", "TAN3" \n\t" \
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"movdqa "REG0", "XMMS" \n\t" \
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"psubsw %%xmm3, "REG0" \n\t" \
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"paddsw "XMMS", %%xmm3 \n\t" \
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MOV_32_ONLY" (%0), "TAN1" \n\t" \
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"psraw $6, %%xmm5 \n\t" \
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"psraw $6, "REG0" \n\t" \
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"psraw $6, "TAN3" \n\t" \
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"psraw $6, %%xmm3 \n\t" \
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"movdqa "TAN3", 1*16("dct") \n\t" \
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"movdqa %%xmm3, 2*16("dct") \n\t" \
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"movdqa "REG0", 5*16("dct") \n\t" \
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"movdqa %%xmm5, 6*16("dct") \n\t" \
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"movdqa "SREG2", %%xmm0 \n\t" \
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"movdqa %%xmm6, %%xmm4 \n\t" \
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"psubsw %%xmm1, "SREG2" \n\t" \
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"psubsw "TAN1", %%xmm6 \n\t" \
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"paddsw %%xmm0, %%xmm1 \n\t" \
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"paddsw %%xmm4, "TAN1" \n\t" \
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"psraw $6, %%xmm1 \n\t" \
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"psraw $6, "SREG2" \n\t" \
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"psraw $6, "TAN1" \n\t" \
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"psraw $6, %%xmm6 \n\t" \
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"movdqa %%xmm1, ("dct") \n\t" \
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"movdqa "TAN1", 3*16("dct") \n\t" \
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"movdqa %%xmm6, 4*16("dct") \n\t" \
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"movdqa "SREG2", 7*16("dct") \n\t"
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inline void ff_idct_xvid_sse2(short *block)
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{
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asm volatile(
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"movq "MANGLE(m127)", %%mm0 \n\t"
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iMTX_MULT("(%0)", MANGLE(iTab1), ROUND(walkenIdctRounders), PUT_EVEN(ROW0))
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iMTX_MULT("1*16(%0)", MANGLE(iTab2), ROUND(walkenIdctRounders+1*16), PUT_ODD(ROW1))
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iMTX_MULT("2*16(%0)", MANGLE(iTab3), ROUND(walkenIdctRounders+2*16), PUT_EVEN(ROW2))
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TEST_TWO_ROWS("3*16(%0)", "4*16(%0)", "%%eax", "%%ecx", CLEAR_ODD(ROW3), CLEAR_EVEN(ROW4))
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JZ("%%eax", "1f")
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iMTX_MULT("3*16(%0)", MANGLE(iTab4), ROUND(walkenIdctRounders+3*16), PUT_ODD(ROW3))
|
|
|
|
TEST_TWO_ROWS("5*16(%0)", "6*16(%0)", "%%eax", "%%edx", CLEAR_ODD(ROW5), CLEAR_EVEN(ROW6))
|
|
TEST_ONE_ROW("7*16(%0)", "%%esi", CLEAR_ODD(ROW7))
|
|
iLLM_HEAD
|
|
ASMALIGN(4)
|
|
JNZ("%%ecx", "2f")
|
|
JNZ("%%eax", "3f")
|
|
JNZ("%%edx", "4f")
|
|
JNZ("%%esi", "5f")
|
|
iLLM_PASS_SPARSE("%0")
|
|
"jmp 6f \n\t"
|
|
"2: \n\t"
|
|
iMTX_MULT("4*16(%0)", MANGLE(iTab1), "#", PUT_EVEN(ROW4))
|
|
"3: \n\t"
|
|
iMTX_MULT("5*16(%0)", MANGLE(iTab4), ROUND(walkenIdctRounders+4*16), PUT_ODD(ROW5))
|
|
JZ("%%edx", "1f")
|
|
"4: \n\t"
|
|
iMTX_MULT("6*16(%0)", MANGLE(iTab3), ROUND(walkenIdctRounders+5*16), PUT_EVEN(ROW6))
|
|
JZ("%%esi", "1f")
|
|
"5: \n\t"
|
|
iMTX_MULT("7*16(%0)", MANGLE(iTab2), ROUND(walkenIdctRounders+5*16), PUT_ODD(ROW7))
|
|
#ifndef ARCH_X86_64
|
|
iLLM_HEAD
|
|
#endif
|
|
iLLM_PASS("%0")
|
|
"6: \n\t"
|
|
: "+r"(block)
|
|
:
|
|
: "%eax", "%ecx", "%edx", "%esi", "memory");
|
|
}
|
|
|
|
void ff_idct_xvid_sse2_put(uint8_t *dest, int line_size, short *block)
|
|
{
|
|
ff_idct_xvid_sse2(block);
|
|
put_pixels_clamped_mmx(block, dest, line_size);
|
|
}
|
|
|
|
void ff_idct_xvid_sse2_add(uint8_t *dest, int line_size, short *block)
|
|
{
|
|
ff_idct_xvid_sse2(block);
|
|
add_pixels_clamped_mmx(block, dest, line_size);
|
|
}
|