c526a01c91
* commit '4f50646697606df39317b93c2a427603b77636ee': x86: sbrdsp: Implement SSE qmf_post_shuffle Merged-by: Michael Niedermayer <michaelni@gmx.at>
223 lines
6.2 KiB
NASM
223 lines
6.2 KiB
NASM
;******************************************************************************
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;* AAC Spectral Band Replication decoding functions
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;* Copyright (C) 2012 Christophe Gisquet <christophe.gisquet@gmail.com>
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;*
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;* This file is part of Libav.
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;*
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;* Libav is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* Libav is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with Libav; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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; mask equivalent for multiply by -1.0 1.0
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ps_mask times 2 dd 1<<31, 0
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ps_neg times 4 dd 1<<31
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SECTION_TEXT
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INIT_XMM sse
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cglobal sbr_sum_square, 2, 3, 6
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mov r2, r1
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xorps m0, m0
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xorps m1, m1
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sar r2, 3
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jz .prepare
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.loop:
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movu m2, [r0 + 0]
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movu m3, [r0 + 16]
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movu m4, [r0 + 32]
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movu m5, [r0 + 48]
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mulps m2, m2
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mulps m3, m3
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mulps m4, m4
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mulps m5, m5
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addps m0, m2
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addps m1, m3
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addps m0, m4
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addps m1, m5
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add r0, 64
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dec r2
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jnz .loop
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.prepare:
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and r1, 7
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sar r1, 1
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jz .end
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; len is a multiple of 2, thus there are at least 4 elements to process
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.endloop:
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movu m2, [r0]
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add r0, 16
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mulps m2, m2
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dec r1
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addps m0, m2
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jnz .endloop
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.end:
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addps m0, m1
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movhlps m2, m0
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addps m0, m2
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movss m1, m0
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shufps m0, m0, 1
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addss m0, m1
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%if ARCH_X86_64 == 0
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movss r0m, m0
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fld dword r0m
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%endif
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RET
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%define STEP 40*4*2
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cglobal sbr_hf_g_filt, 5, 6, 5
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lea r1, [r1 + 8*r4] ; offset by ixh elements into X_high
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mov r5, r3
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and r3, 0xFC
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lea r2, [r2 + r3*4]
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lea r0, [r0 + r3*8]
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neg r3
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jz .loop1
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.loop4:
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movlps m0, [r2 + 4*r3 + 0]
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movlps m1, [r2 + 4*r3 + 8]
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movlps m2, [r1 + 0*STEP]
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movlps m3, [r1 + 2*STEP]
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movhps m2, [r1 + 1*STEP]
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movhps m3, [r1 + 3*STEP]
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unpcklps m0, m0
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unpcklps m1, m1
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mulps m0, m2
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mulps m1, m3
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movu [r0 + 8*r3 + 0], m0
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movu [r0 + 8*r3 + 16], m1
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add r1, 4*STEP
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add r3, 4
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jnz .loop4
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and r5, 3 ; number of single element loops
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jz .end
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.loop1: ; element 0 and 1 can be computed at the same time
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movss m0, [r2]
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movlps m2, [r1]
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unpcklps m0, m0
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mulps m2, m0
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movlps [r0], m2
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add r0, 8
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add r2, 4
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add r1, STEP
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dec r5
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jnz .loop1
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.end:
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RET
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; static void sbr_hf_gen_c(float (*X_high)[2], const float (*X_low)[2],
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; const float alpha0[2], const float alpha1[2],
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; float bw, int start, int end)
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;
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cglobal sbr_hf_gen, 4,4,8, X_high, X_low, alpha0, alpha1, BW, S, E
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; load alpha factors
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%define bw m0
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%if ARCH_X86_64 == 0 || WIN64
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movss bw, BWm
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%endif
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movlps m2, [alpha1q]
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movlps m1, [alpha0q]
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shufps bw, bw, 0
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mulps m2, bw ; (a1[0] a1[1])*bw
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mulps m1, bw ; (a0[0] a0[1])*bw = (a2 a3)
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mulps m2, bw ; (a1[0] a1[1])*bw*bw = (a0 a1)
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mova m3, m1
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mova m4, m2
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; Set pointers
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%if ARCH_X86_64 == 0 || WIN64
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; start and end 6th and 7th args on stack
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mov r2d, Sm
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mov r3d, Em
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%define start r2q
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%define end r3q
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%else
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; BW does not actually occupy a register, so shift by 1
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%define start BWq
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%define end Sq
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%endif
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sub start, end ; neg num of loops
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lea X_highq, [X_highq + end*2*4]
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lea X_lowq, [X_lowq + end*2*4 - 2*2*4]
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shl start, 3 ; offset from num loops
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mova m0, [X_lowq + start]
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shufps m3, m3, q1111
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shufps m4, m4, q1111
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xorps m3, [ps_mask]
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shufps m1, m1, q0000
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shufps m2, m2, q0000
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xorps m4, [ps_mask]
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.loop2:
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movu m7, [X_lowq + start + 8] ; BbCc
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mova m6, m0
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mova m5, m7
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shufps m0, m0, q2301 ; aAbB
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shufps m7, m7, q2301 ; bBcC
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mulps m0, m4
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mulps m7, m3
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mulps m6, m2
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mulps m5, m1
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addps m7, m0
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mova m0, [X_lowq + start +16] ; CcDd
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addps m7, m0
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addps m6, m5
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addps m7, m6
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mova [X_highq + start], m7
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add start, 16
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jnz .loop2
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RET
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cglobal sbr_sum64x5, 1,2,4,z
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lea r1q, [zq+ 256]
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.loop:
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mova m0, [zq+ 0]
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mova m2, [zq+ 16]
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mova m1, [zq+ 256]
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mova m3, [zq+ 272]
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addps m0, [zq+ 512]
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addps m2, [zq+ 528]
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addps m1, [zq+ 768]
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addps m3, [zq+ 784]
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addps m0, [zq+1024]
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addps m2, [zq+1040]
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addps m0, m1
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addps m2, m3
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mova [zq], m0
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mova [zq+16], m2
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add zq, 32
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cmp zq, r1q
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jne .loop
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REP_RET
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INIT_XMM sse
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cglobal sbr_qmf_post_shuffle, 2,3,4,W,z
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lea r2q, [zq + (64-4)*4]
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mova m3, [ps_neg]
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.loop:
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mova m1, [zq]
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xorps m0, m3, [r2q]
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shufps m0, m0, m0, q0123
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unpcklps m2, m0, m1
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unpckhps m0, m0, m1
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mova [Wq + 0], m2
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mova [Wq + 16], m0
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add Wq, 32
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sub r2q, 16
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add zq, 16
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cmp zq, r2q
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jl .loop
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REP_RET
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