64034849da
The ISB (instruction synchronization barrier) might be too heavy for START/STOPTIMER use but should be more accurate in checkasm where the timing overhead is subtracted.
45 lines
1.3 KiB
C
45 lines
1.3 KiB
C
/*
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* Copyright (c) 2015 Janne Grunau <janne-libav@jannau.net>
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*
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* This file is part of Libav.
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*
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* Libav is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* Libav is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with Libav; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef AVUTIL_AARCH64_TIMER_H
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#define AVUTIL_AARCH64_TIMER_H
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#include <stdint.h>
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#include "config.h"
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#if HAVE_INLINE_ASM
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#define AV_READ_TIME read_time
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static inline uint64_t read_time(void)
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{
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uint64_t cycle_counter;
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__asm__ volatile(
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"isb \t\n"
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"mrs %0, pmccntr_el0 "
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: "=r"(cycle_counter) :: "memory" );
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return cycle_counter;
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}
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#endif /* HAVE_INLINE_ASM */
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#endif /* AVUTIL_AARCH64_TIMER_H */
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