Commit Graph

287 Commits

Author SHA1 Message Date
Anton Khirnov
36ef5369ee Replace all CODEC_ID_* with AV_CODEC_ID_* 2012-08-07 16:00:24 +02:00
Mans Rullgard
e6cd698955 ARMv6: vp8: fix stack allocation with Apple's assembler
In the GNU assembler, a relational expression, bizarrely, has the
value -1 if true, whereas in Apple's it is +1.  This patch makes
sure the correct expression is used in both cases.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-08-04 00:59:14 +01:00
Mans Rullgard
9829a81bcd ARM: vp56: allow inline asm to build with clang
The clang integrated assembler does not support pre-UAL syntax,
while gcc requires pre-UAL syntax for ARM code.  A patch[1] for
clang to support the old syntax as well has been ignored since
January.

This patch chooses the syntax appropriate for each compiler,
allowing both to build the code.  Notably, this change allows
building for iphone with the latest Apple Xcode update.

[1] http://llvm.org/bugs/show_bug.cgi?id=11855

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-08-04 00:59:14 +01:00
Mans Rullgard
faa788227f ARM: use =const syntax instead of explicit literal pools
Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-08-01 10:32:24 +01:00
Mans Rullgard
998170913c ARM: use standard syntax for all LDRD/STRD instructions
The standard syntax requires two destination registers for
LDRD/STRD instructions.  Some versions of the GNU assembler
allow using only one with the second implicit, others are
more strict.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-08-01 10:32:24 +01:00
Mans Rullgard
28f9ab7029 vp3: move idct and loop filter pointers to new vp3dsp context
This moves all VP3-specific function pointers from dsputil to a
new vp3dsp context.  There is no reason to ever use the VP3 IDCT
where an MPEG2 IDCT is expected or vice versa.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-07-18 10:32:19 +01:00
Mans Rullgard
ab9f987661 build: add CONFIG_VP3DSP, reduce repetition in OBJS lists
Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-07-18 10:32:18 +01:00
Mans Rullgard
62634158b7 ARM: generate position independent code to access data symbols
This creates proper position independent code when accessing
data symbols if CONFIG_PIC is set.

References to external symbols should now use the movrelx macro.
Some additional code changes are required since this macro may
need a register to hold the GOT pointer.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-07-01 11:25:06 +01:00
Justin Ruggles
cb5042d02c float_dsp: Move vector_fmac_scalar() from libavcodec to libavutil 2012-06-18 18:01:14 -04:00
Justin Ruggles
d5a7229ba4 Add a float DSP framework to libavutil
Move vector_fmul() from DSPContext to AVFloatDSPContext.
2012-06-08 13:14:38 -04:00
Justin Ruggles
94d2b0d2fd ARM: Move asm.S from libavcodec to libavutil
This will allow for easier implementation of ARM-optimized functions in
libraries other than libavcodec.
2012-06-08 13:14:38 -04:00
Mans Rullgard
e54e6f25cf arm/neon: dsputil: use correct size specifiers on vld1/vst1
Change the size specifiers to match the actual element sizes
of the data.  This makes no practical difference with strict
alignment checking disabled (the default) other than somewhat
documenting the code.  With strict alignment checking on, it
avoids trapping the unaligned loads.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-05-10 22:56:37 +01:00
Mans Rullgard
2eba6898c9 arm: dsputil: prettify some conditional instructions in put_pixels macros
Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-05-10 22:56:09 +01:00
Mans Rullgard
cbc7d60afa arm: dsputil: fix overreads in put/avg_pixels functions
The vertically interpolating variants of these functions read
ahead one line to optimise the loop.  On the last line processed,
this might be outside the buffer.  Fix these invalid reads by
processing the last line outside the loop.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-05-10 14:39:34 +01:00
Mans Rullgard
96f7590efd aacps: NEON optimisations
Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-05-05 22:04:21 +01:00
Mans Rullgard
3d11c2d76d vp8: armv6: fix non-armv6t2 build
The assembler may fail to place literal pools close enough to
instructions referencing them.  An explicit .ltorg directive
fixes this.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-04-25 23:16:31 +01:00
Mans Rullgard
e4ac031233 vp8: armv6 optimisations
Based on patch by Ronald S. Bultje <rsbultje@gmail.com>,
partially ported from libvpx.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-04-25 21:41:39 +01:00
Mans Rullgard
b692d246ea vp8: arm: separate ARMv6 functions from NEON
This is a preparation for complete ARMv6 optimisations.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-04-25 21:41:39 +01:00
Mans Rullgard
dac78fd1d7 ARM: add some compatibility macros
This adds some macros simplifying Thumb and pre-v6T2 compatibility.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-04-25 21:41:39 +01:00
Mans Rullgard
d526c5338d ARM: allow runtime masking of CPU features
This allows masking CPU features with the -cpuflags avconv option
which is useful for testing different optimisations without rebuilding.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-04-22 12:30:45 +01:00
Mans Rullgard
2bcbd98459 Remove lowres video decoding
This feature is complex, of questionable utility, and slows down
normal decoding.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-04-21 18:56:19 +01:00
Diego Biurrun
7bb3a302fe build: Consistently handle conditional compilation for all optimization OBJS. 2012-04-12 09:00:49 +02:00
Christophe GISQUET
272b252c01 rv40dsp: implement prescaled versions for biweight.
Quite often, the original weights are multiple of 512. By prescaling them
by 1/512 when they are computed (once per frame), no intermediate shifting
is needed, and no prescaling on each call either.

The x86 code already used that trick.

Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2012-04-10 10:06:48 -07:00
Diego Biurrun
3dde147ff9 cosmetics: Consistently place static, inline and av_cold attributes/keywords. 2012-04-04 14:54:13 +02:00
Janne Grunau
363bd1c62c remove iwmmxt optimizations
The were broken since August of 2010 without anyone noticing until
three weeks ago. Nobody cares about it anymore and hopefully Marvell
will support NEON like in the PXA978 from now on.
2012-03-12 22:46:56 +01:00
Christophe GISQUET
7e1ce6a6ac dsputil: remove shift parameter from scalarproduct_int16
There is only one caller, which does not need the shifting. Other use cases
are situations where different roundings would be needed.

The x86 and neon versions are modified accordingly.

Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2012-03-07 10:29:52 -08:00
Ronald S. Bultje
bd66f073fe vp8: change int stride to ptrdiff_t stride.
On 64bit platforms with 32bit int, this means we won't have to sign-
extend the integer anymore.
2012-03-02 10:31:50 -08:00
Christophe GISQUET
2e74a5abc2 SBR DSP: use intptr_t for the ixh parameter.
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2012-02-23 15:48:40 -08:00
Ronald S. Bultje
3ab9a2a557 rv34: change most "int stride" into "ptrdiff_t stride".
This prevents having to sign-extend on 64-bit systems with 32-bit ints,
such as x86-64. Also fixes crashes on systems where we don't do it and
arguments are not in registers, such as Win64 for all weight functions.
2012-02-20 14:58:25 -08:00
Martin Storsjö
efd29844eb mpegvideo: Add ff_ prefix to nonstatic functions
Signed-off-by: Martin Storsjö <martin@martin.st>
2012-02-15 22:07:23 +02:00
Martin Storsjö
9cf0841ef3 dsputil: Add ff_ prefix to the dsputil*_init* functions
Signed-off-by: Martin Storsjö <martin@martin.st>
2012-02-15 22:06:34 +02:00
Diego Biurrun
aa06d65693 arm: Add missing #include to vp8.h to fix a make checkheaders warning. 2012-02-09 12:26:47 +01:00
Diego Biurrun
32f3c541bc doxygen: Do not include license boilerplates in Doxygen comment blocks. 2012-02-06 19:39:24 +01:00
Mans Rullgard
cd2f98f365 ARM: ac3: fix ac3_bit_alloc_calc_bap_armv6
This function was broken when the start bin was not at the start
of a band.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-02-02 18:50:42 +00:00
Mans Rullgard
be822d77b6 aacsbr: ARM NEON optimised sbrdsp functions
Overall speedup of HE-AAC decoding 2.3x on Cortex-A8, 1.2x on A9.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-01-28 14:56:18 +00:00
Felipe Contreras
c3d5e290ca ARM: fix build with FFT enabled and MDCT disabled
Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-01-20 16:14:01 +00:00
Janne Grunau
9e12002f11 rv34: add NEON rv34_idct_add
Overall almost 4% faster, idct_add down from 350 to 85 cycles, idct_dc_add
down from 83 to 30 cycles.

squash: rv34 idct rearrange partial register loads
2012-01-16 19:26:41 +01:00
Christophe GISQUET
9ba9c34024 rv34: 1-pass inter MB reconstruction
Implement 1-pass inverse transform and reconstruction for inter blocks.
2012-01-16 19:26:41 +01:00
Mans Rullgard
71b3a63e9c ARM: fix Thumb-mode simple_idct_arm
The alignment directive must obviously precede the label.
This was never noticed in ARM mode since the location is
already aligned there.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-01-13 19:09:59 +00:00
Mans Rullgard
5c5e1ea3cd ARM: 4-byte align start of all asm functions
Due to apprent bugs in the GNU assembler and/or linker, relocations
can be incorrectly processed if the alignment of a Thumb instruction
is changed in the output file compared to the input object.

This fixes crashes in h264 decoding with Thumb enabled. No effect in
ARM mode since everything is 4-byte aligned there.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2012-01-13 19:09:59 +00:00
Mans Rullgard
81dc6a2a3c ARM: rv34: fix asm syntax in dc transform functions
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Janne Grunau <janne-libav@jannau.net>
2012-01-12 22:11:13 +01:00
Janne Grunau
e1e369049e rv34: NEON optimised dc only inverse transform
30-50% faster than the C implementation, 0.5% overall speedup on
bourne.rmvb.
2012-01-12 18:33:55 +01:00
Christophe GISQUET
98f24ecd6c rv34: joint coefficient decoding and dequantization
Perform dequantization while decoding coefficients instead of performing it
on the entire coefficients buffer.

Since quantized coefficients are very sparse, this usually causes a small
speedup. Speedup of around 1% on Panda board compared to the removed here
neon code. Global speedup is probably around 3%.

Signed-off-by: Kostya Shishkov <kostya.shishkov@gmail.com>
2012-01-04 10:30:01 +01:00
Mans Rullgard
11b1db2759 rv40: NEON optimised weak loop filter
Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-16 14:36:01 +00:00
Mans Rullgard
b536c7a3e1 ARM: fix external symbol refs in rv40 asm
External symbol references need prefixes on some systems.
This should fix build errors on Darwin.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-15 11:02:59 +00:00
Mans Rullgard
f7de52354f ARM: dca: disable optimised decode_blockcodes() for old gcc
Old gcc versions have trouble compiling this function, and
no simple, targeted test is possible.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-15 01:02:58 +00:00
Mans Rullgard
71ce76027d rv40: NEON optimised loop filter strength selection
Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-14 11:26:30 +00:00
Mans Rullgard
4722a03c75 rv34: NEON optimised 4x4 dequant
Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-13 12:06:21 +00:00
Mans Rullgard
392107ad07 rv40: NEON optimised rv40 qpel motion compensation
Based on patch by Janne Grunau.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-07 22:38:14 +00:00
Janne Grunau
6c88988866 rv40: NEON optimised weighted prediction
Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-06 13:48:25 +00:00