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3 Commits

Author SHA1 Message Date
ZhouXiaoyong
af3e944e7e avcodec/mips/h264dsp_mmi: Version 2 of the optimizations for loongson mmi 
1. no longer use the register names directly and optimized code format
2. to be compatible with O32, specify type of address variable with mips_reg and handle the address variable with PTR_ operator
3. optimize some unaligned loads and stores
4. use uld and mtc1 to workaround cpu 3A2000 gslwlc1 bug (gslwlc1 instruction extension bug in O32 ABI)

Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
 2016-05-17 04:18:42 +02:00
周晓勇
f7e9b9d260 avcodec: loongson optimize h264dsp idct and loop filter with mmi 
Change-Id: Ic87fb8f5cd22a502ff9dbbc5a5a8ea97cfc8a1dd
Signed-off-by: ZhouXiaoyong <zhouxiaoyong@loongson.cn>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
 2015-09-07 22:49:52 +02:00
周晓勇
e89e23e1bc avcodec: loongson3 optimized h264dsp weighted mc with mmi 
Signed-off-by: ZhouXiaoyong <zhouxiaoyong@loongson.cn>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
 2015-05-27 13:01:54 +02:00