Commit Graph

2072 Commits

Author SHA1 Message Date
Timothy Gu
4b80b895a9 pixblockdsp: x86: Condense diff_pixels_* to a shared macro
Reviewed-by: Ronald S. Bultje <rsbultje@gmail.com>
Reviewed-by: James Almer <jamrial@gmail.com>
2015-11-07 14:31:34 -08:00
Ganesh Ajjanagadde
38f4e973ef all: fix -Wextra-semi reported on clang
This fixes extra semicolons that clang 3.7 on GNU/Linux warns about.
These were trigggered when built under -Wpedantic, which essentially
checks for strict ISO compliance in numerous ways.

Reviewed-by: Michael Niedermayer <michael@niedermayer.cc>
Signed-off-by: Ganesh Ajjanagadde <gajjanagadde@gmail.com>
2015-10-24 17:58:17 -04:00
Ronald S. Bultje
52f84d82bd videodsp: don't overread edges in vfix3 emu_edge.
Fixes trac ticket 3226. Also see Andreas' analysis in
https://bugs.debian.org/801745, which was very helpful.
2015-10-24 14:34:50 -04:00
Michael Niedermayer
ea5a1d1485 avcodec/x86/vc1dsp: Remove unused macro
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-10-22 21:13:42 +02:00
Carl Eugen Hoyos
775b84e30e lavc/x86/vc1dsp_init: Fix compilation with --disable-yasm. 2015-10-22 11:37:42 +02:00
James Almer
73353af6e5 x86/Makefile: move decoder/encoder objects out of the subsystems section
Signed-off-by: James Almer <jamrial@gmail.com>
2015-10-22 03:55:18 -03:00
Timothy Gu
ab5f43e634 vc1dsp: Port ff_vc1_put_ver_16b_shift2_mmx to yasm
This function is only used within other inline asm functions, hence the
HAVE_MMX_INLINE guard. Per recent discussions, we should not worry about
the performance of inline asm-only builds.
2015-10-21 20:01:52 -07:00
Timothy Gu
98da061461 huffyuvencdsp: Cherry pick changes left out in the last commit
Oops.
2015-10-21 12:42:33 -07:00
Timothy Gu
5e586e1bef huffyuvencdsp: Add ff_diff_bytes_{sse2,avx2}
SSE2 version 4%-35% faster than MMX depending on the width.
AVX2 version 1%-13% faster than SSE2 depending on the width.
2015-10-21 12:25:32 -07:00
Timothy Gu
6b41b44149 huffyuvencdsp: Convert ff_diff_bytes_mmx to yasm
Heavily based upon ff_add_bytes by Christophe Gisquet.

Reviewed-by: James Almer <jamrial@gmail.com>
Signed-off-by: Timothy Gu <timothygu99@gmail.com>
2015-10-20 18:24:54 -07:00
Timothy Gu
068e6cb732 huffyuvencdsp: Use intptr_t for width
It is done this way in huffyuvdsp as well.
2015-10-19 16:57:33 -07:00
Timothy Gu
a079cbf458 x86: vc1dsp_mmx: Move yasm initiation steps to vc1dsp_init
That's where all yasm initiation steps are. Also removes the overlap
between the two files.
2015-10-19 16:52:52 -07:00
Timothy Gu
607f820ec7 x86: fpel: Remove erroneous ff_put_pixels8_mmxext prototype
This function does not exist.
2015-10-19 16:52:37 -07:00
Timothy Gu
cb6f1f8bf9 x86: fpel: Move prototypes for 4-px block functions 2015-10-19 16:52:33 -07:00
James Almer
74a87ae210 x86/vp9itxfm: fix register clobbering in ff_vp9_idct_idct_4x4_add_12_sse2
Reviewed-by: Henrik Gramner <henrik@gramner.com>
Signed-off-by: James Almer <jamrial@gmail.com>
2015-10-13 20:21:33 -03:00
Christophe Gisquet
74c414202f x86: simple_idct10_template: use const
This avoid going through constants.c while still sharing them
with proresdsp.asm

Reviewed-by: "Ronald S. Bultje" <rsbultje@gmail.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-10-13 22:52:33 +02:00
Ronald S. Bultje
e578638382 vp9: use registers for constant loading where possible. 2015-10-13 11:06:01 -04:00
Ronald S. Bultje
408bb8556f vp9: refactor itx coefficients and share between 8 and 10/12bpp. 2015-10-13 11:06:01 -04:00
Ronald S. Bultje
eb4b5ff738 vp9: add itxfm_add eob shortcuts to 10/12bpp functions.
These aren't quite as helpful as the ones in 8bpp, since over there,
we can use pmulhrsw, but here the coefficients have too many bits to
be able to take advantage of pmulhrsw. However, we can still skip
cols for which all coefs are 0, and instead just zero the input data
for the row itx. This helps a few % on overall decoding speed.
2015-10-13 11:06:01 -04:00
Ronald S. Bultje
488fadebbc vp9: add 10/12bpp idct_idct_32x32 sse2 SIMD version. 2015-10-13 11:06:00 -04:00
Ronald S. Bultje
3d0ca2fe89 vp9: 10/12bpp sse2 SIMD for iadst16. 2015-10-13 11:06:00 -04:00
Ronald S. Bultje
0e80265b0a vp9: refactor 10/12bpp dc-only code in 4x4/8x8 and add to 16x16. 2015-10-13 11:06:00 -04:00
Ronald S. Bultje
1338fb79d4 vp9: add 10/12bpp sse2 SIMD version for idct_idct_16x16. 2015-10-13 11:06:00 -04:00
Ronald S. Bultje
cb054d061a vp9: add 10/12bpp sse2 SIMD versions of iadst8x8. 2015-10-13 11:05:59 -04:00
Ronald S. Bultje
e0610787b2 vp9: add 10/12bpp sse2 SIMD for idct_idct_8x8. 2015-10-13 11:05:59 -04:00
Ronald S. Bultje
a35f6bdb38 vp9: add 12bpp sse2 versions of iadst4. 2015-10-13 11:05:59 -04:00
Ronald S. Bultje
235e76aeb8 vp9: initial attempt at a idct_idct_4x4 12bpp x86 simd (sse2) impl.
The trouble with this function is that intermediates overflow 31+sign
bits, so I've added some helpers (that will also be used in 10/12bpp
8x8, 16x16 and 32x32) to make that easier, basically emulating a half-
assed pmaddqd using 2xpmaddwd. It's currently sse2-only, if anyone sees
potential in adding ssse3, I'd love to hear it.
2015-10-13 11:05:58 -04:00
Ronald S. Bultje
f76423d097 vp9: add x86 simd (sse2/ssse3) for iadst4 10bpp functions. 2015-10-13 11:05:58 -04:00
Ronald S. Bultje
6b579cf547 vp9: add 10bpp simd (mmxext/ssse3) for idct_idct_4x4. 2015-10-13 11:05:58 -04:00
Ronald S. Bultje
1c3be32533 vp9: add 10/12bpp mmxext-optimized iwht_iwht_4x4 function. 2015-10-13 11:05:57 -04:00
Christophe Gisquet
b6594a9605 x86: dct-test: add more idcts
In particular for 10 and 12 bits.

Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-10-13 16:03:04 +02:00
Christophe Gisquet
7ece8b50b1 x86: simple_idct: 12bits versions
On 12 frames of a 444p 12 bits DNxHR sequence, _put function:
C:         78902 decicycles in idct,  262071 runs,     73 skips
avx:       32478 decicycles in idct,  262045 runs,     99 skips

Difference between the 2:
stddev:    0.39 PSNR:104.47 MAXDIFF:    2

This is unavoidable and due to the scale factors used in the x86
version, which cannot match the C ones.

In addition, the trick of adding an initial bias to the input of a
pass can overflow, as the input coefficients are already 15bits,
which is the maximum this function can handle.

Overall, however, the omse on 12 bits samples goes from 0.16916 to
0.16883. Reducing rowshift by 1 improves to 0.0908, but causes
overflows.

Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-10-13 15:34:32 +02:00
Christophe Gisquet
4369b9dc7b x86: simple_idct(_put): 10bits versions
Modeled from the prores version. Clips to [0;1023] and is bitexact.
Bitexactness requires to add offsets in different places compared to
prores or C, and makes the function approximately 2% slower.

For 16 frames of a DNxHD 4:2:2 10bits test sequence:

C:    60861 decicycles in idct, 1048205 runs,    371 skips
sse2: 27567 decicycles in idct, 1048216 runs,    360 skips
avx:  26272 decicycles in idct, 1048171 runs,    405 skips

The add version is not implemented, so the corresponding dsp
function is set to NULL to make it clear in a code executing it.

Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-10-13 13:32:21 +02:00
Christophe Gisquet
e652f69b35 x86: simple_idct10_template: fix overflow in pass
When the input of a pass has 15 or 16 bits of precision (in particular
the column pass), the addition of a bias to W4 may lead to overflows
in the input to pmaddwd.

This requires postponing the adding of the bias to after the first
butterfly. To do so, the fact that m15, unused although zeroed, is
exploited. In case the pass is safe, an address can be directly used,
and the number of xmm regs can be decreased. Otherwise, the 32bits bias
is loaded into it.

Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-10-13 12:51:10 +02:00
Christophe Gisquet
e9a68b0316 x86: prores: templatize 10 bits simple_idct
This should be reused for a generic simple_idct10 function.
Requires a bit of trickery to declare common constants in C.

Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-10-13 01:10:34 +02:00
James Almer
dab5f65b25 x86/takdsp: use arithmetic shift instructions
p1 and p2 are int32_t.

Reviewed-by: Ronald S. Bultje <rsbultje@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
2015-10-09 23:52:39 -03:00
Paul B Mahol
35af7add6f avcodec/takdec: add x86 SIMD for rest of decorrelation modes
Signed-off-by: Paul B Mahol <onemda@gmail.com>
2015-10-09 21:38:15 +02:00
Ronald S. Bultje
ce78729033 vp9: don't keep a stack pointer if we don't need it.
This saves one register in a few cases on 32bit builds with unaligned
stack (e.g. MSVC), making the code slightly easier to maintain.

(Can someone please test this on 32bit+msvc and confirm make fate-vp9
and tests/checkasm/checkasm still work after this patch?)
2015-10-07 08:55:19 -04:00
James Almer
72254b19b8 x86/alacdsp: add simd optimized functions
Signed-off-by: James Almer <jamrial@gmail.com>
2015-10-06 20:22:00 -03:00
Ronald S. Bultje
cb912b4521 vp9: fix msvc build by using 6 GPRs on 32bit if stack!=aligned. 2015-10-05 16:51:05 -04:00
Christophe Gisquet
f827a17005 blockdsp: reindent after parameter removal
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-10-03 23:34:56 +02:00
Ronald S. Bultje
061b67fb50 vp9: 10/12bpp SIMD (sse2/ssse3/avx) for directional intra prediction. 2015-10-03 14:42:39 -04:00
Ronald S. Bultje
26ece7a511 vp9: 16bpp tm/dc/h/v intra pred simd (mostly sse2) functions. 2015-10-03 14:42:39 -04:00
Ronald S. Bultje
db7786e8ff vp9: sse2/ssse3/avx 16bpp loopfilter x86 simd. 2015-10-03 14:42:39 -04:00
Ganesh Ajjanagadde
0493e42eb2 avcodec/x86/hpeldsp_rnd_template: silence -Wunused-function on --disable-mmx
This silences some of the -Wunused-function warnings when compiled with --disable-mmx, e.g
http://fate.ffmpeg.org/log.cgi?time=20150919094617&log=compile&slot=x86_64-archlinux-gcc-disable-mmx.
Header guards are too brittle and ugly for this case.

Signed-off-by: Ganesh Ajjanagadde <gajjanagadde@gmail.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-10-03 14:24:41 +02:00
Christophe Gisquet
562ba4a827 blockdsp: remove high bitdepth parameter
It is only (mis-)used to set the dsp fucntions clear_block(s). But
these functions always work on 16bits-wide elements, which make
the parameter useless and actually harmful, as it causes all content
on more than 8-bits to not use accelerated functions.

Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-10-02 04:38:40 +02:00
James Almer
3178931a14 x86/hevc_sao: move 10/12bit functions into a separate file
Tested-by: Michael Niedermayer <michaelni@gmx.at>
Signed-off-by: James Almer <jamrial@gmail.com>
2015-09-30 02:59:55 -03:00
Ganesh Ajjanagadde
308e7484a3 avcodec/x86/rnd_template: silence -Wunused-function on --disable-mmx
This silences some of the -Wunused-function warnings when compiled with --disable-mmx, e.g
http://fate.ffmpeg.org/log.cgi?time=20150919094617&log=compile&slot=x86_64-archlinux-gcc-disable-mmx.
Header guards are too brittle and ugly for this case.

Signed-off-by: Ganesh Ajjanagadde <gajjanagadde@gmail.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-09-29 19:37:26 +02:00
Michael Niedermayer
1b82b934a1 avcodec/x86/sbrdsp: Fix using uninitialized upper 32bit of noise
Fixes crash
Fixes: flicker-1.scout3d21443372922.28.m4a

Found-by: Dale Curtis <dalecurtis@google.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-09-29 13:23:25 +02:00
Ganesh Ajjanagadde
07cd8d5676 avcodec/x86/cavsdsp: silence -Wunused-variable on --disable-mmx
This silences -Wunused-variable when compiled with --disable-mmx, e.g
http://fate.ffmpeg.org/log.cgi?time=20150919094617&log=compile&slot=x86_64-archlinux-gcc-disable-mmx.
The alternative of header guards will make it far too ugly.

Signed-off-by: Ganesh Ajjanagadde <gajjanagadde@gmail.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-09-24 04:27:50 +02:00