ff_h264_idct8_add_sse2.
compared to mmx, 217->126 cycles on core2, 262->220 on k8. Originally committed as revision 11826 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Loren Merritt
parent
51f0ac65df
commit
ed5d7a531c
@ -348,7 +348,7 @@ typedef struct H264Context{
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GetBitContext *intra_gb_ptr;
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GetBitContext *inter_gb_ptr;
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DECLARE_ALIGNED_8(DCTELEM, mb[16*24]);
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DECLARE_ALIGNED_16(DCTELEM, mb[16*24]);
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DCTELEM mb_padding[256]; ///< as mb is addressed by scantable[i] and scantable is uint8_t we can either check that i is not to large or ensure that there is some unused stuff after mb
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/**
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@ -98,7 +98,7 @@ static void H264_CHROMA_MC8_TMPL(uint8_t *dst/*align 8*/, uint8_t *src/*align 1*
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}
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/* general case, bilinear */
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rnd_reg = rnd ? &ff_pw_32 : &ff_pw_28;
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rnd_reg = rnd ? ff_pw_32 : &ff_pw_28;
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asm volatile("movd %2, %%mm4\n\t"
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"movd %3, %%mm6\n\t"
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"punpcklwd %%mm4, %%mm4\n\t"
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@ -250,7 +250,7 @@ static void H264_CHROMA_MC4_TMPL(uint8_t *dst/*align 4*/, uint8_t *src/*align 1*
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"sub $2, %2 \n\t"
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"jnz 1b \n\t"
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: "+r"(dst), "+r"(src), "+r"(h)
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: "r"((long)stride), "m"(ff_pw_32), "m"(x), "m"(y)
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: "r"((long)stride), "m"(*ff_pw_32), "m"(x), "m"(y)
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);
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}
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@ -301,7 +301,7 @@ static void H264_CHROMA_MC2_TMPL(uint8_t *dst/*align 2*/, uint8_t *src/*align 1*
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"sub $1, %2\n\t"
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"jnz 1b\n\t"
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: "+r" (dst), "+r"(src), "+r"(h)
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: "m" (ff_pw_32), "r"((long)stride)
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: "m" (*ff_pw_32), "r"((long)stride)
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: "%esi");
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}
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@ -54,7 +54,7 @@ DECLARE_ALIGNED_8 (const uint64_t, ff_pw_8 ) = 0x0008000800080008ULL;
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DECLARE_ALIGNED_8 (const uint64_t, ff_pw_15 ) = 0x000F000F000F000FULL;
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DECLARE_ALIGNED_8 (const uint64_t, ff_pw_16 ) = 0x0010001000100010ULL;
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DECLARE_ALIGNED_8 (const uint64_t, ff_pw_20 ) = 0x0014001400140014ULL;
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DECLARE_ALIGNED_8 (const uint64_t, ff_pw_32 ) = 0x0020002000200020ULL;
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DECLARE_ALIGNED_16(const uint64_t, ff_pw_32[2]) = {0x0020002000200020ULL, 0x0020002000200020ULL};
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DECLARE_ALIGNED_8 (const uint64_t, ff_pw_42 ) = 0x002A002A002A002AULL;
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DECLARE_ALIGNED_8 (const uint64_t, ff_pw_64 ) = 0x0040004000400040ULL;
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DECLARE_ALIGNED_8 (const uint64_t, ff_pw_96 ) = 0x0060006000600060ULL;
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@ -3328,6 +3328,8 @@ void dsputil_init_mmx(DSPContext* c, AVCodecContext *avctx)
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c->h264_idct_add= ff_h264_idct_add_mmx;
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c->h264_idct8_dc_add=
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c->h264_idct8_add= ff_h264_idct8_add_mmx;
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if (mm_flags & MM_SSE2)
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c->h264_idct8_add= ff_h264_idct8_add_sse2;
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if (mm_flags & MM_MMXEXT) {
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c->prefetch = prefetch_mmx2;
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@ -36,7 +36,7 @@ extern const uint64_t ff_pw_8;
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extern const uint64_t ff_pw_15;
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extern const uint64_t ff_pw_16;
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extern const uint64_t ff_pw_20;
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extern const uint64_t ff_pw_32;
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extern const uint64_t ff_pw_32[2];
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extern const uint64_t ff_pw_42;
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extern const uint64_t ff_pw_64;
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extern const uint64_t ff_pw_96;
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@ -75,7 +75,7 @@ static void ff_h264_idct_add_mmx(uint8_t *dst, int16_t *block, int stride)
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IDCT4_1D( %%mm4, %%mm2, %%mm3, %%mm0, %%mm1 )
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"pxor %%mm7, %%mm7 \n\t"
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:: "m"(ff_pw_32));
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:: "m"(*ff_pw_32));
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asm volatile(
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STORE_DIFF_4P( %%mm0, %%mm1, %%mm7)
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@ -211,6 +211,93 @@ static void ff_h264_idct8_add_mmx(uint8_t *dst, int16_t *block, int stride)
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add_pixels_clamped_mmx(b2, dst, stride);
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}
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#define STORE_DIFF_8P( p, d, t, z )\
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"movq "#d", "#t" \n"\
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"psraw $6, "#p" \n"\
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"punpcklbw "#z", "#t" \n"\
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"paddsw "#t", "#p" \n"\
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"packuswb "#p", "#p" \n"\
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"movq "#p", "#d" \n"
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#define H264_IDCT8_1D_SSE2(a,b,c,d,e,f,g,h)\
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"movdqa "#c", "#a" \n"\
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"movdqa "#g", "#e" \n"\
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"psraw $1, "#c" \n"\
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"psraw $1, "#g" \n"\
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"psubw "#e", "#c" \n"\
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"paddw "#a", "#g" \n"\
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"movdqa "#b", "#e" \n"\
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"psraw $1, "#e" \n"\
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"paddw "#b", "#e" \n"\
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"paddw "#d", "#e" \n"\
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"paddw "#f", "#e" \n"\
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"movdqa "#f", "#a" \n"\
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"psraw $1, "#a" \n"\
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"paddw "#f", "#a" \n"\
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"paddw "#h", "#a" \n"\
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"psubw "#b", "#a" \n"\
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"psubw "#d", "#b" \n"\
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"psubw "#d", "#f" \n"\
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"paddw "#h", "#b" \n"\
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"psubw "#h", "#f" \n"\
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"psraw $1, "#d" \n"\
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"psraw $1, "#h" \n"\
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"psubw "#d", "#b" \n"\
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"psubw "#h", "#f" \n"\
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"movdqa "#e", "#d" \n"\
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"movdqa "#a", "#h" \n"\
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"psraw $2, "#d" \n"\
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"psraw $2, "#h" \n"\
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"paddw "#f", "#d" \n"\
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"paddw "#b", "#h" \n"\
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"psraw $2, "#f" \n"\
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"psraw $2, "#b" \n"\
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"psubw "#f", "#e" \n"\
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"psubw "#a", "#b" \n"\
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"movdqa 0x00(%1), "#a" \n"\
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"movdqa 0x40(%1), "#f" \n"\
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SUMSUB_BA(f, a)\
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SUMSUB_BA(g, f)\
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SUMSUB_BA(c, a)\
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SUMSUB_BA(e, g)\
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SUMSUB_BA(b, c)\
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SUMSUB_BA(h, a)\
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SUMSUB_BA(d, f)
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static void ff_h264_idct8_add_sse2(uint8_t *dst, int16_t *block, int stride)
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{
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asm volatile(
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"movdqa 0x10(%1), %%xmm1 \n"
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"movdqa 0x20(%1), %%xmm2 \n"
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"movdqa 0x30(%1), %%xmm3 \n"
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"movdqa 0x50(%1), %%xmm5 \n"
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"movdqa 0x60(%1), %%xmm6 \n"
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"movdqa 0x70(%1), %%xmm7 \n"
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H264_IDCT8_1D_SSE2(%%xmm0, %%xmm1, %%xmm2, %%xmm3, %%xmm4, %%xmm5, %%xmm6, %%xmm7)
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TRANSPOSE8(%%xmm4, %%xmm1, %%xmm7, %%xmm3, %%xmm5, %%xmm0, %%xmm2, %%xmm6, (%1))
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"paddw %4, %%xmm4 \n"
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"movdqa %%xmm4, 0x00(%1) \n"
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"movdqa %%xmm2, 0x40(%1) \n"
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H264_IDCT8_1D_SSE2(%%xmm4, %%xmm0, %%xmm6, %%xmm3, %%xmm2, %%xmm5, %%xmm7, %%xmm1)
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"movdqa %%xmm6, 0x60(%1) \n"
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"movdqa %%xmm7, 0x70(%1) \n"
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"pxor %%xmm7, %%xmm7 \n"
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STORE_DIFF_8P(%%xmm2, (%0), %%xmm6, %%xmm7)
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STORE_DIFF_8P(%%xmm0, (%0,%2), %%xmm6, %%xmm7)
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STORE_DIFF_8P(%%xmm1, (%0,%2,2), %%xmm6, %%xmm7)
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STORE_DIFF_8P(%%xmm3, (%0,%3), %%xmm6, %%xmm7)
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"lea (%0,%2,4), %0 \n"
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STORE_DIFF_8P(%%xmm5, (%0), %%xmm6, %%xmm7)
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STORE_DIFF_8P(%%xmm4, (%0,%2), %%xmm6, %%xmm7)
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"movdqa 0x60(%1), %%xmm0 \n"
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"movdqa 0x70(%1), %%xmm1 \n"
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STORE_DIFF_8P(%%xmm0, (%0,%2,2), %%xmm6, %%xmm7)
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STORE_DIFF_8P(%%xmm1, (%0,%3), %%xmm6, %%xmm7)
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:"+r"(dst)
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:"r"(block), "r"((long)stride), "r"(3L*stride), "m"(*ff_pw_32)
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);
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}
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static void ff_h264_idct_dc_add_mmx2(uint8_t *dst, int16_t *block, int stride)
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{
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int dc = (block[0] + 32) >> 6;
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@ -839,7 +926,7 @@ static av_noinline void OPNAME ## h264_qpel4_hv_lowpass_ ## MMX(uint8_t *dst, in
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"decl %2 \n\t"\
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" jnz 1b \n\t"\
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: "+a"(tmp), "+c"(dst), "+m"(h)\
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: "S"((long)dstStride), "m"(ff_pw_32)\
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: "S"((long)dstStride), "m"(*ff_pw_32)\
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: "memory"\
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);\
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}\
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@ -1113,7 +1200,7 @@ static av_noinline void OPNAME ## h264_qpel8or16_hv_lowpass_ ## MMX(uint8_t *dst
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"decl %2 \n\t"\
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" jnz 1b \n\t"\
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: "+a"(tmp), "+c"(dst), "+m"(h)\
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: "S"((long)dstStride), "m"(ff_pw_32)\
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: "S"((long)dstStride), "m"(*ff_pw_32)\
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: "memory"\
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);\
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tmp += 8 - size*24;\
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