rv40: x86 SIMD for biweight
Provide MMX, SSE2 and SSSE3 versions, with a fast-path when the weights are multiples of 512 (which is often the case when the values round up nicely). *_TIMER report for the 16x16 and 8x8 cases: C: 9015 decicycles in 16, 524257 runs, 31 skips 2656 decicycles in 8, 524271 runs, 17 skips MMX: 4156 decicycles in 16, 262090 runs, 54 skips 1206 decicycles in 8, 262131 runs, 13 skips MMX on fast-path: 2760 decicycles in 16, 524222 runs, 66 skips 995 decicycles in 8, 524252 runs, 36 skips SSE2: 2163 decicycles in 16, 262131 runs, 13 skips 832 decicycles in 8, 262137 runs, 7 skips SSE2 with fast path: 1783 decicycles in 16, 524276 runs, 12 skips 711 decicycles in 8, 524283 runs, 5 skips SSSE3: 2117 decicycles in 16, 262136 runs, 8 skips 814 decicycles in 8, 262143 runs, 1 skips SSSE3 with fast path: 1315 decicycles in 16, 524285 runs, 3 skips 578 decicycles in 8, 524286 runs, 2 skips This means around a 4% speedup for some sequences. Signed-off-by: Diego Biurrun <diego@biurrun.de>
This commit is contained in:
		
				
					committed by
					
						
						Diego Biurrun
					
				
			
			
				
	
			
			
			
						parent
						
							91bafb52ae
						
					
				
				
					commit
					e5c9de2ab7
				
			@@ -28,7 +28,8 @@ MMX-OBJS-$(CONFIG_RV30_DECODER)        += x86/rv34dsp_init.o
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YASM-OBJS-$(CONFIG_RV30_DECODER)       += x86/rv34dsp.o
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					YASM-OBJS-$(CONFIG_RV30_DECODER)       += x86/rv34dsp.o
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MMX-OBJS-$(CONFIG_RV40_DECODER)        += x86/rv34dsp_init.o            \
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					MMX-OBJS-$(CONFIG_RV40_DECODER)        += x86/rv34dsp_init.o            \
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                                          x86/rv40dsp_init.o
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					                                          x86/rv40dsp_init.o
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YASM-OBJS-$(CONFIG_RV40_DECODER)       += x86/rv34dsp.o
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					YASM-OBJS-$(CONFIG_RV40_DECODER)       += x86/rv34dsp.o                 \
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					                                          x86/rv40dsp.o
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YASM-OBJS-$(CONFIG_VC1_DECODER)        += x86/vc1dsp_yasm.o
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					YASM-OBJS-$(CONFIG_VC1_DECODER)        += x86/vc1dsp_yasm.o
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										207
									
								
								libavcodec/x86/rv40dsp.asm
									
									
									
									
									
										Normal file
									
								
							
							
						
						
									
										207
									
								
								libavcodec/x86/rv40dsp.asm
									
									
									
									
									
										Normal file
									
								
							@@ -0,0 +1,207 @@
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					;******************************************************************************
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					;* MMX/SSE2-optimized functions for the RV40 decoder
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					;* Copyright (C) 2012 Christophe Gisquet <christophe.gisquet@gmail.com>
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					;*
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					;* This file is part of Libav.
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					;*
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					;* Libav is free software; you can redistribute it and/or
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					;* modify it under the terms of the GNU Lesser General Public
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					;* License as published by the Free Software Foundation; either
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					;* version 2.1 of the License, or (at your option) any later version.
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					;*
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					;* Libav is distributed in the hope that it will be useful,
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					;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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					;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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					;* Lesser General Public License for more details.
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					;*
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					;* You should have received a copy of the GNU Lesser General Public
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					;* License along with Libav; if not, write to the Free Software
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					;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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					;******************************************************************************
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					%include "x86inc.asm"
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					%include "x86util.asm"
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					SECTION_RODATA
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					align 16
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					shift_round:   times 8 dw 1 << (16 - 6)
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					cextern pw_16
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					SECTION .text
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					; %1=5bits weights?, %2=dst %3=src1 %4=src3 %5=stride if sse2
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					%macro RV40_WCORE  4-5
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					    movh       m4, [%3 + 0]
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					    movh       m5, [%4 + 0]
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					%if %0 == 4
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					%define OFFSET mmsize / 2
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					%else
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					    ; 8x8 block and sse2, stride was provided
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					%define OFFSET %5
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					%endif
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					    movh       m6, [%3 + OFFSET]
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					    movh       m7, [%4 + OFFSET]
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					%if %1 == 0
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					    ; 14bits weights
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					    punpcklbw  m4, m0
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					    punpcklbw  m5, m0
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					    punpcklbw  m6, m0
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					    punpcklbw  m7, m0
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					    psllw      m4, 7
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					    psllw      m5, 7
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					    psllw      m6, 7
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					    psllw      m7, 7
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					    pmulhw     m4, m3
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					    pmulhw     m5, m2
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					    pmulhw     m6, m3
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					    pmulhw     m7, m2
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					    paddw      m4, m5
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					    paddw      m6, m7
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					%else
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					    ; 5bits weights
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					%if cpuflag(ssse3)
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					    punpcklbw  m4, m5
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					    punpcklbw  m6, m7
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					    pmaddubsw  m4, m3
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					    pmaddubsw  m6, m3
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					%else
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					    punpcklbw  m4, m0
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					    punpcklbw  m5, m0
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					    punpcklbw  m6, m0
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					    punpcklbw  m7, m0
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					    pmullw     m4, m3
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					    pmullw     m5, m2
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					    pmullw     m6, m3
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					    pmullw     m7, m2
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					    paddw      m4, m5
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					    paddw      m6, m7
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					%endif
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					%endif
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					    ; bias and shift down
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					%if cpuflag(ssse3)
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					    pmulhrsw   m4, m1
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					    pmulhrsw   m6, m1
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					%else
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					    paddw      m4, m1
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					    paddw      m6, m1
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					    psrlw      m4, 5
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					    psrlw      m6, 5
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					%endif
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					    packuswb   m4, m6
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					%if %0 == 5
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					    ; Only called for 8x8 blocks and sse2
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					    movh       [%2 +  0], m4
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					    movhps     [%2 + %5], m4
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					%else
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					    mova       [%2], m4
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					%endif
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					%endmacro
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					%macro MAIN_LOOP   2
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					%if mmsize == 8
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					    RV40_WCORE %2, r0, r1, r2
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					%if %1 == 16
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					    RV40_WCORE %2, r0 + 8, r1 + 8, r2 + 8
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					%endif
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					    ; Prepare for next loop
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					    add        r0, r5
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					    add        r1, r5
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					    add        r2, r5
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					%else
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					%ifidn %1, 8
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					    RV40_WCORE %2, r0, r1, r2, r5
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					    ; Prepare 2 next lines
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					    lea        r0, [r0 + 2 * r5]
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					    lea        r1, [r1 + 2 * r5]
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					    lea        r2, [r2 + 2 * r5]
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					%else
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					    RV40_WCORE %2, r0, r1, r2
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					    ; Prepare single next line
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					    add        r0, r5
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					    add        r1, r5
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					    add        r2, r5
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					%endif
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					%endif
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					    dec        r6
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					%endmacro
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					; rv40_weight_func_%1(uint8_t *dst, uint8_t *src1, uint8_t *src2, int w1, int w2, int stride)
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					; %1=size  %2=num of xmm regs
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					%macro RV40_WEIGHT  2
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					cglobal rv40_weight_func_%1, 6, 7, %2
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					%if cpuflag(ssse3)
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					    mova       m1, [shift_round]
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					%else
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					    mova       m1, [pw_16]
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					%endif
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					    pxor       m0, m0
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					    mov        r6, r3
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					    or         r6, r4
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					    ; The weights are FP0.14 notation of fractions depending on pts.
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					    ; For timebases without rounding error (i.e. PAL), the fractions
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					    ; can be simplified, and several operations can be avoided.
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					    ; Therefore, we check here whether they are multiples of 2^9 for
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					    ; those simplifications to occur.
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					    and        r6, 0x1FF
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					    ; Set loop counter and increments
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					%if mmsize == 8
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					    mov        r6, %1
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					%else
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					    mov        r6, (%1 * %1) / mmsize
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					%endif
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					    ; Use result of test now
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					    jz .loop_512
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					    movd       m2, r3
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					    movd       m3, r4
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					    SPLATW     m2, m2
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					    SPLATW     m3, m3
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					.loop:
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					    MAIN_LOOP  %1, 0
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					    jnz        .loop
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					    REP_RET
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					    ; Weights are multiple of 512, which allows some shortcuts
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					.loop_512:
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					    sar        r3, 9
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					    sar        r4, 9
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					    movd       m2, r3
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					    movd       m3, r4
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					%if cpuflag(ssse3)
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					    punpcklbw  m3, m2
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					    SPLATW     m3, m3
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					%else
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					    SPLATW     m2, m2
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					    SPLATW     m3, m3
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					%endif
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					.loop2:
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					    MAIN_LOOP  %1, 1
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					    jnz        .loop2
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					    REP_RET
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					%endmacro
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					INIT_MMX mmx
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					RV40_WEIGHT    8, 0
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					RV40_WEIGHT   16, 0
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					INIT_XMM sse2
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					RV40_WEIGHT    8, 8
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					RV40_WEIGHT   16, 8
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					INIT_XMM ssse3
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					RV40_WEIGHT    8, 8
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					RV40_WEIGHT   16, 8
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@@ -40,6 +40,15 @@ void ff_avg_rv40_chroma_mc4_mmx2 (uint8_t *dst, uint8_t *src,
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void ff_avg_rv40_chroma_mc4_3dnow(uint8_t *dst, uint8_t *src,
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					void ff_avg_rv40_chroma_mc4_3dnow(uint8_t *dst, uint8_t *src,
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                                  int stride, int h, int x, int y);
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					                                  int stride, int h, int x, int y);
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					#define DECLARE_WEIGHT(opt) \
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					void ff_rv40_weight_func_16_##opt(uint8_t *dst, uint8_t *src1, uint8_t *src2, \
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					                                  int w1, int w2, int stride); \
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					void ff_rv40_weight_func_8_##opt (uint8_t *dst, uint8_t *src1, uint8_t *src2, \
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					                                  int w1, int w2, int stride);
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					DECLARE_WEIGHT(mmx)
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					DECLARE_WEIGHT(sse2)
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					DECLARE_WEIGHT(ssse3)
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void ff_rv40dsp_init_x86(RV34DSPContext *c, DSPContext *dsp)
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					void ff_rv40dsp_init_x86(RV34DSPContext *c, DSPContext *dsp)
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{
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					{
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#if HAVE_YASM
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					#if HAVE_YASM
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@@ -48,6 +57,8 @@ void ff_rv40dsp_init_x86(RV34DSPContext *c, DSPContext *dsp)
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    if (mm_flags & AV_CPU_FLAG_MMX) {
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					    if (mm_flags & AV_CPU_FLAG_MMX) {
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        c->put_chroma_pixels_tab[0] = ff_put_rv40_chroma_mc8_mmx;
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					        c->put_chroma_pixels_tab[0] = ff_put_rv40_chroma_mc8_mmx;
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        c->put_chroma_pixels_tab[1] = ff_put_rv40_chroma_mc4_mmx;
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					        c->put_chroma_pixels_tab[1] = ff_put_rv40_chroma_mc4_mmx;
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					        c->rv40_weight_pixels_tab[0] = ff_rv40_weight_func_16_mmx;
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					        c->rv40_weight_pixels_tab[1] = ff_rv40_weight_func_8_mmx;
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    }
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					    }
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    if (mm_flags & AV_CPU_FLAG_MMX2) {
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					    if (mm_flags & AV_CPU_FLAG_MMX2) {
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        c->avg_chroma_pixels_tab[0] = ff_avg_rv40_chroma_mc8_mmx2;
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					        c->avg_chroma_pixels_tab[0] = ff_avg_rv40_chroma_mc8_mmx2;
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@@ -56,5 +67,13 @@ void ff_rv40dsp_init_x86(RV34DSPContext *c, DSPContext *dsp)
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        c->avg_chroma_pixels_tab[0] = ff_avg_rv40_chroma_mc8_3dnow;
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					        c->avg_chroma_pixels_tab[0] = ff_avg_rv40_chroma_mc8_3dnow;
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        c->avg_chroma_pixels_tab[1] = ff_avg_rv40_chroma_mc4_3dnow;
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					        c->avg_chroma_pixels_tab[1] = ff_avg_rv40_chroma_mc4_3dnow;
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    }
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					    }
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					    if (mm_flags & AV_CPU_FLAG_SSE2) {
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					        c->rv40_weight_pixels_tab[0] = ff_rv40_weight_func_16_sse2;
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					        c->rv40_weight_pixels_tab[1] = ff_rv40_weight_func_8_sse2;
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					    }
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					    if (mm_flags & AV_CPU_FLAG_SSSE3) {
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					        c->rv40_weight_pixels_tab[0] = ff_rv40_weight_func_16_ssse3;
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			||||||
 | 
					        c->rv40_weight_pixels_tab[1] = ff_rv40_weight_func_8_ssse3;
 | 
				
			||||||
 | 
					    }
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 
 | 
				
			|||||||
		Reference in New Issue
	
	Block a user