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cosmetics: __asm__ __volatile__ --> asm volatile

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Originally committed as revision 12885 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Diego Biurrun
2008-04-17 21:57:52 +00:00
parent c6d4cef7c3
commit c88c253d8b
11 changed files with 106 additions and 106 deletions
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50
libavcodec/sparc/vis.h
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@@ -55,97 +55,97 @@
#define vis_rd_d(X) (vis_dreg(X) << 25)
#define vis_ss2s(opf,rs1,rs2,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_s(rs1) | \
vis_rs2_s(rs2) | \
vis_rd_s(rd)))
#define vis_dd2d(opf,rs1,rs2,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_d(rs1) | \
vis_rs2_d(rs2) | \
vis_rd_d(rd)))
#define vis_ss2d(opf,rs1,rs2,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_s(rs1) | \
vis_rs2_s(rs2) | \
vis_rd_d(rd)))
#define vis_sd2d(opf,rs1,rs2,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_s(rs1) | \
vis_rs2_d(rs2) | \
vis_rd_d(rd)))
#define vis_d2s(opf,rs2,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs2_d(rs2) | \
vis_rd_s(rd)))
#define vis_s2d(opf,rs2,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs2_s(rs2) | \
vis_rd_d(rd)))
#define vis_d12d(opf,rs1,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_d(rs1) | \
vis_rd_d(rd)))
#define vis_d22d(opf,rs2,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs2_d(rs2) | \
vis_rd_d(rd)))
#define vis_s12s(opf,rs1,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs1_s(rs1) | \
vis_rd_s(rd)))
#define vis_s22s(opf,rs2,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rs2_s(rs2) | \
vis_rd_s(rd)))
#define vis_s(opf,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rd_s(rd)))
#define vis_d(opf,rd) \
__asm__ __volatile__ (".word %0" \
asm volatile (".word %0" \
: : "i" (vis_opc_base | vis_opf(opf) | \
vis_rd_d(rd)))
#define vis_r2m(op,rd,mem) \
__asm__ __volatile__ (#op "\t%%f" #rd ", [%0]" : : "r" (&(mem)) )
asm volatile (#op "\t%%f" #rd ", [%0]" : : "r" (&(mem)) )
#define vis_r2m_2(op,rd,mem1,mem2) \
__asm__ __volatile__ (#op "\t%%f" #rd ", [%0 + %1]" : : "r" (mem1), "r" (mem2) )
asm volatile (#op "\t%%f" #rd ", [%0 + %1]" : : "r" (mem1), "r" (mem2) )
#define vis_m2r(op,mem,rd) \
__asm__ __volatile__ (#op "\t[%0], %%f" #rd : : "r" (&(mem)) )
asm volatile (#op "\t[%0], %%f" #rd : : "r" (&(mem)) )
#define vis_m2r_2(op,mem1,mem2,rd) \
__asm__ __volatile__ (#op "\t[%0 + %1], %%f" #rd : : "r" (mem1), "r" (mem2) )
asm volatile (#op "\t[%0 + %1], %%f" #rd : : "r" (mem1), "r" (mem2) )
static inline void vis_set_gsr(unsigned int _val)
{
register unsigned int val asm("g1");
val = _val;
__asm__ __volatile__(".word 0xa7804000"
asm volatile(".word 0xa7804000"
: : "r" (val));
}
@@ -166,7 +166,7 @@ static inline void vis_set_gsr(unsigned int _val)
#define vis_ldblk(mem, rd) \
do { register void *__mem asm("g1"); \
__mem = &(mem); \
__asm__ __volatile__(".word 0xc1985e00 | %1" \
asm volatile(".word 0xc1985e00 | %1" \
: \
: "r" (__mem), \
"i" (vis_rd_d(rd)) \
@@ -176,7 +176,7 @@ do { register void *__mem asm("g1"); \
#define vis_stblk(rd, mem) \
do { register void *__mem asm("g1"); \
__mem = &(mem); \
__asm__ __volatile__(".word 0xc1b85e00 | %1" \
asm volatile(".word 0xc1b85e00 | %1" \
: \
: "r" (__mem), \
"i" (vis_rd_d(rd)) \
@@ -184,10 +184,10 @@ do { register void *__mem asm("g1"); \
} while (0)
#define vis_membar_storestore() \
__asm__ __volatile__(".word 0x8143e008" : : : "memory")
asm volatile(".word 0x8143e008" : : : "memory")
#define vis_membar_sync() \
__asm__ __volatile__(".word 0x8143e040" : : : "memory")
asm volatile(".word 0x8143e040" : : : "memory")
/* 16 and 32 bit partitioned addition and subtraction. The normal
* versions perform 4 16-bit or 2 32-bit additions or subtractions.
@@ -230,7 +230,7 @@ static inline void *vis_alignaddr(void *_ptr)
ptr = _ptr;
__asm__ __volatile__(".word %2"
asm volatile(".word %2"
: "=&r" (ptr)
: "0" (ptr),
"i" (vis_opc_base | vis_opf(0x18) |
@@ -247,7 +247,7 @@ static inline void vis_alignaddr_g0(void *_ptr)
ptr = _ptr;
__asm__ __volatile__(".word %2"
asm volatile(".word %2"
: "=&r" (ptr)
: "0" (ptr),
"i" (vis_opc_base | vis_opf(0x18) |
@@ -262,7 +262,7 @@ static inline void *vis_alignaddrl(void *_ptr)
ptr = _ptr;
__asm__ __volatile__(".word %2"
asm volatile(".word %2"
: "=&r" (ptr)
: "0" (ptr),
"i" (vis_opc_base | vis_opf(0x19) |
@@ -279,7 +279,7 @@ static inline void vis_alignaddrl_g0(void *_ptr)
ptr = _ptr;
__asm__ __volatile__(".word %2"
asm volatile(".word %2"
: "=&r" (ptr)
: "0" (ptr),
"i" (vis_opc_base | vis_opf(0x19) |