Merge remote-tracking branch 'qatar/master'
* qatar/master: sparc: Eliminate dead code in VIS acceleration macros flacdec: drop unnecessary assert mjpegdec: properly report unsupported disabled features Conflicts: libavcodec/flacdec.c libavcodec/mjpegdec.c Merged-by: Michael Niedermayer <michaelni@gmx.at>
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c607a2cc97
@ -1682,6 +1682,13 @@ int ff_mjpeg_decode_frame(AVCodecContext *avctx, void *data, int *got_frame,
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mjpeg_decode_com(s);
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ret = -1;
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if (!CONFIG_JPEGLS_DECODER &&
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(start_code == SOF48 || start_code == LSE)) {
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av_log(avctx, AV_LOG_ERROR, "JPEG-LS support not enabled.\n");
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return AVERROR(ENOSYS);
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}
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switch (start_code) {
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case SOI:
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s->restart_interval = 0;
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@ -173,32 +173,6 @@ static inline void vis_set_gsr(unsigned int _val)
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#define vis_st64(rs1,mem) vis_r2m(std, rs1, mem)
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#define vis_st64_2(rs1,mem1,mem2) vis_r2m_2(std, rs1, mem1, mem2)
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#define vis_ldblk(mem, rd) \
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do { register void *__mem __asm__("g1"); \
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__mem = &(mem); \
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__asm__ volatile(".word 0xc1985e00 | %1" \
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: \
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: "r" (__mem), \
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"i" (vis_rd_d(rd)) \
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: "memory"); \
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} while (0)
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#define vis_stblk(rd, mem) \
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do { register void *__mem __asm__("g1"); \
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__mem = &(mem); \
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__asm__ volatile(".word 0xc1b85e00 | %1" \
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: \
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: "r" (__mem), \
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"i" (vis_rd_d(rd)) \
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: "memory"); \
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} while (0)
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#define vis_membar_storestore() \
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__asm__ volatile(".word 0x8143e008" : : : "memory")
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#define vis_membar_sync() \
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__asm__ volatile(".word 0x8143e040" : : : "memory")
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/* 16 and 32 bit partitioned addition and subtraction. The normal
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* versions perform 4 16-bit or 2 32-bit additions or subtractions.
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* The 's' versions perform 2 16-bit or 1 32-bit additions or
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@ -266,38 +240,6 @@ static inline void vis_alignaddr_g0(void *_ptr)
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vis_rd_s(0)));
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}
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static inline void *vis_alignaddrl(void *_ptr)
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{
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register void *ptr __asm__("g1");
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ptr = _ptr;
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__asm__ volatile(".word %2"
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: "=&r" (ptr)
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: "0" (ptr),
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"i" (vis_opc_base | vis_opf(0x19) |
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vis_rs1_s(1) |
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vis_rs2_s(0) |
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vis_rd_s(1)));
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return ptr;
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}
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static inline void vis_alignaddrl_g0(void *_ptr)
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{
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register void *ptr __asm__("g1");
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ptr = _ptr;
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__asm__ volatile(".word %2"
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: "=&r" (ptr)
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: "0" (ptr),
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"i" (vis_opc_base | vis_opf(0x19) |
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vis_rs1_s(1) |
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vis_rs2_s(0) |
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vis_rd_s(0)));
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}
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#define vis_faligndata(rs1,rs2,rd) vis_dd2d(0x48, rs1, rs2, rd)
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/* Logical operate instructions. */
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