x86/cpu: implement support for cpuid through intrinsics
Signed-off-by: Martin Storsjö <martin@martin.st>
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configure
vendored
2
configure
vendored
@ -1061,6 +1061,7 @@ HAVE_LIST="
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cbrtf
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closesocket
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cmov
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cpuid
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dcbzl
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dev_bktr_ioctl_bt848_h
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dev_bktr_ioctl_meteor_h
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@ -2744,6 +2745,7 @@ elif enabled sparc; then
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elif enabled x86; then
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check_code ld immintrin.h "__xgetbv(0)" && enable xgetbv
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check_code ld intrin.h "int info[4]; __cpuid(info, 0)" && enable cpuid
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check_code ld intrin.h "__rdtsc()" && enable rdtsc
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check_code ld mmintrin.h "_mm_empty()" && enable mm_empty
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@ -25,6 +25,7 @@
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#include "libavutil/x86_cpu.h"
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#include "libavutil/cpu.h"
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#if HAVE_INLINE_ASM
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/* ebx saving is necessary for PIC. gcc seems unable to see it alone */
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#define cpuid(index, eax, ebx, ecx, edx) \
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__asm__ volatile ( \
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@ -33,6 +34,19 @@
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"xchg %%"REG_b", %%"REG_S \
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: "=a" (eax), "=S" (ebx), "=c" (ecx), "=d" (edx) \
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: "0" (index))
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#elif HAVE_CPUID
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#include <intrin.h>
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#define cpuid(index, eax, ebx, ecx, edx) \
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do { \
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int info[4]; \
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__cpuid(info, index); \
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eax = info[0]; \
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ebx = info[1]; \
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ecx = info[2]; \
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edx = info[3]; \
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} while (0)
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#endif /* HAVE_CPUID */
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#if HAVE_INLINE_ASM
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#define xgetbv(index, eax, edx) \
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