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configure: build fix for P5600 with mips code restructuring

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Note:- backporting commit 15ef98afd10b3696d29fb6d19606ba03a9dd47ad from head

Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
This commit is contained in:
Shivraj Patil 2016-04-26 12:17:15 +05:30 committed by Michael Niedermayer
parent a5638dbfba
commit 83eaaae005
1 changed files with 120 additions and 132 deletions
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252
configure vendored
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@ -913,6 +913,25 @@ void foo(void){ __asm__ volatile($code); }
EOF EOF
} }
check_inline_asm_flags(){
log check_inline_asm_flags "$@"
name="$1"
code="$2"
flags=''
shift 2
while [ "$1" != "" ]; do
append flags $1
shift
done;
disable $name
cat > $TMPC <<EOF
void foo(void){ __asm__ volatile($code); }
EOF
log_file $TMPC
check_cmd $cc $CPPFLAGS $CFLAGS $flags "$@" $CC_C $(cc_o $TMPO) $TMPC &&
enable $name && add_cflags $flags && add_asflags $flags && add_ldflags $flags
}
check_insn(){ check_insn(){
log check_insn "$@" log check_insn "$@"
check_inline_asm ${1}_inline "\"$2\"" check_inline_asm ${1}_inline "\"$2\""
@ -1657,6 +1676,7 @@ ARCH_EXT_LIST_ARM="
ARCH_EXT_LIST_MIPS=" ARCH_EXT_LIST_MIPS="
mipsfpu mipsfpu
mips32r2 mips32r2
mips32r5
mips64r2 mips64r2
mips32r6 mips32r6
mips64r6 mips64r6
@ -2150,10 +2170,11 @@ mipsfpu_deps="mips"
mipsdsp_deps="mips" mipsdsp_deps="mips"
mipsdspr2_deps="mips" mipsdspr2_deps="mips"
mips32r2_deps="mips" mips32r2_deps="mips"
mips32r5_deps="mips"
mips32r6_deps="mips" mips32r6_deps="mips"
mips64r2_deps="mips" mips64r2_deps="mips"
mips64r6_deps="mips" mips64r6_deps="mips"
msa_deps="mips" msa_deps="mipsfpu"
mmi_deps="mips" mmi_deps="mips"
altivec_deps="ppc" altivec_deps="ppc"
@ -4153,118 +4174,90 @@ elif enabled mips; then
cpuflags="-march=$cpu" cpuflags="-march=$cpu"
case $cpu in if [ "$cpu" != "generic" ]; then
24kc) disable mips32r2
disable mips32r6 disable mips32r5
disable mips64r2 disable mips64r2
disable mips64r6 disable mips32r6
disable mipsfpu disable mips64r6
disable mipsdsp disable loongson2
disable mipsdspr2 disable loongson3
disable msa
;; case $cpu in
24kf*) 24kc|24kf*|24kec|34kc|1004kc|24kef*|34kf*|1004kf*|74kc|74kf)
disable mips32r6 enable mips32r2
disable mips64r2 disable msa
disable mips64r6 ;;
disable mipsdsp p5600|i6400)
disable mipsdspr2 disable mipsdsp
disable msa disable mipsdspr2
;; ;;
24kec|34kc|1004kc) loongson*)
disable mips32r6 enable loongson2
disable mips64r2 enable loongson3
disable mips64r6 enable local_aligned_8 local_aligned_16 local_aligned_32
disable mipsfpu enable simd_align_16
disable mipsdspr2 enable fast_64bit
disable msa enable fast_clz
;; enable fast_cmov
24kef*|34kf*|1004kf*) enable fast_unaligned
disable mips32r6 disable aligned_stack
disable mips64r2 case $cpu in
disable mips64r6 loongson3*)
disable mipsdspr2 cpuflags="-march=loongson3a -mhard-float -fno-expensive-optimizations"
disable msa ;;
;; loongson2e)
74kc) cpuflags="-march=loongson2e -mhard-float -fno-expensive-optimizations"
disable mips32r6 ;;
disable mips64r2 loongson2f)
disable mips64r6 cpuflags="-march=loongson2f -mhard-float -fno-expensive-optimizations"
disable mipsfpu ;;
disable msa esac
;; ;;
74kf) *)
disable mips32r6 # Unknown CPU. Disable everything.
disable mips64r2 warn "unknown CPU. Disabling all MIPS optimizations."
disable mips64r6 disable mipsfpu
disable msa disable mipsdsp
;; disable mipsdspr2
p5600) disable msa
disable mips32r6 disable mmi
disable mips64r2 ;;
disable mips64r6 esac
disable mipsdsp
disable mipsdspr2 case $cpu in
check_cflags "-mtune=p5600" && 24kc)
check_cflags "-mfp64 -msched-weight -mload-store-pairs -funroll-loops" && disable mipsfpu
add_asflags "-mfp64" disable mipsdsp
;; disable mipsdspr2
i6400) ;;
disable mips32r2 24kf*)
disable mips32r6 disable mipsdsp
disable mips64r2 disable mipsdspr2
disable mipsdsp ;;
disable mipsdspr2 24kec|34kc|1004kc)
check_cflags "-mtune=i6400 -mabi=64" && disable mipsfpu
check_cflags "-mfp64 -msched-weight -mload-store-pairs -funroll-loops" && disable mipsdspr2
check_ldflags "-mabi=64" && ;;
add_asflags "-mfp64" 24kef*|34kf*|1004kf*)
;; disable mipsdspr2
loongson*) ;;
disable mips32r2 74kc)
disable mips32r6 disable mipsfpu
disable mips64r2 ;;
disable mips64r6 p5600)
disable mipsfpu enable mips32r5
disable mipsdsp check_cflags "-mtune=p5600" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops"
disable mipsdspr2 ;;
disable msa i6400)
enable local_aligned_8 local_aligned_16 local_aligned_32 enable mips64r6
enable simd_align_16 check_cflags "-mtune=i6400 -mabi=64" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64"
enable fast_64bit ;;
enable fast_clz esac
enable fast_cmov else
enable fast_unaligned # We do not disable anything. Is up to the user to disable the unwanted features.
disable aligned_stack warn 'generic cpu selected'
case $cpu in fi
loongson3*)
cpuflags="-march=loongson3a -mhard-float -fno-expensive-optimizations"
;;
loongson2e)
cpuflags="-march=loongson2e -mhard-float -fno-expensive-optimizations"
;;
loongson2f)
cpuflags="-march=loongson2f -mhard-float -fno-expensive-optimizations"
;;
esac
;;
generic)
disable mips64r6
disable msa
;;
*)
# Unknown CPU. Disable everything.
warn "unknown CPU. Disabling all MIPS optimizations."
disable mipsfpu
disable mips32r2
disable mips32r6
disable mips64r2
disable mips64r6
disable mipsdsp
disable mipsdspr2
disable msa
;;
esac
elif enabled ppc; then elif enabled ppc; then
@ -5073,27 +5066,22 @@ elif enabled mips; then
enabled mmi && check_inline_asm mmi '"punpcklhw $f0, $f0, $f0"' enabled mmi && check_inline_asm mmi '"punpcklhw $f0, $f0, $f0"'
# Enable minimum ISA based on selected options # Enable minimum ISA based on selected options
if enabled mips64 && (enabled mipsdsp || enabled mipsdspr2); then if enabled mips64; then
add_cflags "-mips64r2" enabled mips64r6 && check_inline_asm_flags mips64r6 '"dlsa $0, $0, $0, 1"' '-mips64r6'
add_asflags "-mips64r2" enabled mips64r2 && check_inline_asm_flags mips64r2 '"dext $0, $0, 0, 1"' '-mips64r2'
elif enabled mips64 && enabled mipsfpu && disabled loongson2 && disabled loongson3; then disabled mips64r6 && disabled mips64r2 && check_inline_asm_flags mips64r1 '"daddi $0, $0, 0"' '-mips64'
add_cflags "-mips64" else
add_asflags "-mips64" enabled mips32r6 && check_inline_asm_flags mips32r6 '"aui $0, $0, 0"' '-mips32r6'
elif enabled mipsdsp || enabled mipsdspr2; then enabled mips32r5 && check_inline_asm_flags mips32r5 '"eretnc"' '-mips32r5'
add_cflags "-mips32r2 -mfp32" enabled mips32r2 && check_inline_asm_flags mips32r2 '"ext $0, $0, 0, 1"' '-mips32r2'
add_asflags "-mips32r2 -mfp32" disabled mips32r6 && disabled mips32r5 && disabled mips32r2 && check_inline_asm_flags mips32r1 '"addi $0, $0, 0"' '-mips32'
fi fi
enabled mipsdsp && add_cflags "-mdsp" && add_asflags "-mdsp" && enabled mipsfpu && check_inline_asm_flags mipsfpu '"cvt.d.l $f0, $f2"' '-mhard-float'
check_inline_asm mipsdsp '"addu.qb $t0, $t1, $t2"' enabled mipsfpu && (enabled mips32r5 || enabled mips32r6 || enabled mips64r6) && check_inline_asm_flags mipsfpu '"cvt.d.l $f0, $f1"' '-mfp64'
enabled mipsdspr2 && add_cflags "-mdspr2" && add_asflags "-mdspr2" && enabled mipsfpu && enabled msa && check_inline_asm_flags msa '"addvi.b $w0, $w1, 1"' '-mmsa' && check_header msa.h || disable msa
check_inline_asm mipsdspr2 '"absq_s.qb $t0, $t1"' enabled mipsdsp && check_inline_asm_flags mipsdsp '"addu.qb $t0, $t1, $t2"' '-mdsp'
enabled mipsfpu && add_cflags "-mhard-float" && add_asflags "-mhard-float" && enabled mipsdspr2 && check_inline_asm_flags mipsdspr2 '"absq_s.qb $t0, $t1"' '-mdspr2'
check_inline_asm mipsfpu '"madd.d $f0, $f2, $f4, $f6"'
enabled msa && check_cflags "-mmsa" && check_ldflags "-mmsa" &&
check_inline_asm msa '"addvi.b $w0, $w1, 1"'
enabled msa && add_asflags "-mmsa"
elif enabled parisc; then elif enabled parisc; then