ppc: fix 32-bit PIC build
On 32-bit ppc, the GOT pointer must be loaded manually. This adds a "get_got" assembler macro to compute the GOT address. The "movrel" macro is updated to take an additional parameter containing the GOT address since no register is reserved for this purpose on ppc32. These changes have no effect on ppc64 builds. Signed-off-by: Mans Rullgard <mans@mansr.com>
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@ -44,10 +44,13 @@ X(\name):
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L(\name):
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.endm
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.macro movrel rd, sym
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.macro movrel rd, sym, gp
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ld \rd, \sym@got(r2)
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.endm
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.macro get_got rd
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.endm
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#else /* ARCH_PPC64 */
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#define PTR .int
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@ -65,15 +68,25 @@ X(\name):
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\name:
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.endm
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.macro movrel rd, sym
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.macro movrel rd, sym, gp
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#if CONFIG_PIC
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lwz \rd, \sym@got(r2)
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lwz \rd, \sym@got(\gp)
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#else
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lis \rd, \sym@ha
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la \rd, \sym@l(\rd)
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#endif
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.endm
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.macro get_got rd
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#if CONFIG_PIC
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bcl 20, 31, .Lgot\@
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.Lgot\@:
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mflr \rd
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addis \rd, \rd, _GLOBAL_OFFSET_TABLE_ - .Lgot\@@ha
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addi \rd, \rd, _GLOBAL_OFFSET_TABLE_ - .Lgot\@@l
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#endif
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.endm
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#endif /* ARCH_PPC64 */
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#if HAVE_IBM_ASM
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@ -353,6 +353,7 @@ extfunc ff_fft_calc\interleave\()_altivec
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mflr r0
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stp r0, 2*PS(r1)
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stpu r1, -(160+16*PS)(r1)
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get_got r11
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addi r6, r1, 16*PS
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stvm r6, v20, v21, v22, v23, v24, v25, v26, v27, v28, v29
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mfvrsave r0
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@ -360,14 +361,14 @@ extfunc ff_fft_calc\interleave\()_altivec
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li r6, 0xfffffffc
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mtvrsave r6
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movrel r6, fft_data
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movrel r6, fft_data, r11
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lvm r6, v14, v15, v16, v17, v18, v19, v20, v21
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lvm r6, v22, v23, v24, v25, v26, v27, v28, v29
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li r9, 16
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movrel r12, X(ff_cos_tabs)
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movrel r12, X(ff_cos_tabs), r11
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movrel r6, fft_dispatch_tab\interleave\()_altivec
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movrel r6, fft_dispatch_tab\interleave\()_altivec, r11
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lwz r3, 0(r3)
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subi r3, r3, 2
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slwi r3, r3, 2+ARCH_PPC64
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