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mips: intreadwrite: fix inline asm for gcc 4.8

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Just like gcc 4.6 and later on ARM, gcc 4.8 on MIPS generates
inefficient code when a known-unaligned location is used as a
memory input operand.  This applies the same fix as has been
previously done to the ARM version of the code.

Signed-off-by: Mans Rullgard <mans@mansr.com>
This commit is contained in:
Mans Rullgard 2012-05-05 23:38:15 +01:00
parent b82b49a5b7
commit 6766169c41
1 changed files with 5 additions and 2 deletions
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7
libavutil/mips/intreadwrite.h
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@ -29,12 +29,15 @@
#define AV_RN32 AV_RN32 #define AV_RN32 AV_RN32
static av_always_inline uint32_t AV_RN32(const void *p) static av_always_inline uint32_t AV_RN32(const void *p)
{ {
struct __attribute__((packed)) u32 { uint32_t v; };
const uint8_t *q = p;
const struct u32 *pl = (const struct u32 *)(q + 3 * !HAVE_BIGENDIAN);
const struct u32 *pr = (const struct u32 *)(q + 3 * HAVE_BIGENDIAN);
uint32_t v; uint32_t v;
__asm__ ("lwl %0, %1 \n\t" __asm__ ("lwl %0, %1 \n\t"
"lwr %0, %2 \n\t" "lwr %0, %2 \n\t"
: "=&r"(v) : "=&r"(v)
: "m"(*(const uint32_t *)((const uint8_t *)p+3*!HAVE_BIGENDIAN)), : "m"(*pl), "m"(*pr));
"m"(*(const uint32_t *)((const uint8_t *)p+3*HAVE_BIGENDIAN)));
return v; return v;
} }