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cosmetics: indentation

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This commit is contained in:
Justin Ruggles 2011-03-21 23:33:00 -04:00
parent eba586b0d9
commit 45ed822550
1 changed files with 8 additions and 8 deletions
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16
libavutil/x86/cpu.c
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@ -137,14 +137,14 @@ int ff_get_cpu_flags_x86(void)
if (!strncmp(vendor.c, "GenuineIntel", 12)) { if (!strncmp(vendor.c, "GenuineIntel", 12)) {
if (family == 6 && (model == 9 || model == 13 || model == 14)) { if (family == 6 && (model == 9 || model == 13 || model == 14)) {
/* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah") /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah")
* theoretically support sse2, but it's usually slower than mmx, * theoretically support sse2, but it's usually slower than mmx,
* so let's just pretend they don't. AV_CPU_FLAG_SSE2 is disabled and * so let's just pretend they don't. AV_CPU_FLAG_SSE2 is disabled and
* AV_CPU_FLAG_SSE2SLOW is enabled so that SSE2 is not used unless * AV_CPU_FLAG_SSE2SLOW is enabled so that SSE2 is not used unless
* explicitly enabled by checking AV_CPU_FLAG_SSE2SLOW. The same * explicitly enabled by checking AV_CPU_FLAG_SSE2SLOW. The same
* situation applies for AV_CPU_FLAG_SSE3 and AV_CPU_FLAG_SSE3SLOW. */ * situation applies for AV_CPU_FLAG_SSE3 and AV_CPU_FLAG_SSE3SLOW. */
if (rval & AV_CPU_FLAG_SSE2) rval ^= AV_CPU_FLAG_SSE2SLOW|AV_CPU_FLAG_SSE2; if (rval & AV_CPU_FLAG_SSE2) rval ^= AV_CPU_FLAG_SSE2SLOW|AV_CPU_FLAG_SSE2;
if (rval & AV_CPU_FLAG_SSE3) rval ^= AV_CPU_FLAG_SSE3SLOW|AV_CPU_FLAG_SSE3; if (rval & AV_CPU_FLAG_SSE3) rval ^= AV_CPU_FLAG_SSE3SLOW|AV_CPU_FLAG_SSE3;
} }
/* The Atom processor has SSSE3 support, which is useful in many cases, /* The Atom processor has SSSE3 support, which is useful in many cases,
* but sometimes the SSSE3 version is slower than the SSE2 equivalent * but sometimes the SSSE3 version is slower than the SSE2 equivalent