Optimization of AMR NB and WB decoders for MIPS

AMR NB and WB decoders are optimized for MIPS architecture.
Appropriate Makefiles are changed accordingly.

Cnfigure script is changed in order to support optimizations.
 Optimizations are enabled by default when compiling is done for
  mips architecture.
 Appropriate cflags are automatically set.
 Support for several mips CPUs is added in configure script.

New ffmpeg options are added for disabling optimizations.

The FFMPEG option --disable-mipsfpu disables MIPS floating point
 optimizations.
The FFMPEG option --disable-mips32r2 disables MIPS32R2
 optimizations.
The FFMPEG option --disable-mipsdspr1 disables MIPS DSP ASE R1
 optimizations.
The FFMPEG option --disable-mipsdspr2 disables MIPS DSP ASE R2
 optimizations.

Signed-off-by: Nedeljko Babic <nbabic@mips.com>
Reviewed-by: Vitor Sessak <vitor1001@gmail.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
This commit is contained in:
Nedeljko Babic
2012-06-04 18:02:56 +02:00
committed by Michael Niedermayer
parent 751dcd9243
commit 3827a86eac
24 changed files with 1403 additions and 39 deletions

View File

@@ -205,3 +205,12 @@ void ff_celp_lp_zero_synthesis_filterf(float *out, const float *filter_coeffs,
out[n] += filter_coeffs[i-1] * in[n-i];
}
}
void ff_celp_filter_init(CELPFContext *c)
{
c->celp_lp_synthesis_filterf = ff_celp_lp_synthesis_filterf;
c->celp_lp_zero_synthesis_filterf = ff_celp_lp_zero_synthesis_filterf;
if(HAVE_MIPSFPU)
ff_celp_filter_init_mips(c);
}