SBR DSP x86: implement SSE sbr_hf_gen
Start and end index are multiple of 2, therefore guaranteeing aligned access. Also, this allows to generate 4 floats per loop, keeping the alignment all along. Timing: - 32 bits: 326c -> 172c - 64 bits: 323c -> 156c Signed-off-by: Diego Biurrun <diego@biurrun.de>
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@ -21,8 +21,11 @@
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%include "libavutil/x86/x86util.asm"
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%include "libavutil/x86/x86util.asm"
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;SECTION_RODATA
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SECTION_RODATA
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SECTION .text
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; mask equivalent for multiply by -1.0 1.0
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ps_mask times 2 dd 1<<31, 0
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SECTION_TEXT
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INIT_XMM sse
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INIT_XMM sse
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cglobal sbr_sum_square, 2, 3, 6
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cglobal sbr_sum_square, 2, 3, 6
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@ -112,3 +115,69 @@ cglobal sbr_hf_g_filt, 5, 6, 5
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jnz .loop1
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jnz .loop1
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.end:
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.end:
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RET
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RET
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; static void sbr_hf_gen_c(float (*X_high)[2], const float (*X_low)[2],
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; const float alpha0[2], const float alpha1[2],
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; float bw, int start, int end)
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;
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cglobal sbr_hf_gen, 4,4,8, X_high, X_low, alpha0, alpha1, BW, S, E
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; load alpha factors
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%define bw m0
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%if ARCH_X86_64 == 0 || WIN64
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movss bw, BWm
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%endif
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movlps m2, [alpha1q]
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movlps m1, [alpha0q]
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shufps bw, bw, 0
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mulps m2, bw ; (a1[0] a1[1])*bw
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mulps m1, bw ; (a0[0] a0[1])*bw = (a2 a3)
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mulps m2, bw ; (a1[0] a1[1])*bw*bw = (a0 a1)
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mova m3, m1
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mova m4, m2
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mova m7, [ps_mask]
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; Set pointers
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%if ARCH_X86_64 == 0 || WIN64
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; start and end 6th and 7th args on stack
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mov r2d, Sm
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mov r3d, Em
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%define start r2q
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%define end r3q
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%else
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; BW does not actually occupy a register, so shift by 1
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%define start BWq
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%define end Sq
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%endif
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sub start, end ; neg num of loops
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lea X_highq, [X_highq + end*2*4]
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lea X_lowq, [X_lowq + end*2*4 - 2*2*4]
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shl start, 3 ; offset from num loops
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mova m0, [X_lowq + start]
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movlhps m1, m1 ; (a2 a3 a2 a3)
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movlhps m2, m2 ; (a0 a1 a0 a1)
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shufps m3, m3, q0101 ; (a3 a2 a3 a2)
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shufps m4, m4, q0101 ; (a1 a0 a1 a0)
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xorps m3, m7 ; (-a3 a2 -a3 a2)
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xorps m4, m7 ; (-a1 a0 -a1 a0)
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.loop2:
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mova m5, m0
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mova m6, m0
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shufps m0, m0, q2200 ; {Xl[-2][0],",Xl[-1][0],"}
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shufps m5, m5, q3311 ; {Xl[-2][1],",Xl[-1][1],"}
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mulps m0, m2
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mulps m5, m4
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mova m7, m6
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addps m5, m0
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mova m0, [X_lowq + start + 2*2*4]
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shufps m6, m0, q0022 ; {Xl[-1][0],",Xl[0][0],"}
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shufps m7, m0, q1133 ; {Xl[-1][1],",Xl[1][1],"}
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mulps m6, m1
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mulps m7, m3
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addps m5, m6
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addps m7, m0
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addps m5, m7
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mova [X_highq + start], m5
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add start, 16
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jnz .loop2
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RET
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@ -27,6 +27,9 @@
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float ff_sbr_sum_square_sse(float (*x)[2], int n);
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float ff_sbr_sum_square_sse(float (*x)[2], int n);
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void ff_sbr_hf_g_filt_sse(float (*Y)[2], const float (*X_high)[40][2],
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void ff_sbr_hf_g_filt_sse(float (*Y)[2], const float (*X_high)[40][2],
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const float *g_filt, int m_max, intptr_t ixh);
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const float *g_filt, int m_max, intptr_t ixh);
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void ff_sbr_hf_gen_sse(float (*X_high)[2], const float (*X_low)[2],
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const float alpha0[2], const float alpha1[2],
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float bw, int start, int end);
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void ff_sbrdsp_init_x86(SBRDSPContext *s)
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void ff_sbrdsp_init_x86(SBRDSPContext *s)
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{
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{
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@ -35,5 +38,6 @@ void ff_sbrdsp_init_x86(SBRDSPContext *s)
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if (EXTERNAL_SSE(mm_flags)) {
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if (EXTERNAL_SSE(mm_flags)) {
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s->sum_square = ff_sbr_sum_square_sse;
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s->sum_square = ff_sbr_sum_square_sse;
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s->hf_g_filt = ff_sbr_hf_g_filt_sse;
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s->hf_g_filt = ff_sbr_hf_g_filt_sse;
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s->hf_gen = ff_sbr_hf_gen_sse;
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}
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}
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}
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}
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