ARM: remove MUL64 and MAC64 inline asm
Current GCC versions know how to generate these instructions properly and avoiding inline asm gives better code. The MULH function for ARMv5 uses the same instruction and is also not needed any more. The MLS64 macro remains since negating an input would normally not be allowed as it would fail for INT_MIN. In our uses, the inputs never have this value and thus negating is safe. Signed-off-by: Mans Rullgard <mans@mansr.com>
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@ -28,45 +28,16 @@
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#if HAVE_INLINE_ASM
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#define MULH MULH
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#define MUL64 MUL64
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#if HAVE_ARMV6
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#define MULH MULH
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static inline av_const int MULH(int a, int b)
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{
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int r;
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__asm__ ("smmul %0, %1, %2" : "=r"(r) : "r"(a), "r"(b));
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return r;
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}
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static inline av_const int64_t MUL64(int a, int b)
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{
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int64_t x;
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__asm__ ("smull %Q0, %R0, %1, %2" : "=r"(x) : "r"(a), "r"(b));
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return x;
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}
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#else
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static inline av_const int MULH(int a, int b)
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{
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int lo, hi;
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__asm__ ("smull %0, %1, %2, %3" : "=&r"(lo), "=&r"(hi) : "r"(b), "r"(a));
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return hi;
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}
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static inline av_const int64_t MUL64(int a, int b)
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{
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int64_t x;
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__asm__ ("smull %Q0, %R0, %1, %2" : "=&r"(x) : "r"(a), "r"(b));
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return x;
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}
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#endif
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static inline av_const int64_t MAC64(int64_t d, int a, int b)
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{
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__asm__ ("smlal %Q0, %R0, %1, %2" : "+r"(d) : "r"(a), "r"(b));
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return d;
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}
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#define MAC64(d, a, b) ((d) = MAC64(d, a, b))
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#define MLS64(d, a, b) MAC64(d, -(a), b)
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#if HAVE_ARMV5TE
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