mips: port optimizations to mips n64
This mainly consists of replacing all the pointer arithmatic 'addiu' instructions with PTR_ADDIU which will handle the differences in pointer sizes when compiled on 64 bit mips systems. The header asmdefs.h contains the PTR_ macros which expend to the correct mips instructions to manipulate registers containing pointers. Signed-off-by: James Cowgill <james410@cowgill.org.uk> Reviewed-by: Nedeljko Babic <Nedeljko.Babic@imgtec.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
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Michael Niedermayer

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@@ -50,6 +50,7 @@
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#include "config.h"
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#include "libavcodec/fft.h"
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#include "libavcodec/fft_table.h"
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#include "libavutil/mips/asmdefs.h"
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/**
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* FFT transform
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@@ -368,14 +369,14 @@ static void ff_imdct_half_mips(FFTContext *s, FFTSample *output, const FFTSample
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"mul.s %[temp11], %[temp5], %[temp6] \t\n"
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"mul.s %[temp12], %[temp5], %[temp7] \t\n"
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"lwc1 %[temp8], 0(%[in3]) \t\n"
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"addiu %[tcos1], %[tcos1], 8 \t\n"
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"addiu %[tsin1], %[tsin1], 8 \t\n"
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"addiu %[in1], %[in1], 16 \t\n"
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PTR_ADDIU " %[tcos1], %[tcos1], 8 \t\n"
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PTR_ADDIU " %[tsin1], %[tsin1], 8 \t\n"
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PTR_ADDIU " %[in1], %[in1], 16 \t\n"
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"nmsub.s %[temp11], %[temp11], %[temp8], %[temp7] \t\n"
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"madd.s %[temp12], %[temp12], %[temp8], %[temp6] \t\n"
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"addiu %[in2], %[in2], -16 \t\n"
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"addiu %[in3], %[in3], 16 \t\n"
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"addiu %[in4], %[in4], -16 \t\n"
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PTR_ADDIU " %[in2], %[in2], -16 \t\n"
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PTR_ADDIU " %[in3], %[in3], 16 \t\n"
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PTR_ADDIU " %[in4], %[in4], -16 \t\n"
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: [temp1]"=&f"(temp1), [temp2]"=&f"(temp2),
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[temp3]"=&f"(temp3), [temp4]"=&f"(temp4),
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