vp9/x86: 16x16 sub-IDCT for top-left 8x8 subblock (eob <= 38).
Sub8x8 speed (w/o dc-only case) goes from ~750 cycles (inter) or ~735 cycles (intra) to ~415 cycles (inter) or ~430 cycles (intra). Average overall 16x16 idct speed goes from ~635 cycles (inter) or ~720 cycles (intra) to ~415 cycles (inter) or ~545 (intra) - all measurements done using ped1080p.webm.
This commit is contained in:
Ronald S. Bultje
parent
acafbb4dd2
commit
0d9375fc90
@ -27,21 +27,21 @@ SECTION_RODATA
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pw_11585x2: times 8 dw 23170
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%macro VP9_IDCT_COEFFS 2-3 0
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%macro VP9_IDCT_COEFFS 2
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pw_m%1_%2: times 4 dw -%1, %2
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pw_%2_%1: times 4 dw %2, %1
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%if %3 == 1
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pw_m%2_m%1: times 4 dw -%2, -%1
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%endif
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%endmacro
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%macro VP9_IDCT_COEFFS_ALL 2-3 0
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%macro VP9_IDCT_COEFFS_ALL 2
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pw_%1x2: times 8 dw %1*2
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pw_m%1x2: times 8 dw -%1*2
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pw_%2x2: times 8 dw %2*2
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VP9_IDCT_COEFFS %1, %2, %3
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pw_m%2x2: times 8 dw -%2*2
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VP9_IDCT_COEFFS %1, %2
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%endmacro
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VP9_IDCT_COEFFS_ALL 15137, 6270, 1
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VP9_IDCT_COEFFS_ALL 15137, 6270
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VP9_IDCT_COEFFS_ALL 16069, 3196
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VP9_IDCT_COEFFS_ALL 9102, 13623
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VP9_IDCT_COEFFS_ALL 16305, 1606
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@ -367,7 +367,7 @@ cglobal vp9_idct_idct_8x8_add, 4,4,13, dst, stride, block, eob
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; void vp9_idct_idct_16x16_add_<opt>(uint8_t *dst, ptrdiff_t stride, int16_t *block, int eob);
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;---------------------------------------------------------------------------------------------
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%macro VP9_IDCT16_1D 2 ; src, pass
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%macro VP9_IDCT16_1D 2-3 16 ; src, pass, nnzc
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mova m5, [%1+ 32] ; IN(1)
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mova m14, [%1+ 64] ; IN(2)
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mova m6, [%1+ 96] ; IN(3)
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@ -375,6 +375,22 @@ cglobal vp9_idct_idct_8x8_add, 4,4,13, dst, stride, block, eob
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mova m7, [%1+160] ; IN(5)
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mova m15, [%1+192] ; IN(6)
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mova m4, [%1+224] ; IN(7)
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%if %3 <= 8
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pmulhrsw m8, m9, [pw_15137x2] ; t3
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pmulhrsw m9, [pw_6270x2] ; t2
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pmulhrsw m13, m14, [pw_16069x2] ; t7
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pmulhrsw m14, [pw_3196x2] ; t4
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pmulhrsw m12, m15, [pw_m9102x2] ; t5
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pmulhrsw m15, [pw_13623x2] ; t6
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pmulhrsw m2, m5, [pw_16305x2] ; t15
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pmulhrsw m5, [pw_1606x2] ; t8
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pmulhrsw m3, m4, [pw_m10394x2] ; t9
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pmulhrsw m4, [pw_12665x2] ; t14
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pmulhrsw m0, m7, [pw_14449x2] ; t13
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pmulhrsw m7, [pw_7723x2] ; t10
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pmulhrsw m1, m6, [pw_m4756x2] ; t11
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pmulhrsw m6, [pw_15679x2] ; t12
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%else
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mova m3, [%1+288] ; IN(9)
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mova m12, [%1+320] ; IN(10)
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mova m0, [%1+352] ; IN(11)
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@ -393,6 +409,7 @@ cglobal vp9_idct_idct_8x8_add, 4,4,13, dst, stride, block, eob
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VP9_UNPACK_MULSUB_2W_4X 3, 4, 10394, 12665, [pd_8192], 10, 11 ; t9, t14
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VP9_UNPACK_MULSUB_2W_4X 7, 0, 14449, 7723, [pd_8192], 10, 11 ; t10, t13
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VP9_UNPACK_MULSUB_2W_4X 1, 6, 4756, 15679, [pd_8192], 10, 11 ; t11, t12
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%endif
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; m11=t0, m10=t1, m9=t2, m8=t3, m14=t4, m12=t5, m15=t6, m13=t7
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; m5=t8, m3=t9, m7=t10, m1=t11, m6=t12, m0=t13, m4=t14, m2=t15
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@ -439,6 +456,11 @@ cglobal vp9_idct_idct_8x8_add, 4,4,13, dst, stride, block, eob
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; from load/start
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mova m10, [%1+ 0] ; IN(0)
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%if %3 <= 8
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pmulhrsw m10, [pw_11585x2] ; t0 and t1
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psubw m11, m10, m8
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paddw m8, m10
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%else
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mova m11, [%1+256] ; IN(8)
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; from 3 stages back
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@ -448,6 +470,7 @@ cglobal vp9_idct_idct_8x8_add, 4,4,13, dst, stride, block, eob
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; from 2 stages back
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SUMSUB_BA w, 8, 11, 7 ; t0, t3
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%endif
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SUMSUB_BA w, 9, 10, 7 ; t1, t2
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; from 1 stage back
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@ -541,11 +564,15 @@ cglobal vp9_idct_idct_8x8_add, 4,4,13, dst, stride, block, eob
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%endif ; %2 == 1/2
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%endmacro
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%macro ZERO_BLOCK 3 ; mem, n_bytes, zero_reg
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%assign %%off 0
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%rep %2/mmsize
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mova [%1+%%off], %3
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%assign %%off (%%off+mmsize)
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%macro ZERO_BLOCK 4 ; mem, stride, nnzcpl, zero_reg
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%assign %%y 0
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%rep %3
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%assign %%x 0
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%rep %3*2/mmsize
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mova [%1+%%y+%%x], %4
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%assign %%x (%%x+mmsize)
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%endrep
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%assign %%y (%%y+%2)
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%endrep
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%endmacro
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@ -568,8 +595,11 @@ cglobal vp9_idct_idct_8x8_add, 4,4,13, dst, stride, block, eob
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INIT_XMM ssse3
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cglobal vp9_idct_idct_16x16_add, 4, 5, 16, 512, dst, stride, block, eob
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; 2x2=eob=3, 4x4=eob=10
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cmp eobd, 38
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jg .idctfull
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cmp eobd, 1 ; faster path for when only DC is set
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jne .idctfull
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jne .idct8x8
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; dc-only
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movd m0, [blockq]
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@ -587,6 +617,25 @@ cglobal vp9_idct_idct_16x16_add, 4, 5, 16, 512, dst, stride, block, eob
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VP9_STORE_2XFULL 0, 1, 2, 3, 4, 5
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RET
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.idct8x8:
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DEFINE_ARGS dst, stride, block, cnt, dst_bak
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VP9_IDCT16_1D blockq, 1, 8
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mov cntd, 2
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mov dst_bakq, dstq
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.loop2_8x8:
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VP9_IDCT16_1D rsp, 2, 8
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lea dstq, [dst_bakq+8]
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add rsp, 16
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dec cntd
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jg .loop2_8x8
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sub rsp, 32
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; at the end of the loop, m0 should still be zero
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; use that to zero out block coefficients
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ZERO_BLOCK blockq, 32, 8, m0
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RET
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.idctfull:
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DEFINE_ARGS dst, stride, block, cnt, dst_bak
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mov cntd, 2
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@ -611,8 +660,7 @@ cglobal vp9_idct_idct_16x16_add, 4, 5, 16, 512, dst, stride, block, eob
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; at the end of the loop, m0 should still be zero
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; use that to zero out block coefficients
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ZERO_BLOCK blockq, 512, m0
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ZERO_BLOCK blockq, 32, 16, m0
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RET
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%endif ; x86-64
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