4fa35d8ae8
Previously we'd been relying on getting the machine-specific <endian.h> instead of the top-level <endian.h>, and <sys/endian.h> was basically broken. Now, with this patch and the previous patch we should have <endian.h> and <sys/endian.h> behaving the same. This is basically how NetBSD's endian.h works, and was probably how ours was originally intended to work. Bug: http://code.google.com/p/android/issues/detail?id=39824 Change-Id: I71de5a507e633de166013a658b5764df9e1aa09c
90 lines
3.3 KiB
C
90 lines
3.3 KiB
C
/* $OpenBSD: endian.h,v 1.3 2005/12/13 00:35:23 millert Exp $ */
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/*
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* Copyright (C) 2010 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _ARM_ENDIAN_H_
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#define _ARM_ENDIAN_H_
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#ifdef __GNUC__
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/*
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* REV and REV16 weren't available on ARM5 or ARM4.
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* We don't include <machine/cpu-features.h> because it pollutes the
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* namespace with macros like PLD.
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*/
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#if !defined __ARM_ARCH_5__ && !defined __ARM_ARCH_5T__ && \
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!defined __ARM_ARCH_5TE__ && !defined __ARM_ARCH_5TEJ__ && \
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!defined __ARM_ARCH_4T__ && !defined __ARM_ARCH_4__
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/* According to RealView Assembler User's Guide, REV and REV16 are available
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* in Thumb code and 16-bit instructions when used in Thumb-2 code.
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*
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* REV Rd, Rm
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* Rd and Rm must both be Lo registers.
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*
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* REV16 Rd, Rm
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* Rd and Rm must both be Lo registers.
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*
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* The +l constraint takes care of this without constraining us in ARM mode.
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*/
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#define __swap16md(x) ({ \
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register u_int16_t _x = (x); \
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__asm volatile ("rev16 %0, %0" : "+l" (_x)); \
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_x; \
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})
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#define __swap32md(x) ({ \
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register u_int32_t _x = (x); \
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__asm volatile ("rev %0, %0" : "+l" (_x)); \
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_x; \
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})
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#define __swap64md(x) ({ \
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u_int64_t _swap64md_x = (x); \
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(u_int64_t) __swap32md(_swap64md_x >> 32) | \
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(u_int64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \
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})
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/* Tell sys/endian.h we have MD variants of the swap macros. */
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#define MD_SWAP
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#endif /* __ARM_ARCH__ */
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#endif /* __GNUC__ */
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#if defined(__ARMEB__)
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#define _BYTE_ORDER _BIG_ENDIAN
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#else
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#define _BYTE_ORDER _LITTLE_ENDIAN
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#endif
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#define __STRICT_ALIGNMENT
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#include <sys/types.h>
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#include <sys/endian.h>
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#endif /* !_ARM_ENDIAN_H_ */
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