66 lines
2.9 KiB
C
66 lines
2.9 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __ARCH_DESC_H
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#define __ARCH_DESC_H
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#include <asm/ldt.h>
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#include <asm/segment.h>
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#ifndef __ASSEMBLY__
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#include <linux/preempt.h>
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#include <linux/smp.h>
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#include <linux/percpu.h>
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#include <asm/mmu.h>
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struct Xgt_desc_struct {
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unsigned short size;
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unsigned long address __attribute__((packed));
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unsigned short pad;
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} __attribute__ ((packed));
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struct gdt_page
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{
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struct desc_struct gdt[GDT_ENTRIES];
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} __attribute__((aligned(PAGE_SIZE)));
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#define DESCTYPE_LDT 0x82
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#define DESCTYPE_TSS 0x89
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#define DESCTYPE_TASK 0x85
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#define DESCTYPE_INT 0x8e
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#define DESCTYPE_TRAP 0x8f
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#define DESCTYPE_DPL3 0x60
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#define DESCTYPE_S 0x10
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#define load_TR_desc() native_load_tr_desc()
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#define load_gdt(dtr) native_load_gdt(dtr)
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#define load_idt(dtr) native_load_idt(dtr)
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#define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr))
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#define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt))
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#define store_gdt(dtr) native_store_gdt(dtr)
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#define store_idt(dtr) native_store_idt(dtr)
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#define store_tr(tr) (tr = native_store_tr())
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#define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt))
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#define load_TLS(t, cpu) native_load_tls(t, cpu)
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#define set_ldt native_set_ldt
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#define write_ldt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
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#define write_gdt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
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#define write_idt_entry(dt, entry, a, b) write_dt_entry(dt, entry, a, b)
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#define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
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#define LDT_entry_a(info) ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
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#define LDT_entry_b(info) (((info)->base_addr & 0xff000000) | (((info)->base_addr & 0x00ff0000) >> 16) | ((info)->limit & 0xf0000) | (((info)->read_exec_only ^ 1) << 9) | ((info)->contents << 10) | (((info)->seg_not_present ^ 1) << 15) | ((info)->seg_32bit << 22) | ((info)->limit_in_pages << 23) | ((info)->useable << 20) | 0x7000)
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#define LDT_empty(info) ( (info)->base_addr == 0 && (info)->limit == 0 && (info)->contents == 0 && (info)->read_exec_only == 1 && (info)->seg_32bit == 0 && (info)->limit_in_pages == 0 && (info)->seg_not_present == 1 && (info)->useable == 0 )
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#else
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#define GET_DESC_BASE(idx, gdt, base, lo_w, lo_b, hi_b) movb idx*8+4(gdt), lo_b; movb idx*8+7(gdt), hi_b; shll $16, base; movw idx*8+2(gdt), lo_w;
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#endif
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#endif
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