e210488e0d
This is the first patch out of a series of patches that add support for
AArch64, the new 64bit execution state of the ARMv8 Architecture. The
patches add support for LP64 programming model.
The patch adds:
* "arch-aarch64" to the architecture directories.
* "arch-aarch64/include" - headers used by libc
* "arch-aarch64/bionic":
- crtbegin, crtend support;
- aarch64 specific syscall stubs;
- setjmp, clone, vfork assembly files.
Change-Id: If72b859f81928d03ad05d4ccfcb54c2f5dbf99a5
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
124 lines
4.2 KiB
ArmAsm
124 lines
4.2 KiB
ArmAsm
/*
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* Copyright (C) 2013 The Android Open Source Project
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* All rights reserved
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#include <machine/setjmp.h>
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/*
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* C library - _setjmp, _longjmp
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*
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* _longjmp(jmp_buf state, int value)
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* will generate a "return(v)" from the last call to _setjmp(state) by restoring
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* registers from the stack. The previous signal state is NOT restored.
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*
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* NOTE: x0 return value
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* x9-x15 temporary registers
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*/
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ENTRY(setjmp)
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/* block all signals an retrieve signal mask */
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stp x0, x30, [sp, #-16]!
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mov x0, xzr
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bl PIC_SYM(_C_LABEL(sigblock), PLT)
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mov w1, w0
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ldp x0, x30, [sp], #16
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/* store signal mask */
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str w1, [x0, #(_JB_SIGMASK *4)]
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/* store magic number */
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ldr w9, .L_setjmp_magic
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str w9, [x0, #(_JB_MAGIC * 4)]
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/* store core registers */
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mov x10, sp
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stp x30, x10, [x0, #(_JB_CORE_BASE * 4 + 16 * 0)]
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stp x28, x29, [x0, #(_JB_CORE_BASE * 4 + 16 * 1)]
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stp x26, x27, [x0, #(_JB_CORE_BASE * 4 + 16 * 2)]
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stp x24, x25, [x0, #(_JB_CORE_BASE * 4 + 16 * 3)]
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stp x22, x23, [x0, #(_JB_CORE_BASE * 4 + 16 * 4)]
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stp x20, x21, [x0, #(_JB_CORE_BASE * 4 + 16 * 5)]
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str x19, [x0, #(_JB_CORE_BASE * 4 + 16 * 6)]
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/* store floating point registers */
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stp d14, d15, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 0)]
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stp d12, d13, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 1)]
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stp d10, d11, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 2)]
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stp d8, d9, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 3)]
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mov w0, wzr
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ret
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END(setjmp)
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.L_setjmp_magic:
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.word _JB_MAGIC__SETJMP
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ENTRY(longjmp)
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/* check magic */
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ldr w9, .L_setjmp_magic
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ldr w10, [x0, #(_JB_MAGIC * 4)]
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cmp w9, w10
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b.ne botch
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/* restore core registers */
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ldp x30, x10, [x0, #(_JB_CORE_BASE * 4 + 16 * 0)]
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mov sp, x10
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ldp x28, x29, [x0, #(_JB_CORE_BASE * 4 + 16 * 1)]
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ldp x26, x27, [x0, #(_JB_CORE_BASE * 4 + 16 * 2)]
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ldp x24, x25, [x0, #(_JB_CORE_BASE * 4 + 16 * 3)]
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ldp x22, x23, [x0, #(_JB_CORE_BASE * 4 + 16 * 4)]
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ldp x20, x21, [x0, #(_JB_CORE_BASE * 4 + 16 * 5)]
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ldr x19, [x0, #(_JB_CORE_BASE * 4 + 16 * 6)]
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/* restore floating point registers */
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ldp d14, d15, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 0)]
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ldp d12, d13, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 1)]
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ldp d10, d11, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 2)]
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ldp d8, d9, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 3)]
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/* validate sp (sp mod 16 = 0) and lr (lr mod 4 = 0) */
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tst x30, #3
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b.ne botch
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mov x10, sp
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tst x10, #15
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b.ne botch
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/* set return value */
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cmp w1, wzr
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csinc w0, w1, wzr, ne
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ret
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/* validation failed, die die die */
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botch:
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bl PIC_SYM(_C_LABEL(longjmperror), PLT)
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bl PIC_SYM(_C_LABEL(abort), PLT)
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b . - 8 /* Cannot get here */
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END(longjmp)
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