c95eb57405
And fix the scripts so they stop letting trailing whitespace through. Change-Id: Ie109fbe1f63321e565ba0fa60fee8e9cf3a61cfc
96 lines
4.2 KiB
C
96 lines
4.2 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __NEC_VR41XX_IRQ_H
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#define __NEC_VR41XX_IRQ_H
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#define MIPS_CPU_IRQ_BASE 0
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#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
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#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
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#define INT0_IRQ MIPS_CPU_IRQ(2)
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#define INT1_IRQ MIPS_CPU_IRQ(3)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define INT2_IRQ MIPS_CPU_IRQ(4)
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#define INT3_IRQ MIPS_CPU_IRQ(5)
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#define INT4_IRQ MIPS_CPU_IRQ(6)
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#define TIMER_IRQ MIPS_CPU_IRQ(7)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SYSINT1_IRQ_BASE 8
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#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x))
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#define BATTRY_IRQ SYSINT1_IRQ(0)
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#define POWER_IRQ SYSINT1_IRQ(1)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define RTCLONG1_IRQ SYSINT1_IRQ(2)
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#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3)
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#define PIU_IRQ SYSINT1_IRQ(5)
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#define AIU_IRQ SYSINT1_IRQ(6)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KIU_IRQ SYSINT1_IRQ(7)
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#define GIUINT_IRQ SYSINT1_IRQ(8)
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#define SIU_IRQ SYSINT1_IRQ(9)
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#define BUSERR_IRQ SYSINT1_IRQ(10)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SOFTINT_IRQ SYSINT1_IRQ(11)
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#define CLKRUN_IRQ SYSINT1_IRQ(12)
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#define DOZEPIU_IRQ SYSINT1_IRQ(13)
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#define SYSINT1_IRQ_LAST DOZEPIU_IRQ
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SYSINT2_IRQ_BASE 24
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#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x))
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#define RTCLONG2_IRQ SYSINT2_IRQ(0)
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#define LED_IRQ SYSINT2_IRQ(1)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define HSP_IRQ SYSINT2_IRQ(2)
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#define TCLOCK_IRQ SYSINT2_IRQ(3)
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#define FIR_IRQ SYSINT2_IRQ(4)
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#define CEU_IRQ SYSINT2_IRQ(4)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define DSIU_IRQ SYSINT2_IRQ(5)
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#define PCI_IRQ SYSINT2_IRQ(6)
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#define SCU_IRQ SYSINT2_IRQ(7)
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#define CSI_IRQ SYSINT2_IRQ(8)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define BCU_IRQ SYSINT2_IRQ(9)
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#define ETHERNET_IRQ SYSINT2_IRQ(10)
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#define SYSINT2_IRQ_LAST ETHERNET_IRQ
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#define GIU_IRQ_BASE 40
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define GIU_IRQ(x) (GIU_IRQ_BASE + (x))
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#define GIU_IRQ_LAST GIU_IRQ(31)
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#define VRC4173_IRQ_BASE 72
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#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x))
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define VRC4173_USB_IRQ VRC4173_IRQ(0)
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#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1)
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#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2)
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#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4)
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#define VRC4173_PIU_IRQ VRC4173_IRQ(5)
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#define VRC4173_AIU_IRQ VRC4173_IRQ(6)
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#define VRC4173_KIU_IRQ VRC4173_IRQ(7)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define VRC4173_GIU_IRQ VRC4173_IRQ(8)
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#define VRC4173_AC97_IRQ VRC4173_IRQ(9)
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#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10)
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#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ
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#endif
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