379 lines
13 KiB
C
379 lines
13 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef _UAPI_LINUX_CYCLADES_H
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#define _UAPI_LINUX_CYCLADES_H
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#include <linux/types.h>
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struct cyclades_monitor {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned long int_count;
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unsigned long char_count;
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unsigned long char_max;
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unsigned long char_last;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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struct cyclades_idle_stats {
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__kernel_time_t in_use;
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__kernel_time_t recv_idle;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__kernel_time_t xmit_idle;
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unsigned long recv_bytes;
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unsigned long xmit_bytes;
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unsigned long overruns;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned long frame_errs;
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unsigned long parity_errs;
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};
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#define CYCLADES_MAGIC 0x4359
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CYGETMON 0x435901
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#define CYGETTHRESH 0x435902
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#define CYSETTHRESH 0x435903
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#define CYGETDEFTHRESH 0x435904
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CYSETDEFTHRESH 0x435905
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#define CYGETTIMEOUT 0x435906
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#define CYSETTIMEOUT 0x435907
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#define CYGETDEFTIMEOUT 0x435908
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CYSETDEFTIMEOUT 0x435909
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#define CYSETRFLOW 0x43590a
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#define CYGETRFLOW 0x43590b
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#define CYSETRTSDTR_INV 0x43590c
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CYGETRTSDTR_INV 0x43590d
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#define CYZSETPOLLCYCLE 0x43590e
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#define CYZGETPOLLCYCLE 0x43590f
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#define CYGETCD1400VER 0x435910
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CYSETWAIT 0x435912
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#define CYGETWAIT 0x435913
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#define CZIOC ('M' << 8)
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#define CZ_NBOARDS (CZIOC|0xfa)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CZ_BOOT_START (CZIOC|0xfb)
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#define CZ_BOOT_DATA (CZIOC|0xfc)
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#define CZ_BOOT_END (CZIOC|0xfd)
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#define CZ_TEST (CZIOC|0xfe)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CZ_DEF_POLL (HZ/25)
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#define MAX_BOARD 4
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#define MAX_DEV 256
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#define CYZ_MAX_SPEED 921600
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CYZ_FIFO_SIZE 16
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#define CYZ_BOOT_NWORDS 0x100
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struct CYZ_BOOT_CTRL {
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unsigned short nboard;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int status[MAX_BOARD];
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int nchannel[MAX_BOARD];
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int fw_rev[MAX_BOARD];
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unsigned long offset;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned long data[CYZ_BOOT_NWORDS];
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};
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#ifndef DP_WINDOW_SIZE
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#define DP_WINDOW_SIZE (0x00080000)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ZE_DP_WINDOW_SIZE (0x00100000)
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#define CTRL_WINDOW_SIZE (0x00000080)
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struct CUSTOM_REG {
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__u32 fpga_id;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 fpga_version;
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__u32 cpu_start;
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__u32 cpu_stop;
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__u32 misc_reg;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 idt_mode;
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__u32 uart_irq_status;
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__u32 clear_timer0_irq;
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__u32 clear_timer1_irq;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 clear_timer2_irq;
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__u32 test_register;
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__u32 test_count;
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__u32 timer_select;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 pr_uart_irq_status;
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__u32 ram_wait_state;
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__u32 uart_wait_state;
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__u32 timer_wait_state;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 ack_wait_state;
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};
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struct RUNTIME_9060 {
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__u32 loc_addr_range;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 loc_addr_base;
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__u32 loc_arbitr;
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__u32 endian_descr;
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__u32 loc_rom_range;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 loc_rom_base;
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__u32 loc_bus_descr;
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__u32 loc_range_mst;
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__u32 loc_base_mst;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 loc_range_io;
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__u32 pci_base_mst;
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__u32 pci_conf_io;
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__u32 filler1;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 filler2;
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__u32 filler3;
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__u32 filler4;
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__u32 mail_box_0;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 mail_box_1;
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__u32 mail_box_2;
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__u32 mail_box_3;
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__u32 filler5;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 filler6;
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__u32 filler7;
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__u32 filler8;
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__u32 pci_doorbell;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 loc_doorbell;
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__u32 intr_ctrl_stat;
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__u32 init_ctrl;
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};
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define WIN_RAM 0x00000001L
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#define WIN_CREG 0x14000001L
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#define TIMER_BY_1M 0x00
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#define TIMER_BY_256K 0x01
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define TIMER_BY_128K 0x02
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#define TIMER_BY_32K 0x03
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#endif
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#ifndef ZFIRM_ID
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define MAX_CHAN 64
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#define ID_ADDRESS 0x00000180L
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#define ZFIRM_ID 0x5557465AL
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#define ZFIRM_HLT 0x59505B5CL
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ZFIRM_RST 0x56040674L
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#define ZF_TINACT_DEF 1000
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#define ZF_TINACT ZF_TINACT_DEF
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struct FIRM_ID {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 signature;
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__u32 zfwctrl_addr;
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};
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#define C_OS_LINUX 0x00000030
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CH_DISABLE 0x00000000
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#define C_CH_TXENABLE 0x00000001
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#define C_CH_RXENABLE 0x00000002
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#define C_CH_ENABLE 0x00000003
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CH_LOOPBACK 0x00000004
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#define C_PR_NONE 0x00000000
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#define C_PR_ODD 0x00000001
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#define C_PR_EVEN 0x00000002
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_PR_MARK 0x00000004
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#define C_PR_SPACE 0x00000008
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#define C_PR_PARITY 0x000000ff
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#define C_PR_DISCARD 0x00000100
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_PR_IGNORE 0x00000200
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#define C_DL_CS5 0x00000001
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#define C_DL_CS6 0x00000002
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#define C_DL_CS7 0x00000004
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_DL_CS8 0x00000008
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#define C_DL_CS 0x0000000f
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#define C_DL_1STOP 0x00000010
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#define C_DL_15STOP 0x00000020
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_DL_2STOP 0x00000040
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#define C_DL_STOP 0x000000f0
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#define C_IN_DISABLE 0x00000000
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#define C_IN_TXBEMPTY 0x00000001
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_IN_TXLOWWM 0x00000002
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#define C_IN_RXHIWM 0x00000010
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#define C_IN_RXNNDT 0x00000020
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#define C_IN_MDCD 0x00000100
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_IN_MDSR 0x00000200
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#define C_IN_MRI 0x00000400
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#define C_IN_MCTS 0x00000800
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#define C_IN_RXBRK 0x00001000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_IN_PR_ERROR 0x00002000
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#define C_IN_FR_ERROR 0x00004000
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#define C_IN_OVR_ERROR 0x00008000
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#define C_IN_RXOFL 0x00010000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_IN_IOCTLW 0x00020000
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#define C_IN_MRTS 0x00040000
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#define C_IN_ICHAR 0x00080000
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#define C_FL_OXX 0x00000001
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_FL_IXX 0x00000002
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#define C_FL_OIXANY 0x00000004
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#define C_FL_SWFLOW 0x0000000f
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#define C_FS_TXIDLE 0x00000000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_FS_SENDING 0x00000001
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#define C_FS_SWFLOW 0x00000002
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#define C_RS_PARAM 0x80000000
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#define C_RS_RTS 0x00000001
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_RS_DTR 0x00000004
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#define C_RS_DCD 0x00000100
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#define C_RS_DSR 0x00000200
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#define C_RS_RI 0x00000400
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_RS_CTS 0x00000800
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#define C_CM_RESET 0x01
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#define C_CM_IOCTL 0x02
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#define C_CM_IOCTLW 0x03
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CM_IOCTLM 0x04
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#define C_CM_SENDXOFF 0x10
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#define C_CM_SENDXON 0x11
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#define C_CM_CLFLOW 0x12
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CM_SENDBRK 0x41
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#define C_CM_INTBACK 0x42
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#define C_CM_SET_BREAK 0x43
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#define C_CM_CLR_BREAK 0x44
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CM_CMD_DONE 0x45
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#define C_CM_INTBACK2 0x46
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#define C_CM_TINACT 0x51
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#define C_CM_IRQ_ENBL 0x52
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CM_IRQ_DSBL 0x53
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#define C_CM_ACK_ENBL 0x54
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#define C_CM_ACK_DSBL 0x55
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#define C_CM_FLUSH_RX 0x56
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CM_FLUSH_TX 0x57
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#define C_CM_Q_ENABLE 0x58
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#define C_CM_Q_DISABLE 0x59
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#define C_CM_TXBEMPTY 0x60
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CM_TXLOWWM 0x61
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#define C_CM_RXHIWM 0x62
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#define C_CM_RXNNDT 0x63
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#define C_CM_TXFEMPTY 0x64
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CM_ICHAR 0x65
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#define C_CM_MDCD 0x70
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#define C_CM_MDSR 0x71
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#define C_CM_MRI 0x72
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CM_MCTS 0x73
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#define C_CM_MRTS 0x74
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#define C_CM_RXBRK 0x84
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#define C_CM_PR_ERROR 0x85
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CM_FR_ERROR 0x86
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#define C_CM_OVR_ERROR 0x87
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#define C_CM_RXOFL 0x88
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#define C_CM_CMDERROR 0x90
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define C_CM_FATAL 0x91
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#define C_CM_HW_RESET 0x92
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struct CH_CTRL {
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__u32 op_mode;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 intr_enable;
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__u32 sw_flow;
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__u32 flow_status;
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__u32 comm_baud;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 comm_parity;
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__u32 comm_data_l;
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__u32 comm_flags;
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__u32 hw_flow;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 rs_control;
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__u32 rs_status;
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__u32 flow_xon;
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__u32 flow_xoff;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 hw_overflow;
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__u32 sw_overflow;
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__u32 comm_error;
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__u32 ichar;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 filler[7];
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};
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struct BUF_CTRL {
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__u32 flag_dma;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 tx_bufaddr;
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__u32 tx_bufsize;
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__u32 tx_threshold;
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__u32 tx_get;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 tx_put;
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__u32 rx_bufaddr;
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__u32 rx_bufsize;
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__u32 rx_threshold;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 rx_get;
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__u32 rx_put;
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__u32 filler[5];
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};
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct BOARD_CTRL {
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__u32 n_channel;
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__u32 fw_version;
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__u32 op_system;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 dr_version;
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__u32 inactivity;
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__u32 hcmd_channel;
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__u32 hcmd_param;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 fwcmd_channel;
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__u32 fwcmd_param;
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__u32 zf_int_queue_addr;
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__u32 filler[6];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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#define QUEUE_SIZE (10*MAX_CHAN)
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struct INT_QUEUE {
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unsigned char intr_code[QUEUE_SIZE];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned long channel[QUEUE_SIZE];
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unsigned long param[QUEUE_SIZE];
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unsigned long put;
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unsigned long get;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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struct ZFW_CTRL {
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struct BOARD_CTRL board_ctrl;
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struct CH_CTRL ch_ctrl[MAX_CHAN];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct BUF_CTRL buf_ctrl[MAX_CHAN];
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};
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#endif
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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