Duane Sand bc5a3ec6df [MIPSR6] Use C-coded string ops on mips32r6/mips64r6 ...

The existing assembler code uses deprecated lwl/lwr/swl/swr ops.
Replacing those with misalignment-forgiving lw/sw ops may
involve careful performance tuning.

Change-Id: I47a042f7b22b87d7d52e46c29c44b1db1ba8b693

2014-07-23 14:00:21 -07:00

..

bionic

Remove __memcmp16 from bionic.

2014-06-12 15:35:22 -07:00

include/machine

Clean up <machine/ieee.h>.

2014-04-16 16:31:17 -07:00

string

Unify our assembler macros.

2014-02-20 13:51:26 -08:00

syscalls

Add splice, tee, and vmsplice.

2014-06-24 19:03:31 -07:00

mips.mk

[MIPSR6] Use C-coded string ops on mips32r6/mips64r6

2014-07-23 14:00:21 -07:00