202 lines
7.3 KiB
C
202 lines
7.3 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __ASM_ARCH_OMAP_MCBSP_H
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#define __ASM_ARCH_OMAP_MCBSP_H
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#include <asm/hardware.h>
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#define OMAP730_MCBSP1_BASE 0xfffb1000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define OMAP730_MCBSP2_BASE 0xfffb1800
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#define OMAP1510_MCBSP1_BASE 0xe1011800
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#define OMAP1510_MCBSP2_BASE 0xfffb1000
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#define OMAP1510_MCBSP3_BASE 0xe1017000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define OMAP1610_MCBSP1_BASE 0xe1011800
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#define OMAP1610_MCBSP2_BASE 0xfffb1000
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#define OMAP1610_MCBSP3_BASE 0xe1017000
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#define OMAP24XX_MCBSP1_BASE 0x48074000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define OMAP24XX_MCBSP2_BASE 0x48076000
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#define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg)
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#define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg)
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#define RRST 0x0001
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define RRDY 0x0002
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#define RFULL 0x0004
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#define RSYNC_ERR 0x0008
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#define RINTM(value) ((value)<<4)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ABIS 0x0040
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#define DXENA 0x0080
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#define CLKSTP(value) ((value)<<11)
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#define RJUST(value) ((value)<<13)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define DLB 0x8000
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#define XRST 0x0001
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#define XRDY 0x0002
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#define XEMPTY 0x0004
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define XSYNC_ERR 0x0008
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#define XINTM(value) ((value)<<4)
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#define GRST 0x0040
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#define FRST 0x0080
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define SOFT 0x0100
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#define FREE 0x0200
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#define CLKRP 0x0001
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#define CLKXP 0x0002
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define FSRP 0x0004
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#define FSXP 0x0008
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#define DR_STAT 0x0010
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#define DX_STAT 0x0020
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CLKS_STAT 0x0040
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#define SCLKME 0x0080
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#define CLKRM 0x0100
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#define CLKXM 0x0200
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define FSRM 0x0400
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#define FSXM 0x0800
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#define RIOEN 0x1000
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#define XIOEN 0x2000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define IDLE_EN 0x4000
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#define RWDLEN1(value) ((value)<<5)
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#define RFRLEN1(value) ((value)<<8)
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#define XWDLEN1(value) ((value)<<5)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define XFRLEN1(value) ((value)<<8)
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#define RDATDLY(value) (value)
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#define RFIG 0x0004
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#define RCOMPAND(value) ((value)<<3)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define RWDLEN2(value) ((value)<<5)
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#define RFRLEN2(value) ((value)<<8)
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#define RPHASE 0x8000
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#define XDATDLY(value) (value)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define XFIG 0x0004
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#define XCOMPAND(value) ((value)<<3)
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#define XWDLEN2(value) ((value)<<5)
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#define XFRLEN2(value) ((value)<<8)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define XPHASE 0x8000
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#define CLKGDV(value) (value)
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#define FWID(value) ((value)<<8)
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#define FPER(value) (value)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define FSGM 0x1000
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#define CLKSM 0x2000
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#define CLKSP 0x4000
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#define GSYNC 0x8000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define RMCM 0x0001
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#define RCBLK(value) ((value)<<2)
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#define RPABLK(value) ((value)<<5)
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#define RPBBLK(value) ((value)<<7)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define XMCM(value) (value)
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#define XCBLK(value) ((value)<<2)
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#define XPABLK(value) ((value)<<5)
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#define XPBBLK(value) ((value)<<7)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct omap_mcbsp_reg_cfg {
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u16 spcr2;
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u16 spcr1;
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u16 rcr2;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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u16 rcr1;
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u16 xcr2;
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u16 xcr1;
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u16 srgr2;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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u16 srgr1;
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u16 mcr2;
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u16 mcr1;
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u16 pcr0;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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u16 rcerc;
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u16 rcerd;
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u16 xcerc;
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u16 xcerd;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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u16 rcere;
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u16 rcerf;
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u16 xcere;
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u16 xcerf;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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u16 rcerg;
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u16 rcerh;
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u16 xcerg;
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u16 xcerh;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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typedef enum {
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OMAP_MCBSP1 = 0,
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OMAP_MCBSP2,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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OMAP_MCBSP3,
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} omap_mcbsp_id;
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typedef int __bitwise omap_mcbsp_io_type_t;
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#define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2)
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typedef enum {
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OMAP_MCBSP_WORD_8 = 0,
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OMAP_MCBSP_WORD_12,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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OMAP_MCBSP_WORD_16,
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OMAP_MCBSP_WORD_20,
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OMAP_MCBSP_WORD_24,
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OMAP_MCBSP_WORD_32,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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} omap_mcbsp_word_length;
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typedef enum {
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OMAP_MCBSP_CLK_RISING = 0,
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OMAP_MCBSP_CLK_FALLING,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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} omap_mcbsp_clk_polarity;
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typedef enum {
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OMAP_MCBSP_FS_ACTIVE_HIGH = 0,
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OMAP_MCBSP_FS_ACTIVE_LOW,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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} omap_mcbsp_fs_polarity;
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typedef enum {
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OMAP_MCBSP_CLK_STP_MODE_NO_DELAY = 0,
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OMAP_MCBSP_CLK_STP_MODE_DELAY,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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} omap_mcbsp_clk_stp_mode;
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typedef enum {
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OMAP_MCBSP_SPI_MASTER = 0,
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OMAP_MCBSP_SPI_SLAVE,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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} omap_mcbsp_spi_mode;
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struct omap_mcbsp_spi_cfg {
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omap_mcbsp_spi_mode spi_mode;
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omap_mcbsp_clk_polarity rx_clock_polarity;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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omap_mcbsp_clk_polarity tx_clock_polarity;
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omap_mcbsp_fs_polarity fsx_polarity;
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u8 clk_div;
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omap_mcbsp_clk_stp_mode clk_stp_mode;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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omap_mcbsp_word_length word_length;
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};
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#endif
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