ed45970ac5
Since the ENTRY/END macros now have .cfi_startproc/.cfi_endproc, most of the custom arm assembly has no unwind information. Adding the proper cfi directives for these and removing the arm directives. Update the gensyscalls.py script to add these cfi directives for the generated assembly. Also fix the references to non-uapi headers to the proper uapi header. In addition, remove the kill.S, tkill.S, tgkill.S for arm since they are not needed at all. The unwinder (libunwind) is able to properly unwind using the normal abort. After this change, I can unwind through the system calls again. Bug: 11559337 Bug: 11825869 Bug: 11321283 Change-Id: I18b48089ef2d000a67913ce6febc6544bbe934a3
154 lines
4.2 KiB
ArmAsm
154 lines
4.2 KiB
ArmAsm
/* $OpenBSD: setjmp.S,v 1.2 2004/02/01 05:40:52 drahn Exp $ */
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/* $NetBSD: setjmp.S,v 1.5 2003/04/05 23:08:51 bjh21 Exp $ */
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/*
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* Copyright (c) 1997 Mark Brinicombe
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* Copyright (c) 2010 Android Open Source Project.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#include <machine/setjmp.h>
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#include <machine/cpu-features.h>
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/*
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* C library -- setjmp, longjmp
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*
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* longjmp(a,v)
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* will generate a "return(v)" from the last call to
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* setjmp(a)
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* by restoring registers from the stack.
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* The previous signal state is restored.
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*/
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ENTRY(setjmp)
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/* Block all signals and retrieve the old signal mask */
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stmfd sp!, {r0, r14}
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.cfi_def_cfa_offset 8
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.cfi_rel_offset r0, 0
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.cfi_rel_offset r14, 4
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mov r0, #0x00000000
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bl PIC_SYM(_C_LABEL(sigblock), PLT)
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mov r1, r0
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ldmfd sp!, {r0, r14}
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.cfi_def_cfa_offset 0
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/* Store signal mask */
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str r1, [r0, #(_JB_SIGMASK * 4)]
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ldr r1, .Lsetjmp_magic
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str r1, [r0, #(_JB_MAGIC * 4)]
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/* Store core registers */
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add r1, r0, #(_JB_CORE_BASE * 4)
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stmia r1, {r4-r14}
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#ifdef __ARM_HAVE_VFP
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/* Store floating-point registers */
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add r1, r0, #(_JB_FLOAT_BASE * 4)
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vstmia r1, {d8-d15}
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/* Store floating-point state */
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fmrx r1, fpscr
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str r1, [r0, #(_JB_FLOAT_STATE * 4)]
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#endif /* __ARM_HAVE_VFP */
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mov r0, #0x00000000
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bx lr
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END(setjmp)
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.Lsetjmp_magic:
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.word _JB_MAGIC_SETJMP
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ENTRY(longjmp)
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ldr r2, .Lsetjmp_magic
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ldr r3, [r0, #(_JB_MAGIC * 4)]
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teq r2, r3
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bne botch
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/* Fetch signal mask */
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ldr r2, [r0, #(_JB_SIGMASK * 4)]
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/* Set signal mask */
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stmfd sp!, {r0, r1, r14}
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.cfi_def_cfa_offset 12
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.cfi_rel_offset r0, 0
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.cfi_rel_offset r1, 4
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.cfi_rel_offset r14, 8
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sub sp, sp, #4 /* align the stack */
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.cfi_adjust_cfa_offset 4
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mov r0, r2
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bl PIC_SYM(_C_LABEL(sigsetmask), PLT)
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add sp, sp, #4 /* unalign the stack */
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.cfi_adjust_cfa_offset -4
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ldmfd sp!, {r0, r1, r14}
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.cfi_def_cfa_offset 0
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#ifdef __ARM_HAVE_VFP
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/* Restore floating-point registers */
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add r2, r0, #(_JB_FLOAT_BASE * 4)
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vldmia r2, {d8-d15}
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/* Restore floating-point state */
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ldr r2, [r0, #(_JB_FLOAT_STATE * 4)]
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fmxr fpscr, r2
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#endif /* __ARM_HAVE_VFP */
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/* Restore core registers */
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add r2, r0, #(_JB_CORE_BASE * 4)
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ldmia r2, {r4-r14}
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/* Validate sp and r14 */
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teq sp, #0
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teqne r14, #0
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beq botch
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/* Set return value */
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mov r0, r1
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teq r0, #0x00000000
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moveq r0, #0x00000001
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bx lr
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#ifdef __ARM_26__
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mov r15, r14
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#else
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mov r15, r14
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#endif
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/* validation failed, die die die. */
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botch:
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bl PIC_SYM(_C_LABEL(longjmperror), PLT)
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bl PIC_SYM(_C_LABEL(abort), PLT)
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b . - 8 /* Cannot get here */
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END(longjmp)
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