405b8029a6
Change-Id: I2864dea04b3faf2d919165dcaa600af5b16c41c8 Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Raghu Gandham <raghu@mips.com>
424 lines
11 KiB
ArmAsm
424 lines
11 KiB
ArmAsm
/*
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* Copyright (c) 2009
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* MIPS Technologies, Inc., California.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/************************************************************************
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*
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* memcpy.S
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* Version: "043009"
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*
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************************************************************************/
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/************************************************************************
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* Include files
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************************************************************************/
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#include "machine/asm.h"
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/*
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* This routine could be optimized for MIPS64. The current code only
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* uses MIPS32 instructions.
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*/
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#if defined(__MIPSEB__)
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# define LWHI lwl /* high part is left in big-endian */
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# define SWHI swl /* high part is left in big-endian */
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# define LWLO lwr /* low part is right in big-endian */
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# define SWLO swr /* low part is right in big-endian */
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#endif
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#if defined(__MIPSEL__)
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# define LWHI lwr /* high part is right in little-endian */
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# define SWHI swr /* high part is right in little-endian */
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# define LWLO lwl /* low part is left in big-endian */
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# define SWLO swl /* low part is left in big-endian */
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#endif
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LEAF(memcpy,0)
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.set noreorder
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.set noat
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/*
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* Below we handle the case where memcpy is called with overlapping src and dst.
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* Although memcpy is not required to handle this case, some parts of Android like Skia
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* rely on such usage. We call memmove to handle such cases.
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*/
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subu t0,a0,a1
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sra AT,t0,31
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xor t1,t0,AT
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subu t0,t1,AT
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sltu AT,t0,a2
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beq AT,zero,.Lmemcpy
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la t9,memmove
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jr t9
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nop
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.Lmemcpy:
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slti AT,a2,8
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bne AT,zero,.Llast8
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move v0,a0 # memcpy returns the dst pointer
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# Test if the src and dst are word-aligned, or can be made word-aligned
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xor t8,a1,a0
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andi t8,t8,0x3 # t8 is a0/a1 word-displacement
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bne t8,zero,.Lunaligned
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negu a3,a0
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andi a3,a3,0x3 # we need to copy a3 bytes to make a0/a1 aligned
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beq a3,zero,.Lchk16w # when a3=0 then the dst (a0) is word-aligned
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subu a2,a2,a3 # now a2 is the remining bytes count
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LWHI t8,0(a1)
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addu a1,a1,a3
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SWHI t8,0(a0)
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addu a0,a0,a3
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# Now the dst/src are mutually word-aligned with word-aligned addresses
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.Lchk16w:
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andi t8,a2,0x3f # any whole 64-byte chunks?
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# t8 is the byte count after 64-byte chunks
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beq a2,t8,.Lchk8w # if a2==t8, no 64-byte chunks
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# There will be at most 1 32-byte chunk after it
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subu a3,a2,t8 # subtract from a2 the reminder
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# Here a3 counts bytes in 16w chunks
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addu a3,a0,a3 # Now a3 is the final dst after 64-byte chunks
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addu t0,a0,a2 # t0 is the "past the end" address
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# When in the loop we exercise "pref 30,x(a0)", the a0+x should not be past
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# the "t0-32" address
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# This means: for x=128 the last "safe" a0 address is "t0-160"
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# Alternatively, for x=64 the last "safe" a0 address is "t0-96"
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# In the current version we will use "pref 30,128(a0)", so "t0-160" is the limit
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subu t9,t0,160 # t9 is the "last safe pref 30,128(a0)" address
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pref 0,0(a1) # bring the first line of src, addr 0
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pref 0,32(a1) # bring the second line of src, addr 32
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pref 0,64(a1) # bring the third line of src, addr 64
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pref 30,32(a0) # safe, as we have at least 64 bytes ahead
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# In case the a0 > t9 don't use "pref 30" at all
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sgtu v1,a0,t9
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bgtz v1,.Lloop16w # skip "pref 30,64(a0)" for too short arrays
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nop
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# otherwise, start with using pref30
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pref 30,64(a0)
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.Lloop16w:
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pref 0,96(a1)
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lw t0,0(a1)
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bgtz v1,.Lskip_pref30_96 # skip "pref 30,96(a0)"
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lw t1,4(a1)
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pref 30,96(a0) # continue setting up the dest, addr 96
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.Lskip_pref30_96:
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lw t2,8(a1)
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lw t3,12(a1)
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lw t4,16(a1)
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lw t5,20(a1)
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lw t6,24(a1)
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lw t7,28(a1)
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pref 0,128(a1) # bring the next lines of src, addr 128
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sw t0,0(a0)
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sw t1,4(a0)
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sw t2,8(a0)
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sw t3,12(a0)
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sw t4,16(a0)
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sw t5,20(a0)
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sw t6,24(a0)
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sw t7,28(a0)
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lw t0,32(a1)
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bgtz v1,.Lskip_pref30_128 # skip "pref 30,128(a0)"
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lw t1,36(a1)
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pref 30,128(a0) # continue setting up the dest, addr 128
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.Lskip_pref30_128:
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lw t2,40(a1)
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lw t3,44(a1)
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lw t4,48(a1)
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lw t5,52(a1)
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lw t6,56(a1)
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lw t7,60(a1)
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pref 0, 160(a1) # bring the next lines of src, addr 160
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sw t0,32(a0)
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sw t1,36(a0)
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sw t2,40(a0)
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sw t3,44(a0)
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sw t4,48(a0)
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sw t5,52(a0)
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sw t6,56(a0)
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sw t7,60(a0)
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addiu a0,a0,64 # adding 64 to dest
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sgtu v1,a0,t9
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bne a0,a3,.Lloop16w
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addiu a1,a1,64 # adding 64 to src
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move a2,t8
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# Here we have src and dest word-aligned but less than 64-bytes to go
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.Lchk8w:
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pref 0, 0x0(a1)
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andi t8,a2,0x1f # is there a 32-byte chunk?
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# the t8 is the reminder count past 32-bytes
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beq a2,t8,.Lchk1w # when a2=t8, no 32-byte chunk
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nop
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lw t0,0(a1)
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lw t1,4(a1)
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lw t2,8(a1)
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lw t3,12(a1)
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lw t4,16(a1)
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lw t5,20(a1)
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lw t6,24(a1)
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lw t7,28(a1)
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addiu a1,a1,32
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sw t0,0(a0)
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sw t1,4(a0)
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sw t2,8(a0)
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sw t3,12(a0)
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sw t4,16(a0)
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sw t5,20(a0)
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sw t6,24(a0)
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sw t7,28(a0)
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addiu a0,a0,32
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.Lchk1w:
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andi a2,t8,0x3 # now a2 is the reminder past 1w chunks
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beq a2,t8,.Llast8
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subu a3,t8,a2 # a3 is count of bytes in 1w chunks
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addu a3,a0,a3 # now a3 is the dst address past the 1w chunks
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# copying in words (4-byte chunks)
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.LwordCopy_loop:
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lw t3,0(a1) # the first t3 may be equal t0 ... optimize?
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addiu a1,a1,4
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addiu a0,a0,4
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bne a0,a3,.LwordCopy_loop
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sw t3,-4(a0)
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# For the last (<8) bytes
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.Llast8:
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blez a2,.Lleave
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addu a3,a0,a2 # a3 is the last dst address
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.Llast8loop:
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lb v1,0(a1)
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addiu a1,a1,1
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addiu a0,a0,1
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bne a0,a3,.Llast8loop
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sb v1,-1(a0)
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.Lleave:
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j ra
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nop
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#
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# UNALIGNED case
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#
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.Lunaligned:
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# got here with a3="negu a0"
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andi a3,a3,0x3 # test if the a0 is word aligned
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beqz a3,.Lua_chk16w
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subu a2,a2,a3 # bytes left after initial a3 bytes
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LWHI v1,0(a1)
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LWLO v1,3(a1)
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addu a1,a1,a3 # a3 may be here 1, 2 or 3
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SWHI v1,0(a0)
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addu a0,a0,a3 # below the dst will be word aligned (NOTE1)
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.Lua_chk16w:
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andi t8,a2,0x3f # any whole 64-byte chunks?
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# t8 is the byte count after 64-byte chunks
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beq a2,t8,.Lua_chk8w # if a2==t8, no 64-byte chunks
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# There will be at most 1 32-byte chunk after it
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subu a3,a2,t8 # subtract from a2 the reminder
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# Here a3 counts bytes in 16w chunks
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addu a3,a0,a3 # Now a3 is the final dst after 64-byte chunks
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addu t0,a0,a2 # t0 is the "past the end" address
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subu t9,t0,160 # t9 is the "last safe pref 30,128(a0)" address
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pref 0,0(a1) # bring the first line of src, addr 0
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pref 0,32(a1) # bring the second line of src, addr 32
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pref 0,64(a1) # bring the third line of src, addr 64
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pref 30,32(a0) # safe, as we have at least 64 bytes ahead
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# In case the a0 > t9 don't use "pref 30" at all
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sgtu v1,a0,t9
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bgtz v1,.Lua_loop16w # skip "pref 30,64(a0)" for too short arrays
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nop
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# otherwise, start with using pref30
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pref 30,64(a0)
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.Lua_loop16w:
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pref 0,96(a1)
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LWHI t0,0(a1)
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LWLO t0,3(a1)
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LWHI t1,4(a1)
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bgtz v1,.Lua_skip_pref30_96
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LWLO t1,7(a1)
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pref 30,96(a0) # continue setting up the dest, addr 96
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.Lua_skip_pref30_96:
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LWHI t2,8(a1)
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LWLO t2,11(a1)
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LWHI t3,12(a1)
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LWLO t3,15(a1)
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LWHI t4,16(a1)
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LWLO t4,19(a1)
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LWHI t5,20(a1)
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LWLO t5,23(a1)
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LWHI t6,24(a1)
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LWLO t6,27(a1)
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LWHI t7,28(a1)
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LWLO t7,31(a1)
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pref 0,128(a1) # bring the next lines of src, addr 128
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sw t0,0(a0)
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sw t1,4(a0)
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sw t2,8(a0)
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sw t3,12(a0)
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sw t4,16(a0)
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sw t5,20(a0)
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sw t6,24(a0)
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sw t7,28(a0)
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LWHI t0,32(a1)
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LWLO t0,35(a1)
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LWHI t1,36(a1)
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bgtz v1,.Lua_skip_pref30_128
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LWLO t1,39(a1)
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pref 30,128(a0) # continue setting up the dest, addr 128
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.Lua_skip_pref30_128:
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LWHI t2,40(a1)
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LWLO t2,43(a1)
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LWHI t3,44(a1)
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LWLO t3,47(a1)
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LWHI t4,48(a1)
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LWLO t4,51(a1)
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LWHI t5,52(a1)
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LWLO t5,55(a1)
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LWHI t6,56(a1)
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LWLO t6,59(a1)
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LWHI t7,60(a1)
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LWLO t7,63(a1)
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pref 0, 160(a1) # bring the next lines of src, addr 160
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sw t0,32(a0)
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sw t1,36(a0)
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sw t2,40(a0)
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sw t3,44(a0)
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sw t4,48(a0)
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sw t5,52(a0)
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sw t6,56(a0)
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sw t7,60(a0)
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addiu a0,a0,64 # adding 64 to dest
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sgtu v1,a0,t9
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bne a0,a3,.Lua_loop16w
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addiu a1,a1,64 # adding 64 to src
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move a2,t8
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# Here we have src and dest word-aligned but less than 64-bytes to go
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.Lua_chk8w:
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pref 0, 0x0(a1)
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andi t8,a2,0x1f # is there a 32-byte chunk?
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# the t8 is the reminder count
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beq a2,t8,.Lua_chk1w # when a2=t8, no 32-byte chunk
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nop
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LWHI t0,0(a1)
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LWLO t0,3(a1)
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LWHI t1,4(a1)
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LWLO t1,7(a1)
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LWHI t2,8(a1)
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LWLO t2,11(a1)
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LWHI t3,12(a1)
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LWLO t3,15(a1)
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LWHI t4,16(a1)
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LWLO t4,19(a1)
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LWHI t5,20(a1)
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LWLO t5,23(a1)
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LWHI t6,24(a1)
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LWLO t6,27(a1)
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LWHI t7,28(a1)
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LWLO t7,31(a1)
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addiu a1,a1,32
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sw t0,0(a0)
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sw t1,4(a0)
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sw t2,8(a0)
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sw t3,12(a0)
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sw t4,16(a0)
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sw t5,20(a0)
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sw t6,24(a0)
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sw t7,28(a0)
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addiu a0,a0,32
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.Lua_chk1w:
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andi a2,t8,0x3 # now a2 is the reminder past 1w chunks
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beq a2,t8,.Lua_smallCopy
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subu a3,t8,a2 # a3 is count of bytes in 1w chunks
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addu a3,a0,a3 # now a3 is the dst address past the 1w chunks
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# copying in words (4-byte chunks)
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.Lua_wordCopy_loop:
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LWHI v1,0(a1)
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LWLO v1,3(a1)
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addiu a1,a1,4
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addiu a0,a0,4 # note: dst=a0 is word aligned here, see NOTE1
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bne a0,a3,.Lua_wordCopy_loop
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sw v1,-4(a0)
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# Now less than 4 bytes (value in a2) left to copy
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.Lua_smallCopy:
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beqz a2,.Lleave
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addu a3,a0,a2 # a3 is the last dst address
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.Lua_smallCopy_loop:
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lb v1,0(a1)
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addiu a1,a1,1
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addiu a0,a0,1
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bne a0,a3,.Lua_smallCopy_loop
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sb v1,-1(a0)
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j ra
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nop
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.set at
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.set reorder
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END(memcpy)
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/************************************************************************
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* Implementation : Static functions
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************************************************************************/
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