58f2b7ed66
Change-Id: If5c33d90b33f538448ac12e7bee94b4b9173d39c Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
242 lines
6.0 KiB
C
242 lines
6.0 KiB
C
/*-
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* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/lib/msun/i387/fenv.h,v 1.4 2005/03/17 22:21:46 das Exp $
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*/
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#ifndef _FENV_H_
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#define _FENV_H_
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#include <sys/cdefs.h>
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#include <sys/_types.h>
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/*
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* To preserve binary compatibility with FreeBSD 5.3, we pack the
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* mxcsr into some reserved fields, rather than changing sizeof(fenv_t).
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*/
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typedef struct {
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__uint16_t __control;
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__uint16_t __mxcsr_hi;
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__uint16_t __status;
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__uint16_t __mxcsr_lo;
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__uint32_t __tag;
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char __other[16];
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} fenv_t;
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#define __get_mxcsr(env) (((env).__mxcsr_hi << 16) | \
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((env).__mxcsr_lo))
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#define __set_mxcsr(env, x) do { \
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(env).__mxcsr_hi = (__uint32_t)(x) >> 16; \
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(env).__mxcsr_lo = (__uint16_t)(x); \
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} while (0)
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typedef __uint16_t fexcept_t;
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/* Exception flags */
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#define FE_INVALID 0x01
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#define FE_DENORMAL 0x02
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#define FE_DIVBYZERO 0x04
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#define FE_OVERFLOW 0x08
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#define FE_UNDERFLOW 0x10
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#define FE_INEXACT 0x20
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#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \
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FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
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/* Rounding modes */
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#define FE_TONEAREST 0x0000
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#define FE_DOWNWARD 0x0400
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#define FE_UPWARD 0x0800
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#define FE_TOWARDZERO 0x0c00
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#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
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FE_UPWARD | FE_TOWARDZERO)
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/*
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* As compared to the x87 control word, the SSE unit's control word
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* has the rounding control bits offset by 3 and the exception mask
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* bits offset by 7.
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*/
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#define _SSE_ROUND_SHIFT 3
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#define _SSE_EMASK_SHIFT 7
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/* After testing for SSE support once, we cache the result in __has_sse. */
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enum __sse_support { __SSE_YES, __SSE_NO, __SSE_UNK };
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extern enum __sse_support __has_sse;
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int __test_sse(void);
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#ifdef __SSE__
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#define __HAS_SSE() 1
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#else
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#define __HAS_SSE() (__has_sse == __SSE_YES || \
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(__has_sse == __SSE_UNK && __test_sse()))
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#endif
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__BEGIN_DECLS
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/* Default floating-point environment */
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extern const fenv_t __fe_dfl_env;
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#define FE_DFL_ENV (&__fe_dfl_env)
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#define __fldcw(__cw) __asm __volatile("fldcw %0" : : "m" (__cw))
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#define __fldenv(__env) __asm __volatile("fldenv %0" : : "m" (__env))
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#define __fnclex() __asm __volatile("fnclex")
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#define __fnstenv(__env) __asm __volatile("fnstenv %0" : "=m" (*(__env)))
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#define __fnstcw(__cw) __asm __volatile("fnstcw %0" : "=m" (*(__cw)))
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#define __fnstsw(__sw) __asm __volatile("fnstsw %0" : "=a" (*(__sw)))
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#define __fwait() __asm __volatile("fwait")
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#define __ldmxcsr(__csr) __asm __volatile("ldmxcsr %0" : : "m" (__csr))
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#define __stmxcsr(__csr) __asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
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static __inline int
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feclearexcept(int __excepts)
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{
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fenv_t __env;
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int __mxcsr;
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if (__excepts == FE_ALL_EXCEPT) {
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__fnclex();
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} else {
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__fnstenv(&__env);
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__env.__status &= ~__excepts;
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__fldenv(__env);
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}
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if (__HAS_SSE()) {
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__stmxcsr(&__mxcsr);
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__mxcsr &= ~__excepts;
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__ldmxcsr(__mxcsr);
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}
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return (0);
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}
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static __inline int
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fegetexceptflag(fexcept_t *__flagp, int __excepts)
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{
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int __mxcsr, __status;
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__fnstsw(&__status);
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if (__HAS_SSE())
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__stmxcsr(&__mxcsr);
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else
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__mxcsr = 0;
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*__flagp = (__mxcsr | __status) & __excepts;
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return (0);
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}
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int fesetexceptflag(const fexcept_t *__flagp, int __excepts);
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int feraiseexcept(int __excepts);
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static __inline int
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fetestexcept(int __excepts)
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{
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int __mxcsr;
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short __status;
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__fnstsw(&__status);
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if (__HAS_SSE())
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__stmxcsr(&__mxcsr);
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else
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__mxcsr = 0;
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return ((__status | __mxcsr) & __excepts);
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}
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static __inline int
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fegetround(void)
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{
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int __control;
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/*
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* We assume that the x87 and the SSE unit agree on the
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* rounding mode. Reading the control word on the x87 turns
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* out to be about 5 times faster than reading it on the SSE
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* unit on an Opteron 244.
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*/
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__fnstcw(&__control);
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return (__control & _ROUND_MASK);
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}
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static __inline int
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fesetround(int __round)
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{
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int __mxcsr, __control;
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if (__round & ~_ROUND_MASK)
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return (-1);
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__fnstcw(&__control);
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__control &= ~_ROUND_MASK;
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__control |= __round;
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__fldcw(__control);
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if (__HAS_SSE()) {
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__stmxcsr(&__mxcsr);
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__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
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__mxcsr |= __round << _SSE_ROUND_SHIFT;
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__ldmxcsr(__mxcsr);
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}
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return (0);
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}
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int fegetenv(fenv_t *__envp);
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int feholdexcept(fenv_t *__envp);
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static __inline int
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fesetenv(const fenv_t *__envp)
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{
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fenv_t __env = *__envp;
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int __mxcsr;
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__mxcsr = __get_mxcsr(__env);
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__set_mxcsr(__env, 0xffffffff);
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__fldenv(__env);
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if (__HAS_SSE())
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__ldmxcsr(__mxcsr);
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return (0);
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}
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int feupdateenv(const fenv_t *__envp);
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#if __BSD_VISIBLE
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int feenableexcept(int __mask);
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int fedisableexcept(int __mask);
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static __inline int
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fegetexcept(void)
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{
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int __control;
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/*
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* We assume that the masks for the x87 and the SSE unit are
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* the same.
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*/
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__fnstcw(&__control);
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return (~__control & FE_ALL_EXCEPT);
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}
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#endif /* __BSD_VISIBLE */
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__END_DECLS
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#endif /* !_FENV_H_ */
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