106 lines
3.7 KiB
C
106 lines
3.7 KiB
C
/*-
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* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
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*/
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/*
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Rewritten for Android.
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*/
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/* MIPS FPU floating point control register bits.
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*
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* 31-25 -> floating point conditions code bits set by FP compare
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* instructions
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* 24 -> flush denormalized results to zero instead of
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* causing unimplemented operation exception.
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* 23 -> Condition bit
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* 22 -> In conjunction with FS detects denormalized
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* operands and replaces them internally with 0.
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* 21 -> In conjunction with FS forces denormalized operands
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* to the closest normalized value.
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* 20-18 -> reserved (read as 0, write with 0)
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* 17 -> cause bit for unimplemented operation
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* 16 -> cause bit for invalid exception
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* 15 -> cause bit for division by zero exception
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* 14 -> cause bit for overflow exception
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* 13 -> cause bit for underflow exception
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* 12 -> cause bit for inexact exception
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* 11 -> enable exception for invalid exception
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* 10 -> enable exception for division by zero exception
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* 9 -> enable exception for overflow exception
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* 8 -> enable exception for underflow exception
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* 7 -> enable exception for inexact exception
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* 6 -> flag invalid exception
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* 5 -> flag division by zero exception
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* 4 -> flag overflow exception
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* 3 -> flag underflow exception
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* 2 -> flag inexact exception
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* 1-0 -> rounding control
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*
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*
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* Rounding Control:
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* 00 - rounding to nearest (RN)
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* 01 - rounding toward zero (RZ)
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* 10 - rounding (up) toward plus infinity (RP)
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* 11 - rounding (down)toward minus infinity (RM)
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*/
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#ifndef _MIPS_FENV_H_
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#define _MIPS_FENV_H_
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#include <sys/types.h>
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__BEGIN_DECLS
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typedef __uint32_t fenv_t;
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typedef __uint32_t fexcept_t;
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/* Exception flags */
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#define FE_INVALID 0x40
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#define FE_DIVBYZERO 0x20
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#define FE_OVERFLOW 0x10
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#define FE_UNDERFLOW 0x08
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#define FE_INEXACT 0x04
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#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
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FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
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#define _FCSR_CAUSE_SHIFT 10
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#define _ENABLE_SHIFT 5
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#define _FCSR_ENABLE_MASK (FE_ALL_EXCEPT << _ENABLE_SHIFT)
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/* Rounding modes */
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#define FE_TONEAREST 0x0000
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#define FE_TOWARDZERO 0x0001
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#define FE_UPWARD 0x0002
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#define FE_DOWNWARD 0x0003
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#define _FCSR_RMODE_SHIFT 0
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#define _FCSR_RMASK 0x3
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__END_DECLS
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#endif /* !_MIPS_FENV_H_ */
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