405b8029a6
Change-Id: I2864dea04b3faf2d919165dcaa600af5b16c41c8 Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Raghu Gandham <raghu@mips.com>
78 lines
2.5 KiB
C
78 lines
2.5 KiB
C
/* $OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */
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/*
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* Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#ifndef _MIPS64_ENDIAN_H_
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#define _MIPS64_ENDIAN_H_
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#if defined(__MIPSEL__)
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#define _BYTE_ORDER _LITTLE_ENDIAN
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#endif
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#if defined(__MIPSEB__)
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#define _BYTE_ORDER _BIG_ENDIAN
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#endif
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#if !defined(_BYTE_ORDER) && !defined(lint)
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#error "__MIPSEL__ or __MIPSEB__ must be defined to define BYTE_ORDER!!!"
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#endif
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#ifdef __GNUC__
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#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
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#define __swap16md(x) ({ \
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register uint16_t _x = (x); \
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register uint16_t _r; \
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__asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x)); \
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_r; \
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})
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#define __swap32md(x) ({ \
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register uint32_t _x = (x); \
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register uint32_t _r; \
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__asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
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_r; \
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})
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#define __swap64md(x) ({ \
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uint64_t _swap64md_x = (x); \
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(uint64_t) __swap32md(_swap64md_x >> 32) | \
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(uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \
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})
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/* Tell sys/endian.h we have MD variants of the swap macros. */
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#define MD_SWAP
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#endif /* __mips32r2__ */
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#endif /* __GNUC__ */
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#include <sys/endian.h>
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#define __STRICT_ALIGNMENT
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#endif /* _MIPS64_ENDIAN_H_ */
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