 2b333b97a2
			
		
	
	2b333b97a2
	
	
	
		
			
			It looks like we can probably just use the generic GCC stuff instead; the generated code looks pretty similar. We should come back to that. These routines are only used by the pthread implementation, and __bionic_atomic_inc isn't used, so we can remove it. Change-Id: I8b5b8cb30a1b159f0e85c3675aee06ddef39b429
		
			
				
	
	
		
			64 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			64 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2011 The Android Open Source Project
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|  *
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|  * Licensed under the Apache License, Version 2.0 (the "License");
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|  * you may not use this file except in compliance with the License.
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|  * You may obtain a copy of the License at
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|  *
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|  *      http://www.apache.org/licenses/LICENSE-2.0
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|  *
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|  * Unless required by applicable law or agreed to in writing, software
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|  * distributed under the License is distributed on an "AS IS" BASIS,
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|  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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|  * See the License for the specific language governing permissions and
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|  * limitations under the License.
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|  */
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| #ifndef BIONIC_ATOMIC_X86_H
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| #define BIONIC_ATOMIC_X86_H
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| 
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| /* Define a full memory barrier, this is only needed if we build the
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|  * platform for a multi-core device.
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|  */
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| __ATOMIC_INLINE__ void __bionic_memory_barrier() {
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| #if defined(ANDROID_SMP) && ANDROID_SMP == 1
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|   __asm__ __volatile__ ( "mfence" : : : "memory" );
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| #else
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|   /* A simple compiler barrier. */
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|   __asm__ __volatile__ ( "" : : : "memory" );
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| #endif
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| }
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| 
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| /* Compare-and-swap, without any explicit barriers. Note that this function
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|  * returns 0 on success, and 1 on failure. The opposite convention is typically
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|  * used on other platforms.
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|  */
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| __ATOMIC_INLINE__ int __bionic_cmpxchg(int32_t old_value, int32_t new_value, volatile int32_t* ptr) {
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|     int32_t prev;
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|     __asm__ __volatile__ ("lock; cmpxchgl %1, %2"
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|                           : "=a" (prev)
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|                           : "q" (new_value), "m" (*ptr), "0" (old_value)
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|                           : "memory");
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|     return prev != old_value;
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| }
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| 
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| /* Swap, without any explicit barriers. */
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| __ATOMIC_INLINE__ int32_t __bionic_swap(int32_t new_value, volatile int32_t *ptr) {
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|   __asm__ __volatile__ ("xchgl %1, %0"
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|                         : "=r" (new_value)
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|                         : "m" (*ptr), "0" (new_value)
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|                         : "memory");
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|   return new_value;
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| }
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| 
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| /* Atomic decrement, without explicit barriers. */
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| __ATOMIC_INLINE__ int32_t __bionic_atomic_dec(volatile int32_t* ptr) {
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|   int increment = -1;
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|   __asm__ __volatile__ ("lock; xaddl %0, %1"
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|                         : "+r" (increment), "+m" (*ptr)
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|                         : : "memory");
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|   /* increment now holds the old value of *ptr */
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|   return increment;
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| }
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| 
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| #endif /* BIONIC_ATOMIC_X86_H */
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