315 lines
12 KiB
C
315 lines
12 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __LINUX_MTD_NAND_H
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#define __LINUX_MTD_NAND_H
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#include <linux/wait.h>
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#include <linux/spinlock.h>
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#include <linux/mtd/mtd.h>
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struct mtd_info;
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#define NAND_MAX_CHIPS 8
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#define NAND_MAX_OOBSIZE 64
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_MAX_PAGESIZE 2048
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#define NAND_NCE 0x01
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#define NAND_CLE 0x02
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#define NAND_ALE 0x04
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_CTRL_CLE (NAND_NCE | NAND_CLE)
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#define NAND_CTRL_ALE (NAND_NCE | NAND_ALE)
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#define NAND_CTRL_CHANGE 0x80
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#define NAND_CMD_READ0 0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_CMD_READ1 1
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#define NAND_CMD_RNDOUT 5
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#define NAND_CMD_PAGEPROG 0x10
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#define NAND_CMD_READOOB 0x50
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_CMD_ERASE1 0x60
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#define NAND_CMD_STATUS 0x70
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#define NAND_CMD_STATUS_MULTI 0x71
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#define NAND_CMD_SEQIN 0x80
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_CMD_RNDIN 0x85
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#define NAND_CMD_READID 0x90
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#define NAND_CMD_ERASE2 0xd0
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#define NAND_CMD_RESET 0xff
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_CMD_READSTART 0x30
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#define NAND_CMD_RNDOUTSTART 0xE0
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#define NAND_CMD_CACHEDPROG 0x15
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#define NAND_CMD_DEPLETE1 0x100
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_CMD_DEPLETE2 0x38
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#define NAND_CMD_STATUS_MULTI 0x71
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#define NAND_CMD_STATUS_ERROR 0x72
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#define NAND_CMD_STATUS_ERROR0 0x73
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_CMD_STATUS_ERROR1 0x74
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#define NAND_CMD_STATUS_ERROR2 0x75
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#define NAND_CMD_STATUS_ERROR3 0x76
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#define NAND_CMD_STATUS_RESET 0x7f
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_CMD_STATUS_CLEAR 0xff
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#define NAND_CMD_NONE -1
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#define NAND_STATUS_FAIL 0x01
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#define NAND_STATUS_FAIL_N1 0x02
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_STATUS_TRUE_READY 0x20
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#define NAND_STATUS_READY 0x40
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#define NAND_STATUS_WP 0x80
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typedef enum {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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NAND_ECC_NONE,
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NAND_ECC_SOFT,
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NAND_ECC_HW,
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NAND_ECC_HW_SYNDROME,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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} nand_ecc_modes_t;
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#define NAND_ECC_READ 0
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#define NAND_ECC_WRITE 1
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#define NAND_ECC_READSYN 2
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_GET_DEVICE 0x80
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#define NAND_NO_AUTOINCR 0x00000001
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#define NAND_BUSWIDTH_16 0x00000002
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#define NAND_NO_PADDING 0x00000004
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_CACHEPRG 0x00000008
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#define NAND_COPYBACK 0x00000010
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#define NAND_IS_AND 0x00000020
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#define NAND_4PAGE_ARRAY 0x00000040
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define BBT_AUTO_REFRESH 0x00000080
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#define NAND_NO_READRDY 0x00000100
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#define NAND_SAMSUNG_LP_OPTIONS (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
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#define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
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#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
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#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
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#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_USE_FLASH_BBT 0x00010000
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#define NAND_SKIP_BBTSCAN 0x00020000
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#define NAND_CONTROLLER_ALLOC 0x80000000
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typedef enum {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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FL_READY,
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FL_READING,
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FL_WRITING,
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FL_ERASING,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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FL_SYNCING,
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FL_CACHEDPRG,
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FL_PM_SUSPENDED,
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} nand_state_t;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct nand_chip;
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struct nand_hw_control {
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spinlock_t lock;
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struct nand_chip *active;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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wait_queue_head_t wq;
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};
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struct nand_ecc_ctrl {
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nand_ecc_modes_t mode;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int steps;
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int size;
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int bytes;
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int total;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int prepad;
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int postpad;
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struct nand_ecclayout *layout;
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void (*hwctl)(struct mtd_info *mtd, int mode);
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int (*calculate)(struct mtd_info *mtd,
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const uint8_t *dat,
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uint8_t *ecc_code);
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int (*correct)(struct mtd_info *mtd, uint8_t *dat,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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uint8_t *read_ecc,
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uint8_t *calc_ecc);
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int (*read_page)(struct mtd_info *mtd,
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struct nand_chip *chip,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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uint8_t *buf);
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void (*write_page)(struct mtd_info *mtd,
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struct nand_chip *chip,
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const uint8_t *buf);
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int (*read_oob)(struct mtd_info *mtd,
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struct nand_chip *chip,
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int page,
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int sndcmd);
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int (*write_oob)(struct mtd_info *mtd,
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struct nand_chip *chip,
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int page);
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};
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct nand_buffers {
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uint8_t ecccalc[NAND_MAX_OOBSIZE];
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uint8_t ecccode[NAND_MAX_OOBSIZE];
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uint8_t oobwbuf[NAND_MAX_OOBSIZE];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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uint8_t databuf[NAND_MAX_PAGESIZE];
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uint8_t oobrbuf[NAND_MAX_OOBSIZE];
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};
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struct nand_chip {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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void __iomem *IO_ADDR_R;
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void __iomem *IO_ADDR_W;
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uint8_t (*read_byte)(struct mtd_info *mtd);
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u16 (*read_word)(struct mtd_info *mtd);
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
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void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
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int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
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void (*select_chip)(struct mtd_info *mtd, int chip);
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
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int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
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void (*cmd_ctrl)(struct mtd_info *mtd, int dat,
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unsigned int ctrl);
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int (*dev_ready)(struct mtd_info *mtd);
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void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
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int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
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void (*erase_cmd)(struct mtd_info *mtd, int page);
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int (*scan_bbt)(struct mtd_info *mtd);
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int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
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int chip_delay;
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unsigned int options;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int page_shift;
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int phys_erase_shift;
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int bbt_erase_shift;
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int chip_shift;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int numchips;
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unsigned long chipsize;
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int pagemask;
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int pagebuf;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int badblockpos;
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nand_state_t state;
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uint8_t *oob_poi;
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struct nand_hw_control *controller;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct nand_ecclayout *ecclayout;
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struct nand_ecc_ctrl ecc;
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struct nand_buffers buffers;
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struct nand_hw_control hwcontrol;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct mtd_oob_ops ops;
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uint8_t *bbt;
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struct nand_bbt_descr *bbt_td;
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struct nand_bbt_descr *bbt_md;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct nand_bbt_descr *badblock_pattern;
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void *priv;
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};
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#define NAND_MFR_TOSHIBA 0x98
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_MFR_SAMSUNG 0xec
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#define NAND_MFR_FUJITSU 0x04
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#define NAND_MFR_NATIONAL 0x8f
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#define NAND_MFR_RENESAS 0x07
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_MFR_STMICRO 0x20
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#define NAND_MFR_HYNIX 0xad
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struct nand_flash_dev {
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char *name;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int id;
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unsigned long pagesize;
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unsigned long chipsize;
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unsigned long erasesize;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned long options;
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};
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struct nand_manufacturers {
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int id;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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char * name;
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};
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struct nand_bbt_descr {
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int options;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int pages[NAND_MAX_CHIPS];
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int offs;
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int veroffs;
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uint8_t version[NAND_MAX_CHIPS];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int len;
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int maxblocks;
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int reserved_block_code;
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uint8_t *pattern;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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#define NAND_BBT_NRBITS_MSK 0x0000000F
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#define NAND_BBT_1BIT 0x00000001
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#define NAND_BBT_2BIT 0x00000002
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_BBT_4BIT 0x00000004
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#define NAND_BBT_8BIT 0x00000008
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#define NAND_BBT_LASTBLOCK 0x00000010
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#define NAND_BBT_ABSPAGE 0x00000020
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_BBT_SEARCH 0x00000040
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#define NAND_BBT_PERCHIP 0x00000080
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#define NAND_BBT_VERSION 0x00000100
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#define NAND_BBT_CREATE 0x00000200
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_BBT_SCANALLPAGES 0x00000400
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#define NAND_BBT_SCANEMPTY 0x00000800
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#define NAND_BBT_WRITE 0x00001000
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#define NAND_BBT_SAVECONTENT 0x00002000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define NAND_BBT_SCAN2NDPAGE 0x00004000
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#define NAND_BBT_SCAN_MAXBLOCKS 4
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#define NAND_SMALL_BADBLOCK_POS 5
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#define NAND_LARGE_BADBLOCK_POS 0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct platform_nand_chip {
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int nr_chips;
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int chip_offset;
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int nr_partitions;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct mtd_partition *partitions;
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struct nand_ecclayout *ecclayout;
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int chip_delay;
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unsigned int options;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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void *priv;
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};
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struct platform_nand_ctrl {
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void (*hwcontrol)(struct mtd_info *mtd, int cmd);
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int (*dev_ready)(struct mtd_info *mtd);
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void (*select_chip)(struct mtd_info *mtd, int chip);
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void *priv;
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};
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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