ad88a08631
Based on a pair of patches from Intel: https://android-review.googlesource.com/#/c/43909/ https://android-review.googlesource.com/#/c/44903/ For x86, this patch supports _both_ the global that ARM/MIPS use and the per-thread TLS entry (%gs:20) that GCC uses by default. This lets us support binaries built with any x86 toolchain (right now, the NDK is emitting x86 code that uses the global). I've also extended the original tests to cover ARM/MIPS too, and be a little more thorough for x86. Change-Id: I02f279a80c6b626aecad449771dec91df235ad01
142 lines
5.2 KiB
C
142 lines
5.2 KiB
C
/*
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* Copyright (C) 2008 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _SYS_TLS_H
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#define _SYS_TLS_H
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#include <sys/cdefs.h>
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__BEGIN_DECLS
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/** WARNING WARNING WARNING
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**
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** This header file is *NOT* part of the public Bionic ABI/API
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** and should not be used/included by user-serviceable parts of
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** the system (e.g. applications).
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**
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** It is only provided here for the benefit of the system dynamic
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** linker and the OpenGL sub-system (which needs to access the
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** pre-allocated slot directly for performance reason).
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**/
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/* Maximum number of elements in the TLS array. */
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#define BIONIC_TLS_SLOTS 64
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/* Well-known TLS slots. What data goes in which slot is arbitrary unless otherwise noted. */
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#define TLS_SLOT_SELF 0 /* The kernel requires this specific slot for x86. */
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#define TLS_SLOT_THREAD_ID 1
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#define TLS_SLOT_ERRNO 2
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#define TLS_SLOT_OPENGL_API 3
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#define TLS_SLOT_OPENGL 4
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#define TLS_SLOT_STACK_GUARD 5 /* GCC requires this specific slot for x86. */
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#define TLS_SLOT_DLERROR 6
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#define TLS_SLOT_MAX_WELL_KNOWN TLS_SLOT_DLERROR
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/* This slot is only used to pass information from the dynamic linker to
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* libc.so when the C library is loaded in to memory. The C runtime init
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* function will then clear it. Since its use is extremely temporary,
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* we reuse an existing location.
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*/
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#define TLS_SLOT_BIONIC_PREINIT TLS_SLOT_OPENGL_API
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#define TLS_DEFAULT_ALLOC_MAP 0x0000001F
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/* set the Thread Local Storage, must contain at least BIONIC_TLS_SLOTS pointers */
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extern void __init_tls(void** tls, void* thread_info);
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/* syscall only, do not call directly */
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extern int __set_tls(void *ptr);
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/* get the TLS */
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#ifdef __arm__
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/* The standard way to get the TLS is to call a kernel helper
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* function (i.e. a function provided at a fixed address in a
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* "magic page" mapped in all user-space address spaces ), which
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* contains the most appropriate code path for the target device.
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*
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* However, for performance reasons, we're going to use our own
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* machine code for the system's C shared library.
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*
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* We cannot use this optimization in the static version of the
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* C library, because we don't know where the corresponding code
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* is going to run.
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*/
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# ifdef LIBC_STATIC
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/* Use the kernel helper in static C library. */
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typedef volatile void* (__kernel_get_tls_t)(void);
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# define __get_tls() (*(__kernel_get_tls_t *)0xffff0fe0)()
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# else /* !LIBC_STATIC */
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/* Use optimized code path.
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* Note that HAVE_ARM_TLS_REGISTER is build-specific
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* (it must match your kernel configuration)
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*/
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# ifdef HAVE_ARM_TLS_REGISTER
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/* We can read the address directly from a coprocessor
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* register, which avoids touching the data cache
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* completely.
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*/
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# define __get_tls() \
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({ register unsigned int __val asm("r0"); \
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asm ("mrc p15, 0, r0, c13, c0, 3" : "=r"(__val) ); \
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(volatile void*)__val; })
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# else /* !HAVE_ARM_TLS_REGISTER */
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/* The kernel provides the address of the TLS at a fixed
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* address of the magic page too.
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*/
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# define __get_tls() ( *((volatile void **) 0xffff0ff0) )
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# endif
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# endif /* !LIBC_STATIC */
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#elif defined(__mips__)
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# define __get_tls() \
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({ register unsigned int __val asm("v1"); \
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asm ( \
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" .set push\n" \
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" .set mips32r2\n" \
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" rdhwr %0,$29\n" \
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" .set pop\n" \
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: "=r"(__val) \
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); \
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(volatile void*)__val; })
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#else
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extern void* __get_tls( void );
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#endif
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/* return the stack base and size, used by our malloc debugger */
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extern void* __get_stack_base(int *p_stack_size);
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/* Initialize the TLS. */
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extern void __libc_init_tls(unsigned** elfdata);
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__END_DECLS
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#endif /* _SYS_TLS_H */
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