413 changed files with 7793 additions and 32925 deletions
--- a/.clang-format
+++ b/.clang-format
@ -1,15 +0,0 @@
-BasedOnStyle: Google
-AllowShortBlocksOnASingleLine: false
-AllowShortFunctionsOnASingleLine: false
-
-ColumnLimit: 100
-CommentPragmas: NOLINT:.*
-DerivePointerAlignment: false
-IndentWidth: 2
-ContinuationIndentWidth: 2
-PointerAlignment: Left
-TabWidth: 2
-UseTab: Never
-PenaltyExcessCharacter: 32
-
-Cpp11BracedListStyle: false
--- a/Android.bp
+++ b/Android.bp
@ -1 +0,0 @@
-subdirs = ["*"]
--- a/README.md
+++ b/README.md
@ -169,10 +169,9 @@ As mentioned above, this is currently a two-step process:
 Updating tzdata
 ---------------

-This is fully automated (and these days handled by the libcore team, because
-they own icu, and that needs to be updated in sync with bionic):
+This is fully automated:

-  1. Run update-tzdata.py in external/icu/tools/.
+  1. Run update-tzdata.py.


 Verifying changes
@ -195,15 +194,14 @@ The tests are all built from the tests/ directory.
 ### Device tests

    $ mma
-    $ adb remount
    $ adb sync
    $ adb shell /data/nativetest/bionic-unit-tests/bionic-unit-tests32
    $ adb shell \
        /data/nativetest/bionic-unit-tests-static/bionic-unit-tests-static32
    # Only for 64-bit targets
-    $ adb shell /data/nativetest64/bionic-unit-tests/bionic-unit-tests64
+    $ adb shell /data/nativetest/bionic-unit-tests/bionic-unit-tests64
    $ adb shell \
-        /data/nativetest64/bionic-unit-tests-static/bionic-unit-tests-static64
+        /data/nativetest/bionic-unit-tests-static/bionic-unit-tests-static64

 ### Host tests

@ -258,33 +256,18 @@ First, build and run the host tests as usual (see above).
 The coverage report is now available at `covreport/index.html`.


-Attaching GDB to the tests
--------------------------
-
-Bionic's test runner will run each test in its own process by default to prevent
-tests failures from impacting other tests. This also has the added benefit of
-running them in parallel, so they are much faster.
-
-However, this also makes it difficult to run the tests under GDB. To prevent
-each test from being forked, run the tests with the flag `--no-isolate`.
-
-
-32-bit ABI bugs
---------------
+LP32 ABI bugs
+-------------

 This probably belongs in the NDK documentation rather than here, but these
-are the known ABI bugs in the 32-bit ABI:
+are the known ABI bugs in LP32:

- * `time_t` is 32-bit. <http://b/5819737>. In the 64-bit ABI, time_t is
-   64-bit.
+ * `time_t` is 32-bit. <http://b/5819737>

- * `off_t` is 32-bit. There is `off64_t`, and in newer releases there is
-   almost-complete support for `_FILE_OFFSET_BITS`. Unfortunately our stdio
-   implementation uses 32-bit offsets and -- worse -- function pointers to
-   functions that use 32-bit offsets, so there's no good way to implement
-   the last few pieces <http://b/24807045>. In the 64-bit ABI, off_t is
-   off64_t.
+ * `off_t` is 32-bit. There is `off64_t`, but no `_FILE_OFFSET_BITS` support.
+   Many of the `off64_t` functions are missing in older releases, and
+   stdio uses 32-bit offsets, so there's no way to fully implement
+   `_FILE_OFFSET_BITS`.

 * `sigset_t` is too small on ARM and x86 (but correct on MIPS), so support
-   for real-time signals is broken. <http://b/5828899> In the 64-bit ABI,
-   `sigset_t` is the correct size for every architecture.
+   for real-time signals is broken. <http://b/5828899>
--- a/benchmarks/Android.mk
+++ b/benchmarks/Android.mk
@ -29,6 +29,7 @@ benchmark_cflags := \
    -Wunused \

 benchmark_cppflags := \
+    -std=gnu++11 \

 benchmarklib_src_files := \
    Benchmark.cpp \
--- a/benchmarks/Benchmark.cpp
+++ b/benchmarks/Benchmark.cpp
@ -24,7 +24,7 @@
 #include <string>
 #include <vector>

-#include <android-base/stringprintf.h>
+#include <base/stringprintf.h>

 #include <benchmark/Benchmark.h>

--- a/benchmarks/math_benchmark.cpp
+++ b/benchmarks/math_benchmark.cpp
@ -65,50 +65,6 @@ void BM_math_logb::Run(int iters) {
  StopBenchmarkTiming();
 }

-BENCHMARK_WITH_ARG(BM_math_isfinite_macro, double)->AT_COMMON_VALS;
-void BM_math_isfinite_macro::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += isfinite(v);
-  }
-
-  StopBenchmarkTiming();
-}
-
-#if defined(__BIONIC__)
-#define test_isfinite __isfinite
-#else
-#define test_isfinite __finite
-#endif
-BENCHMARK_WITH_ARG(BM_math_isfinite, double)->AT_COMMON_VALS;
-void BM_math_isfinite::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += test_isfinite(v);
-  }
-
-  StopBenchmarkTiming();
-}
-
-BENCHMARK_WITH_ARG(BM_math_isinf_macro, double)->AT_COMMON_VALS;
-void BM_math_isinf_macro::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += isinf(v);
-  }
-
-  StopBenchmarkTiming();
-}
-
 BENCHMARK_WITH_ARG(BM_math_isinf, double)->AT_COMMON_VALS;
 void BM_math_isinf::Run(int iters, double value) {
  StartBenchmarkTiming();
@ -122,60 +78,6 @@ void BM_math_isinf::Run(int iters, double value) {
  StopBenchmarkTiming();
 }

-BENCHMARK_WITH_ARG(BM_math_isnan_macro, double)->AT_COMMON_VALS;
-void BM_math_isnan_macro::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += isnan(v);
-  }
-
-  StopBenchmarkTiming();
-}
-
-BENCHMARK_WITH_ARG(BM_math_isnan, double)->AT_COMMON_VALS;
-void BM_math_isnan::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += (isnan)(v);
-  }
-
-  StopBenchmarkTiming();
-}
-
-BENCHMARK_WITH_ARG(BM_math_isnormal_macro, double)->AT_COMMON_VALS;
-void BM_math_isnormal_macro::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += isnormal(v);
-  }
-
-  StopBenchmarkTiming();
-}
-
-#if defined(__BIONIC__)
-BENCHMARK_WITH_ARG(BM_math_isnormal, double)->AT_COMMON_VALS;
-void BM_math_isnormal::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += (__isnormal)(v);
-  }
-
-  StopBenchmarkTiming();
-}
-#endif
-
 BENCHMARK_NO_ARG(BM_math_sin_fast);
 void BM_math_sin_fast::Run(int iters) {
  StartBenchmarkTiming();
@ -232,55 +134,3 @@ void BM_math_fpclassify::Run(int iters, double value) {

  StopBenchmarkTiming();
 }
-
-BENCHMARK_WITH_ARG(BM_math_signbit_macro, double)->AT_COMMON_VALS;
-void BM_math_signbit_macro::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += signbit(v);
-  }
-
-  StopBenchmarkTiming();
-}
-
-BENCHMARK_WITH_ARG(BM_math_signbit, double)->AT_COMMON_VALS;
-void BM_math_signbit::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += (__signbit)(v);
-  }
-
-  StopBenchmarkTiming();
-}
-
-BENCHMARK_WITH_ARG(BM_math_fabs_macro, double)->AT_COMMON_VALS;
-void BM_math_fabs_macro::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += fabs(v);
-  }
-
-  StopBenchmarkTiming();
-}
-
-BENCHMARK_WITH_ARG(BM_math_fabs, double)->AT_COMMON_VALS;
-void BM_math_fabs::Run(int iters, double value) {
-  StartBenchmarkTiming();
-
-  d = 0.0;
-  v = value;
-  for (int i = 0; i < iters; ++i) {
-    d += (fabs)(v);
-  }
-
-  StopBenchmarkTiming();
-}
--- a/benchmarks/stdio_benchmark.cpp
+++ b/benchmarks/stdio_benchmark.cpp
@ -16,7 +16,6 @@

 #include <stdio.h>
 #include <stdio_ext.h>
-#include <stdlib.h>

 #include <benchmark/Benchmark.h>

@ -74,7 +73,7 @@ static void FopenFgetsFclose(int iters, bool no_locking) {
  for (int i = 0; i < iters; ++i) {
    FILE* fp = fopen("/proc/version", "re");
    if (no_locking) __fsetlocking(fp, FSETLOCKING_BYCALLER);
-    if (fgets(buf, sizeof(buf), fp) == nullptr) abort();
+    fgets(buf, sizeof(buf), fp);
    fclose(fp);
  }
 }
--- a/benchmarks/time_benchmark.cpp
+++ b/benchmarks/time_benchmark.cpp
@ -17,7 +17,6 @@
 #include <sys/syscall.h>
 #include <sys/time.h>
 #include <time.h>
-#include <unistd.h>

 #include <benchmark/Benchmark.h>

--- a/benchmarks/utils.cpp
+++ b/benchmarks/utils.cpp
@ -14,8 +14,6 @@
 * limitations under the License.
 */

-#include "utils.h"
-
 #include <inttypes.h>
 #include <stdio.h>
 #include <stdint.h>
@ -23,7 +21,7 @@

 #include <string>

-#include <android-base/stringprintf.h>
+#include "utils.h"

 int Round(int n) {
  int base = 1;
@ -74,7 +72,10 @@ std::string PrettyInt(long value, size_t base) {
      break;
    }
  }
-  return android::base::StringPrintf("%s%" PRId64 "%s",
-                                     negative_number ? "-" : "",
-                                     count / kAmountPerUnit[i], kUnitStrings[i]);
+  char* s = NULL;
+  asprintf(&s, "%s%" PRId64 "%s", (negative_number ? "-" : ""),
+           count / kAmountPerUnit[i], kUnitStrings[i]);
+  std::string result(s);
+  free(s);
+  return result;
 }
--- a/libc/Android.bp
+++ b/libc/Android.bp
--- a/libc/Android.mk
+++ b/libc/Android.mk
@ -1,6 +1,6 @@
 LOCAL_PATH := $(call my-dir)

-bionic_coverage ?= false
+bionic_coverage := false

 # Make everything depend on any changes to included makefiles.
 libc_common_additional_dependencies := $(LOCAL_PATH)/Android.mk
@ -47,6 +47,7 @@ libc_common_src_files := \
    bionic/if_indextoname.c \
    bionic/if_nametoindex.c \
    bionic/initgroups.c \
+    bionic/ioctl.c \
    bionic/isatty.c \
    bionic/memmem.c \
    bionic/pututline.c \
@ -58,7 +59,6 @@ libc_common_src_files := \
    bionic/system_properties_compat.c \
    stdio/findfp.c \
    stdio/fread.c \
-    stdio/refill.c \
    stdio/snprintf.c\
    stdio/sprintf.c \
    stdio/stdio.c \
@ -70,17 +70,12 @@ libc_common_src_files := \
 libc_common_src_files += \
    bionic/__FD_chk.cpp \
    bionic/__fgets_chk.cpp \
-    bionic/__fread_chk.cpp \
-    bionic/__fwrite_chk.cpp \
-    bionic/__getcwd_chk.cpp \
    bionic/__memchr_chk.cpp \
    bionic/__memmove_chk.cpp \
    bionic/__memrchr_chk.cpp \
    bionic/__poll_chk.cpp \
    bionic/__pread64_chk.cpp \
    bionic/__pread_chk.cpp \
-    bionic/__pwrite64_chk.cpp \
-    bionic/__pwrite_chk.cpp \
    bionic/__read_chk.cpp \
    bionic/__readlink_chk.cpp \
    bionic/__readlinkat_chk.cpp \
@ -97,14 +92,12 @@ libc_common_src_files += \
    bionic/__umask_chk.cpp \
    bionic/__vsnprintf_chk.cpp \
    bionic/__vsprintf_chk.cpp \
-    bionic/__write_chk.cpp

 libc_bionic_ndk_src_files := \
    bionic/abort.cpp \
    bionic/accept.cpp \
    bionic/accept4.cpp \
    bionic/access.cpp \
-    bionic/arpa_inet.cpp \
    bionic/assert.cpp \
    bionic/atof.cpp \
    bionic/bionic_systrace.cpp \
@ -137,7 +130,6 @@ libc_bionic_ndk_src_files := \
    bionic/fchmodat.cpp \
    bionic/ffs.cpp \
    bionic/fgetxattr.cpp \
-    bionic/flistxattr.cpp \
    bionic/flockfile.cpp \
    bionic/fpclassify.cpp \
    bionic/fsetxattr.cpp \
@ -149,9 +141,7 @@ libc_bionic_ndk_src_files := \
    bionic/getpid.cpp \
    bionic/gettid.cpp \
    bionic/__gnu_basename.cpp \
-    bionic/ifaddrs.cpp \
    bionic/inotify_init.cpp \
-    bionic/ioctl.cpp \
    bionic/lchown.cpp \
    bionic/lfs64_support.cpp \
    bionic/__libc_current_sigrtmax.cpp \
@ -171,7 +161,6 @@ libc_bionic_ndk_src_files := \
    bionic/mkfifo.cpp \
    bionic/mknod.cpp \
    bionic/mntent.cpp \
-    bionic/mremap.cpp \
    bionic/NetdClientDispatch.cpp \
    bionic/open.cpp \
    bionic/pathconf.cpp \
@ -218,7 +207,6 @@ libc_bionic_ndk_src_files := \
    bionic/socket.cpp \
    bionic/stat.cpp \
    bionic/statvfs.cpp \
-    bionic/strchrnul.cpp \
    bionic/strerror.cpp \
    bionic/strerror_r.cpp \
    bionic/strsignal.cpp \
@ -244,11 +232,9 @@ libc_bionic_ndk_src_files := \

 libc_bionic_src_files :=

-# The following implementations depend on pthread data, so we can't include
-# them in libc_ndk.a.
-libc_bionic_src_files += \
-    bionic/__cxa_thread_atexit_impl.cpp \
-    bionic/fork.cpp \
+# The fork implementation depends on pthread data, so we can't include it in
+# libc_ndk.a.
+libc_bionic_src_files += bionic/fork.cpp

 # The data that backs getauxval is initialized in the libc init functions which
 # are invoked by the linker. If this file is included in libc_ndk.a, only one of
@ -256,20 +242,10 @@ libc_bionic_src_files += \
 # dereferences.
 libc_bionic_src_files += bionic/getauxval.cpp

-# These four require getauxval, which isn't available on older platforms.
+# These three require getauxval, which isn't available on older platforms.
 libc_bionic_src_files += bionic/getentropy_linux.c
 libc_bionic_src_files += bionic/sysconf.cpp
 libc_bionic_src_files += bionic/vdso.cpp
-libc_bionic_src_files += bionic/setjmp_cookie.cpp
-
-libc_bionic_src_files += \
-    bionic/__memcpy_chk.cpp \
-    bionic/__memset_chk.cpp \
-    bionic/__strcat_chk.cpp \
-    bionic/__strcpy_chk.cpp \
-    bionic/strchr.cpp \
-    bionic/strnlen.c \
-    bionic/strrchr.cpp \

 libc_cxa_src_files := \
    bionic/__cxa_guard.cpp \
@ -280,33 +256,30 @@ libc_upstream_freebsd_src_files := \
    upstream-freebsd/lib/libc/gen/ldexp.c \
    upstream-freebsd/lib/libc/gen/sleep.c \
    upstream-freebsd/lib/libc/gen/usleep.c \
+    upstream-freebsd/lib/libc/stdlib/abs.c \
    upstream-freebsd/lib/libc/stdlib/getopt_long.c \
+    upstream-freebsd/lib/libc/stdlib/imaxabs.c \
+    upstream-freebsd/lib/libc/stdlib/imaxdiv.c \
+    upstream-freebsd/lib/libc/stdlib/labs.c \
+    upstream-freebsd/lib/libc/stdlib/llabs.c \
    upstream-freebsd/lib/libc/stdlib/qsort.c \
    upstream-freebsd/lib/libc/stdlib/quick_exit.c \
    upstream-freebsd/lib/libc/stdlib/realpath.c \
    upstream-freebsd/lib/libc/string/wcpcpy.c \
    upstream-freebsd/lib/libc/string/wcpncpy.c \
    upstream-freebsd/lib/libc/string/wcscasecmp.c \
-    upstream-freebsd/lib/libc/string/wcscat.c \
-    upstream-freebsd/lib/libc/string/wcschr.c \
-    upstream-freebsd/lib/libc/string/wcscmp.c \
-    upstream-freebsd/lib/libc/string/wcscpy.c \
    upstream-freebsd/lib/libc/string/wcscspn.c \
    upstream-freebsd/lib/libc/string/wcsdup.c \
    upstream-freebsd/lib/libc/string/wcslcat.c \
-    upstream-freebsd/lib/libc/string/wcslen.c \
    upstream-freebsd/lib/libc/string/wcsncasecmp.c \
    upstream-freebsd/lib/libc/string/wcsncat.c \
    upstream-freebsd/lib/libc/string/wcsncmp.c \
    upstream-freebsd/lib/libc/string/wcsncpy.c \
    upstream-freebsd/lib/libc/string/wcsnlen.c \
    upstream-freebsd/lib/libc/string/wcspbrk.c \
-    upstream-freebsd/lib/libc/string/wcsrchr.c \
    upstream-freebsd/lib/libc/string/wcsspn.c \
    upstream-freebsd/lib/libc/string/wcstok.c \
    upstream-freebsd/lib/libc/string/wmemchr.c \
-    upstream-freebsd/lib/libc/string/wmemcmp.c \
-    upstream-freebsd/lib/libc/string/wmemmove.c \
    upstream-freebsd/lib/libc/string/wmemset.c \

 libc_upstream_netbsd_src_files := \
@ -336,7 +309,6 @@ libc_upstream_netbsd_src_files := \
    upstream-netbsd/lib/libc/stdlib/nrand48.c \
    upstream-netbsd/lib/libc/stdlib/_rand48.c \
    upstream-netbsd/lib/libc/stdlib/rand_r.c \
-    upstream-netbsd/lib/libc/stdlib/reallocarr.c \
    upstream-netbsd/lib/libc/stdlib/seed48.c \
    upstream-netbsd/lib/libc/stdlib/srand48.c \
    upstream-netbsd/lib/libc/string/memccpy.c \
@ -371,25 +343,11 @@ libc_upstream_openbsd_gdtoa_src_files_64 := \
    $(libc_upstream_openbsd_gdtoa_src_files) \
    upstream-openbsd/lib/libc/gdtoa/strtorQ.c \

-# These two depend on getentropy_linux.c, which isn't in libc_ndk.a.
+# These two depend on getentropy_linux.cpp, which isn't in libc_ndk.a.
 libc_upstream_openbsd_src_files := \
    upstream-openbsd/lib/libc/crypt/arc4random.c \
    upstream-openbsd/lib/libc/crypt/arc4random_uniform.c \

-libc_upstream_openbsd_src_files += \
-    upstream-openbsd/lib/libc/string/memchr.c \
-    upstream-openbsd/lib/libc/string/memmove.c \
-    upstream-openbsd/lib/libc/string/memrchr.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/stpncpy.c \
-    upstream-openbsd/lib/libc/string/strcat.c \
-    upstream-openbsd/lib/libc/string/strcpy.c \
-    upstream-openbsd/lib/libc/string/strlcat.c \
-    upstream-openbsd/lib/libc/string/strlcpy.c \
-    upstream-openbsd/lib/libc/string/strncat.c \
-    upstream-openbsd/lib/libc/string/strncmp.c \
-    upstream-openbsd/lib/libc/string/strncpy.c \
-
 libc_upstream_openbsd_ndk_src_files := \
    upstream-openbsd/lib/libc/compat-43/killpg.c \
    upstream-openbsd/lib/libc/gen/alarm.c \
@ -432,9 +390,11 @@ libc_upstream_openbsd_ndk_src_files := \
    upstream-openbsd/lib/libc/locale/wctomb.c \
    upstream-openbsd/lib/libc/net/htonl.c \
    upstream-openbsd/lib/libc/net/htons.c \
+    upstream-openbsd/lib/libc/net/inet_addr.c \
    upstream-openbsd/lib/libc/net/inet_lnaof.c \
    upstream-openbsd/lib/libc/net/inet_makeaddr.c \
    upstream-openbsd/lib/libc/net/inet_netof.c \
+    upstream-openbsd/lib/libc/net/inet_network.c \
    upstream-openbsd/lib/libc/net/inet_ntoa.c \
    upstream-openbsd/lib/libc/net/inet_ntop.c \
    upstream-openbsd/lib/libc/net/inet_pton.c \
@ -494,6 +454,7 @@ libc_upstream_openbsd_ndk_src_files := \
    upstream-openbsd/lib/libc/stdio/puts.c \
    upstream-openbsd/lib/libc/stdio/putwc.c \
    upstream-openbsd/lib/libc/stdio/putwchar.c \
+    upstream-openbsd/lib/libc/stdio/refill.c \
    upstream-openbsd/lib/libc/stdio/remove.c \
    upstream-openbsd/lib/libc/stdio/rewind.c \
    upstream-openbsd/lib/libc/stdio/rget.c \
@ -527,16 +488,11 @@ libc_upstream_openbsd_ndk_src_files := \
    upstream-openbsd/lib/libc/stdio/wprintf.c \
    upstream-openbsd/lib/libc/stdio/wscanf.c \
    upstream-openbsd/lib/libc/stdio/wsetup.c \
-    upstream-openbsd/lib/libc/stdlib/abs.c \
    upstream-openbsd/lib/libc/stdlib/atoi.c \
    upstream-openbsd/lib/libc/stdlib/atol.c \
    upstream-openbsd/lib/libc/stdlib/atoll.c \
    upstream-openbsd/lib/libc/stdlib/getenv.c \
    upstream-openbsd/lib/libc/stdlib/insque.c \
-    upstream-openbsd/lib/libc/stdlib/imaxabs.c \
-    upstream-openbsd/lib/libc/stdlib/imaxdiv.c \
-    upstream-openbsd/lib/libc/stdlib/labs.c \
-    upstream-openbsd/lib/libc/stdlib/llabs.c \
    upstream-openbsd/lib/libc/stdlib/lsearch.c \
    upstream-openbsd/lib/libc/stdlib/reallocarray.c \
    upstream-openbsd/lib/libc/stdlib/remque.c \
@ -567,7 +523,6 @@ libc_upstream_openbsd_ndk_src_files := \
 libc_pthread_src_files := \
    bionic/pthread_atfork.cpp \
    bionic/pthread_attr.cpp \
-    bionic/pthread_barrier.cpp \
    bionic/pthread_cond.cpp \
    bionic/pthread_create.cpp \
    bionic/pthread_detach.cpp \
@ -587,7 +542,9 @@ libc_pthread_src_files := \
    bionic/pthread_setname_np.cpp \
    bionic/pthread_setschedparam.cpp \
    bionic/pthread_sigmask.cpp \
-    bionic/pthread_spinlock.cpp \
+
+libc_thread_atexit_impl_src_files := \
+    bionic/__cxa_thread_atexit_impl.cpp \

 libc_arch_static_src_files := \
    bionic/dl_iterate_phdr_static.cpp \
@ -617,19 +574,11 @@ libc_common_cflags := \
    -D_LIBC=1 \
    -Wall -Wextra -Wunused \

+ifneq ($(TARGET_USES_LOGD),false)
+libc_common_cflags += -DTARGET_USES_LOGD
+endif
+
 use_clang := $(USE_CLANG_PLATFORM_BUILD)
-
-# Clang/llvm has incompatible long double (fp128) for x86_64.
-# https://llvm.org/bugs/show_bug.cgi?id=23897
-ifeq ($(TARGET_ARCH),x86_64)
-  use_clang := false
-endif
-
-# b/25291096, Clang/llvm compiled libc.so for mips/mips64 failed to boot.
-ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),mips mips64))
-  use_clang := false
-endif
-
 ifeq ($(use_clang),)
  use_clang := false
 endif
@ -645,7 +594,7 @@ ifeq ($(strip $(DEBUG_BIONIC_LIBC)),true)
  libc_common_cflags += -DDEBUG
 endif

-ifeq ($(MALLOC_SVELTE),true)
+ifeq ($(MALLOC_IMPL),dlmalloc)
  libc_common_cflags += -DUSE_DLMALLOC
  libc_malloc_src := bionic/dlmalloc.c
 else
@ -654,12 +603,20 @@ else
  libc_common_c_includes += external/jemalloc/include
 endif

+# To customize dlmalloc's alignment, set BOARD_MALLOC_ALIGNMENT in
+# the appropriate BoardConfig.mk file.
+#
+ifneq ($(BOARD_MALLOC_ALIGNMENT),)
+  libc_common_cflags += -DMALLOC_ALIGNMENT=$(BOARD_MALLOC_ALIGNMENT)
+endif
+
 # Define some common conlyflags
 libc_common_conlyflags := \
    -std=gnu99

 # Define some common cppflags
 libc_common_cppflags := \
+    -std=gnu++11

 # Define some common includes
 # ========================================================
@ -684,21 +641,13 @@ endef
 # libc_stack_protector.a - stack protector code
 # ========================================================
 #
-# Code that implements the stack protector (or that runs
-# before TLS has been set up) needs to be compiled with
-# -fno-stack-protector, since it accesses the stack canary
-# TLS slot.
+# The stack protector code needs to be compiled
+# with -fno-stack-protector, since it modifies the
+# stack canary.

 include $(CLEAR_VARS)

-LOCAL_SRC_FILES := \
-    bionic/__libc_init_main_thread.cpp \
-    bionic/__stack_chk_fail.cpp \
-
-LOCAL_SRC_FILES_arm64 := arch-arm64/bionic/__set_tls.c
-LOCAL_SRC_FILES_x86 := arch-x86/bionic/__set_tls.c
-LOCAL_SRC_FILES_x86_64 := arch-x86_64/bionic/__set_tls.c
-
+LOCAL_SRC_FILES := bionic/__stack_chk_fail.cpp
 LOCAL_CFLAGS := $(libc_common_cflags) -fno-stack-protector
 LOCAL_CONLYFLAGS := $(libc_common_conlyflags)
 LOCAL_CPPFLAGS := $(libc_common_cppflags)
@ -708,31 +657,7 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
-LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
-
-$(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
-include $(BUILD_STATIC_LIBRARY)
-
-
-# libc_init_static.cpp also needs to be built without stack protector,
-# because it's responsible for setting up TLS for static executables.
-# This isn't the case for dynamic executables because the dynamic linker
-# has already set up the main thread's TLS.
-
-include $(CLEAR_VARS)
-
-LOCAL_SRC_FILES := bionic/libc_init_static.cpp
-LOCAL_CFLAGS := $(libc_common_cflags) -fno-stack-protector
-LOCAL_CONLYFLAGS := $(libc_common_conlyflags)
-LOCAL_CPPFLAGS := $(libc_common_cppflags)
-LOCAL_C_INCLUDES := $(libc_common_c_includes)
-LOCAL_MODULE := libc_init_static
-LOCAL_CLANG := $(use_clang)
-LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
-LOCAL_CXX_STL := none
-LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -751,22 +676,17 @@ LOCAL_SRC_FILES += upstream-openbsd/lib/libc/time/wcsftime.c

 LOCAL_CFLAGS := $(libc_common_cflags) \
    -fvisibility=hidden \
-    -Wno-unused-parameter \

 # Don't use ridiculous amounts of stack.
 LOCAL_CFLAGS += -DALL_STATE
 # Include tzsetwall, timelocal, timegm, time2posix, and posix2time.
 LOCAL_CFLAGS += -DSTD_INSPIRED
-# Obviously, we want to be thread-safe.
-LOCAL_CFLAGS += -DTHREAD_SAFE
 # The name of the tm_gmtoff field in our struct tm.
 LOCAL_CFLAGS += -DTM_GMTOFF=tm_gmtoff
 # Where we store our tzdata.
 LOCAL_CFLAGS += -DTZDIR=\"/system/usr/share/zoneinfo\"
 # Include timezone and daylight globals.
 LOCAL_CFLAGS += -DUSG_COMPAT=1
-# Use the empty string (instead of "   ") as the timezone abbreviation fallback.
-LOCAL_CFLAGS += -DWILDABBR=\"\"
 LOCAL_CFLAGS += -DNO_RUN_TIME_WARNINGS_ABOUT_YEAR_2000_PROBLEMS_THANK_YOU
 LOCAL_CFLAGS += -Dlint

@ -778,7 +698,7 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -824,7 +744,7 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -857,11 +777,11 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
-$(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES_EXCLUDE,libc_freebsd_src_files_exclude))
+$(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_freebsd_src_files))
 include $(BUILD_STATIC_LIBRARY)


@ -892,7 +812,7 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -933,7 +853,7 @@ LOCAL_MODULE := libc_openbsd_ndk
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -971,12 +891,11 @@ LOCAL_MODULE := libc_openbsd
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_openbsd_src_files))
-$(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES_EXCLUDE,libc_openbsd_src_files_exclude))
 include $(BUILD_STATIC_LIBRARY)


@ -1010,7 +929,7 @@ LOCAL_MODULE := libc_gdtoa
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -1035,12 +954,11 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_bionic_src_files))
-$(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES_EXCLUDE,libc_bionic_src_files_exclude))
 include $(BUILD_STATIC_LIBRARY)


@ -1064,13 +982,31 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_bionic_ndk_src_files))
 include $(BUILD_STATIC_LIBRARY)

+include $(CLEAR_VARS)
+LOCAL_SRC_FILES := $(libc_thread_atexit_impl_src_files)
+LOCAL_CFLAGS := $(libc_common_cflags) -Wframe-larger-than=2048
+
+LOCAL_CONLYFLAGS := $(libc_common_conlyflags)
+LOCAL_CPPFLAGS := $(libc_common_cppflags) -Wold-style-cast
+LOCAL_C_INCLUDES := $(libc_common_c_includes)
+LOCAL_MODULE := libc_thread_atexit_impl
+# TODO: Clang tries to use __tls_get_addr which is not supported yet
+# remove after it is implemented.
+LOCAL_CLANG := false
+LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
+LOCAL_CXX_STL := none
+LOCAL_SYSTEM_SHARED_LIBRARIES :=
+LOCAL_ADDRESS_SANITIZER := false
+LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
+
+include $(BUILD_STATIC_LIBRARY)

 # ========================================================
 # libc_pthread.a - pthreads parts that previously lived in
@ -1094,7 +1030,7 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 include $(BUILD_STATIC_LIBRARY)
@ -1118,7 +1054,7 @@ LOCAL_CLANG := true # GCC refuses to hide new/delete
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 # b/17574078: Need to disable coverage until we have a prebuilt libprofile_rt.
 # Since this is a static library built with clang, it needs to link
 # libprofile_rt when it is linked into the final binary. Since the final binary
@ -1146,7 +1082,7 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 include $(BUILD_STATIC_LIBRARY)
@ -1168,7 +1104,7 @@ LOCAL_CFLAGS := $(libc_common_cflags) -fno-builtin
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 include $(BUILD_STATIC_LIBRARY)
@ -1194,7 +1130,7 @@ LOCAL_CONLYFLAGS := $(libc_common_conlyflags)
 LOCAL_CFLAGS := $(libc_common_cflags) -fvisibility=hidden -O0
 LOCAL_CPPFLAGS := $(libc_common_cppflags)
 LOCAL_C_INCLUDES := $(libc_common_c_includes)
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 LOCAL_SYSTEM_SHARED_LIBRARIES :=

@ -1228,7 +1164,7 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \
 LOCAL_WHOLE_STATIC_LIBRARIES_arm := libc_aeabi
 LOCAL_CXX_STL := none

-ifneq ($(MALLOC_SVELTE),true)
+ifneq ($(MALLOC_IMPL),dlmalloc)
 LOCAL_WHOLE_STATIC_LIBRARIES += libjemalloc
 endif

@ -1268,6 +1204,7 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \
    libc_pthread \
    libc_stack_protector \
    libc_syscalls \
+    libc_thread_atexit_impl \
    libc_tzcode \

 LOCAL_WHOLE_STATIC_LIBRARIES_arm := libc_aeabi
@ -1277,7 +1214,7 @@ LOCAL_SYSTEM_SHARED_LIBRARIES :=

 # TODO: split out the asflags.
 LOCAL_ASFLAGS := $(LOCAL_CFLAGS)
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -1300,6 +1237,7 @@ include $(CLEAR_VARS)

 LOCAL_SRC_FILES := \
    $(libc_arch_static_src_files) \
+    bionic/libc_init_static.cpp

 LOCAL_C_INCLUDES := $(libc_common_c_includes)
 LOCAL_CFLAGS := $(libc_common_cflags) \
@ -1311,10 +1249,10 @@ LOCAL_CPPFLAGS := $(libc_common_cppflags)
 LOCAL_MODULE := libc_nomalloc
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
-LOCAL_WHOLE_STATIC_LIBRARIES := libc_common libc_init_static
+LOCAL_WHOLE_STATIC_LIBRARIES := libc_common
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -1337,7 +1275,7 @@ LOCAL_C_INCLUDES := $(libc_common_c_includes)
 LOCAL_MODULE := libc_malloc
 LOCAL_CLANG := $(use_clang)
 LOCAL_CXX_STL := none
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
 include $(BUILD_STATIC_LIBRARY)
@ -1351,6 +1289,7 @@ include $(CLEAR_VARS)
 LOCAL_SRC_FILES := \
    $(libc_arch_static_src_files) \
    bionic/malloc_debug_common.cpp \
+    bionic/libc_init_static.cpp \

 LOCAL_CFLAGS := $(libc_common_cflags) \
    -DLIBC_STATIC \
@ -1361,15 +1300,15 @@ LOCAL_C_INCLUDES := $(libc_common_c_includes)
 LOCAL_MODULE := libc
 LOCAL_CLANG := $(use_clang)
 LOCAL_ADDITIONAL_DEPENDENCIES := $(libc_common_additional_dependencies)
-LOCAL_WHOLE_STATIC_LIBRARIES := libc_common libc_init_static
+LOCAL_WHOLE_STATIC_LIBRARIES := libc_common

-ifneq ($(MALLOC_SVELTE),true)
+ifneq ($(MALLOC_IMPL),dlmalloc)
 LOCAL_WHOLE_STATIC_LIBRARIES += libjemalloc
 endif

 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -1401,15 +1340,7 @@ LOCAL_CLANG := $(use_clang)
 LOCAL_REQUIRED_MODULES := tzdata
 LOCAL_ADDITIONAL_DEPENDENCIES := \
    $(libc_common_additional_dependencies) \
-    $(LOCAL_PATH)/libc.arm.map \
-    $(LOCAL_PATH)/libc.arm64.map \
-    $(LOCAL_PATH)/libc.mips.map \
-    $(LOCAL_PATH)/libc.mips64.map \
-    $(LOCAL_PATH)/libc.x86.map \
-    $(LOCAL_PATH)/libc.x86_64.map \
-    $(LOCAL_PATH)/libc.arm.brillo.map \
-    $(LOCAL_PATH)/libc.mips.brillo.map \
-    $(LOCAL_PATH)/libc.x86.brillo.map \
+    $(LOCAL_PATH)/libc.map \

 # Leave the symbols in the shared library so that stack unwinders can produce
 # meaningful name resolution.
@ -1429,40 +1360,24 @@ LOCAL_PACK_MODULE_RELOCATIONS := false
 LOCAL_SHARED_LIBRARIES := libdl
 LOCAL_WHOLE_STATIC_LIBRARIES := libc_common

-ifneq ($(MALLOC_SVELTE),true)
+ifneq ($(MALLOC_IMPL),dlmalloc)
 LOCAL_WHOLE_STATIC_LIBRARIES += libjemalloc
 endif

 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES :=

-# TODO: This is to work around b/24465209. Remove after root cause is fixed
-LOCAL_LDFLAGS_arm := -Wl,--hash-style=both
-LOCAL_LDFLAGS_x86 := -Wl,--hash-style=both
-
 # Don't re-export new/delete and friends, even if the compiler really wants to.
-ifdef BRILLO
-LOCAL_LDFLAGS_arm    += -Wl,--version-script,$(LOCAL_PATH)/libc.arm.brillo.map
-LOCAL_LDFLAGS_mips   += -Wl,--version-script,$(LOCAL_PATH)/libc.mips.brillo.map
-LOCAL_LDFLAGS_x86    += -Wl,--version-script,$(LOCAL_PATH)/libc.x86.brillo.map
-else
-LOCAL_LDFLAGS_arm    += -Wl,--version-script,$(LOCAL_PATH)/libc.arm.map
-LOCAL_LDFLAGS_mips   += -Wl,--version-script,$(LOCAL_PATH)/libc.mips.map
-LOCAL_LDFLAGS_x86    += -Wl,--version-script,$(LOCAL_PATH)/libc.x86.map
-endif
-
-LOCAL_LDFLAGS_arm64  += -Wl,--version-script,$(LOCAL_PATH)/libc.arm64.map
-LOCAL_LDFLAGS_mips64 += -Wl,--version-script,$(LOCAL_PATH)/libc.mips64.map
-LOCAL_LDFLAGS_x86_64 += -Wl,--version-script,$(LOCAL_PATH)/libc.x86_64.map
+LOCAL_LDFLAGS := -Wl,--version-script,$(LOCAL_PATH)/libc.map

 # We'd really like to do this for all architectures, but since this wasn't done
 # before, these symbols must continue to be exported on LP32 for binary
 # compatibility.
 LOCAL_LDFLAGS_64 := -Wl,--exclude-libs,libgcc.a

-# Unfortunately --exclude-libs clobbers our version script, so we have to
-# prevent the build system from using this flag.
-LOCAL_NO_EXCLUDE_LIBS := true
+# TODO: This is to work around b/19059885. Remove after root cause is fixed
+LOCAL_LDFLAGS_arm := -Wl,--hash-style=both
+LOCAL_LDFLAGS_x86 := -Wl,--hash-style=both

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
 $(eval $(call patch-up-arch-specific-flags,LOCAL_SRC_FILES,libc_arch_dynamic_src_files))
@ -1475,7 +1390,7 @@ LOCAL_CFLAGS_arm += -DCRT_LEGACY_WORKAROUND
 LOCAL_SRC_FILES_arm += \
    arch-arm/bionic/atexit_legacy.c

-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 include $(BUILD_SHARED_LIBRARY)
@ -1503,8 +1418,8 @@ LOCAL_C_INCLUDES := \
    $(libc_common_c_includes) \

 LOCAL_SRC_FILES := \
-    bionic/debug_backtrace.cpp \
    bionic/debug_mapinfo.cpp \
+    bionic/debug_stacktrace.cpp \
    bionic/libc_logging.cpp \
    bionic/malloc_debug_leak.cpp \
    bionic/malloc_debug_check.cpp \
@ -1521,20 +1436,15 @@ LOCAL_SYSTEM_SHARED_LIBRARIES :=
 # Only need this for arm since libc++ uses its own unwind code that
 # doesn't mix with the other default unwind code.
 LOCAL_STATIC_LIBRARIES_arm := libunwind_llvm
-LOCAL_LDFLAGS_arm := -Wl,--exclude-libs,libunwind_llvm.a
 LOCAL_STATIC_LIBRARIES += libc++abi
 LOCAL_ALLOW_UNDEFINED_SYMBOLS := true

 # Don't re-export new/delete and friends, even if the compiler really wants to.
 LOCAL_LDFLAGS := -Wl,--version-script,$(LOCAL_PATH)/version_script.txt

-# Unfortunately --exclude-libs clobbers our version script, so we have to
-# prevent the build system from using this flag.
-LOCAL_NO_EXCLUDE_LIBS := true
-
 # Don't install on release build
 LOCAL_MODULE_TAGS := eng debug
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -1572,13 +1482,9 @@ LOCAL_SYSTEM_SHARED_LIBRARIES :=
 # Don't re-export new/delete and friends, even if the compiler really wants to.
 LOCAL_LDFLAGS := -Wl,--version-script,$(LOCAL_PATH)/version_script.txt

-# Unfortunately --exclude-libs clobbers our version script, so we have to
-# prevent the build system from using this flag.
-LOCAL_NO_EXCLUDE_LIBS := true
-
 # Don't install on release build
 LOCAL_MODULE_TAGS := eng debug
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)

 $(eval $(call patch-up-arch-specific-flags,LOCAL_CFLAGS,libc_common_cflags))
@ -1600,7 +1506,7 @@ LOCAL_C_INCLUDES := $(libc_common_c_includes) bionic/libstdc++/include
 LOCAL_CFLAGS := $(libc_common_cflags)
 LOCAL_CPPFLAGS := $(libc_common_cppflags)

-# TODO: This is to work around b/24465209. Remove after root cause is fixed
+# TODO: This is to work around b/19059885. Remove after root cause is fixed
 LOCAL_LDFLAGS_arm := -Wl,--hash-style=both
 LOCAL_LDFLAGS_x86 := -Wl,--hash-style=both

@ -1609,7 +1515,7 @@ LOCAL_MODULE:= libstdc++
 LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES := libc
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 include $(BUILD_SHARED_LIBRARY)

@ -1625,7 +1531,7 @@ LOCAL_MODULE:= libstdc++
 LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
 LOCAL_CXX_STL := none
 LOCAL_SYSTEM_SHARED_LIBRARIES := libc
-LOCAL_SANITIZE := never
+LOCAL_ADDRESS_SANITIZER := false
 LOCAL_NATIVE_COVERAGE := $(bionic_coverage)
 include $(BUILD_STATIC_LIBRARY)

--- a/libc/NOTICE
+++ b/libc/NOTICE
@ -307,6 +307,22 @@ SUCH DAMAGE.

 -------------------------------------------------------------------

+Copyright (C) 2009 The Android Open Source Project
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+     http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+-------------------------------------------------------------------
+
 Copyright (C) 2009 The Android Open Source Project
 All rights reserved.

@ -3905,6 +3921,35 @@ OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.

 -------------------------------------------------------------------

+Copyright (c) 2009
+     MIPS Technologies, Inc., California.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+1. Redistributions of source code must retain the above copyright
+   notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the distribution.
+3. Neither the name of the MIPS Technologies, Inc., nor the names of its
+   contributors may be used to endorse or promote products derived from
+   this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED.  IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGE.
+
+-------------------------------------------------------------------
+
 Copyright (c) 2009 David Schultz <das@FreeBSD.org>
 All rights reserved.

@ -4386,64 +4431,6 @@ Copyright (c) 2012, Linaro Limited

 -------------------------------------------------------------------

-Copyright (c) 2012-2015
-     MIPS Technologies, Inc., California.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
-   notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-3. Neither the name of the MIPS Technologies, Inc., nor the names of its
-   contributors may be used to endorse or promote products derived from
-   this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED.  IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGE.
-
-------------------------------------------------------------------
-
-Copyright (c) 2013
-     MIPS Technologies, Inc., California.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
-   notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-3. Neither the name of the MIPS Technologies, Inc., nor the names of its
-   contributors may be used to endorse or promote products derived from
-   this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED.  IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGE.
-
-------------------------------------------------------------------
-
 Copyright (c) 2013 ARM Ltd
 All rights reserved.

@ -4517,35 +4504,6 @@ POSSIBILITY OF SUCH DAMAGE.

 -------------------------------------------------------------------

-Copyright (c) 2014
-     Imagination Technologies Limited.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
-   notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-3. Neither the name of the MIPS Technologies, Inc., nor the names of its
-   contributors may be used to endorse or promote products derived from
-   this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY IMAGINATION TECHNOLOGIES LIMITED ``AS IS'' AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL IMAGINATION TECHNOLOGIES LIMITED BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGE.
-
-------------------------------------------------------------------
-
 Copyright (c) 2014 Theo de Raadt <deraadt@openbsd.org>
 Copyright (c) 2014 Bob Beck <beck@obtuse.com>

--- a/libc/SYSCALLS.TXT
+++ b/libc/SYSCALLS.TXT
@ -77,6 +77,7 @@ int prlimit64(pid_t, int, struct rlimit64*, const struct rlimit64*)  arm,mips,x8
 int     setgroups:setgroups32(int, const gid_t*)   arm,x86
 int     setgroups:setgroups(int, const gid_t*)     arm64,mips,mips64,x86_64
 int     setpgid(pid_t, pid_t)  all
+pid_t   vfork(void)  arm
 int     setregid:setregid32(gid_t, gid_t)  arm,x86
 int     setregid:setregid(gid_t, gid_t)    arm64,mips,mips64,x86_64
 int     chroot(const char*)  all
@ -94,20 +95,10 @@ ssize_t     pread64(int, void*, size_t, off64_t) arm,mips,x86
 ssize_t     pread64|pread(int, void*, size_t, off_t) arm64,mips64,x86_64
 ssize_t     pwrite64(int, void*, size_t, off64_t) arm,mips,x86
 ssize_t     pwrite64|pwrite(int, void*, size_t, off_t) arm64,mips64,x86_64
-
-# On LP32, preadv/pwritev don't use off64_t --- they use pairs of 32-bit
-# arguments to avoid problems on architectures like ARM where 64-bit arguments
-# must be in a register pair starting with an even-numbered register.
-# See linux/fs/read_write.c and https://lwn.net/Articles/311630/.
-ssize_t     __preadv64:preadv(int, const struct iovec*, int, long, long) arm,mips,x86
-ssize_t     preadv|preadv64(int, const struct iovec*, int, off_t) arm64,mips64,x86_64
-ssize_t     __pwritev64:pwritev(int, const struct iovec*, int, long, long) arm,mips,x86
-ssize_t     pwritev|pwritev64(int, const struct iovec*, int, off_t) arm64,mips64,x86_64
-
 int         ___close:close(int)  all
 pid_t       __getpid:getpid()  all
 int         munmap(void*, size_t)  all
-void*       ___mremap:mremap(void*, size_t, size_t, int, void*)  all
+void*       mremap(void*, size_t, size_t, unsigned long)  all
 int         msync(const void*, size_t, int)    all
 int         mprotect(const void*, size_t, int)  all
 int         madvise(void*, size_t, int)  all
@ -133,7 +124,7 @@ int         fchown:fchown(int, uid_t, gid_t)    arm64,mips,mips64,x86_64
 void        sync(void)  all
 int         ___fsetxattr:fsetxattr(int, const char*, const void*, size_t, int) all
 ssize_t     ___fgetxattr:fgetxattr(int, const char*, void*, size_t) all
-ssize_t     ___flistxattr:flistxattr(int, char*, size_t) all
+ssize_t     flistxattr(int, char*, size_t) all
 int         fremovexattr(int, const char*) all

 int __getdents64:getdents64(unsigned int, struct dirent*, unsigned int)   arm,arm64,mips,mips64,x86,x86_64
@ -342,7 +333,7 @@ int     __set_tls:set_thread_area(void*) mips,mips64
 int     __set_thread_area:set_thread_area(void*) x86

 # vdso stuff.
-int clock_gettime(clockid_t, timespec*)                 arm,mips,mips64
-int __clock_gettime:clock_gettime(clockid_t, timespec*) arm64,x86,x86_64
-int gettimeofday(timeval*, timezone*)                   arm,mips,mips64
-int __gettimeofday:gettimeofday(timeval*, timezone*)    arm64,x86,x86_64
+int clock_gettime(clockid_t, timespec*)                 arm,mips,mips64,x86
+int __clock_gettime:clock_gettime(clockid_t, timespec*) arm64,x86_64
+int gettimeofday(timeval*, timezone*)                   arm,mips,mips64,x86
+int __gettimeofday:gettimeofday(timeval*, timezone*)    arm64,x86_64
--- a/libc/arch-arm/arm.mk
+++ b/libc/arch-arm/arm.mk
@ -1,19 +1,33 @@
 # 32-bit arm.

+#
+# Default implementations of functions that are commonly optimized.
+#
+
 libc_bionic_src_files_arm += \
-    arch-arm/generic/bionic/memcmp.S \
-    arch-arm/generic/bionic/memcpy.S \
-    arch-arm/generic/bionic/memset.S \
-    arch-arm/generic/bionic/strcmp.S \
-    arch-arm/generic/bionic/strcpy.S \
-    arch-arm/generic/bionic/strlen.c \
+    bionic/strchr.cpp \
+    bionic/strnlen.c \
+    bionic/strrchr.cpp \

-libc_bionic_src_files_exclude_arm += \
-    bionic/__memcpy_chk.cpp \
-    bionic/__memset_chk.cpp \
+libc_freebsd_src_files_arm += \
+    upstream-freebsd/lib/libc/string/wcscat.c \
+    upstream-freebsd/lib/libc/string/wcschr.c \
+    upstream-freebsd/lib/libc/string/wcscmp.c \
+    upstream-freebsd/lib/libc/string/wcscpy.c \
+    upstream-freebsd/lib/libc/string/wcslen.c \
+    upstream-freebsd/lib/libc/string/wcsrchr.c \
+    upstream-freebsd/lib/libc/string/wmemcmp.c \
+    upstream-freebsd/lib/libc/string/wmemmove.c \

-libc_openbsd_src_files_exclude_arm += \
-    upstream-openbsd/lib/libc/string/strcpy.c \
+libc_openbsd_src_files_arm += \
+    upstream-openbsd/lib/libc/string/memchr.c \
+    upstream-openbsd/lib/libc/string/memrchr.c \
+    upstream-openbsd/lib/libc/string/stpncpy.c \
+    upstream-openbsd/lib/libc/string/strlcat.c \
+    upstream-openbsd/lib/libc/string/strlcpy.c \
+    upstream-openbsd/lib/libc/string/strncat.c \
+    upstream-openbsd/lib/libc/string/strncmp.c \
+    upstream-openbsd/lib/libc/string/strncpy.c \

 #
 # Inherently architecture-specific code.
@ -25,11 +39,9 @@ libc_bionic_src_files_arm += \
    arch-arm/bionic/__bionic_clone.S \
    arch-arm/bionic/_exit_with_stack_teardown.S \
    arch-arm/bionic/libgcc_compat.c \
-    arch-arm/bionic/popcount_tab.c \
    arch-arm/bionic/__restore.S \
    arch-arm/bionic/setjmp.S \
    arch-arm/bionic/syscall.S \
-    arch-arm/bionic/vfork.S \

 libc_arch_static_src_files_arm := arch-arm/bionic/exidx_static.c
 libc_arch_dynamic_src_files_arm := arch-arm/bionic/exidx_dynamic.c
@ -38,7 +50,6 @@ libc_arch_dynamic_src_files_arm := arch-arm/bionic/exidx_dynamic.c
 ifeq ($(strip $(TARGET_$(my_2nd_arch_prefix)CPU_VARIANT)),)
  $(warning TARGET_$(my_2nd_arch_prefix)ARCH is arm, but TARGET_$(my_2nd_arch_prefix)CPU_VARIANT is not defined)
 endif
-ifneq ($(TARGET_$(my_2nd_arch_prefix)CPU_VARIANT),generic)
 cpu_variant_mk := $(LOCAL_PATH)/arch-arm/$(TARGET_$(my_2nd_arch_prefix)CPU_VARIANT)/$(TARGET_$(my_2nd_arch_prefix)CPU_VARIANT).mk
 ifeq ($(wildcard $(cpu_variant_mk)),)
 $(error "TARGET_$(my_2nd_arch_prefix)CPU_VARIANT not set or set to an unknown value. Possible values are cortex-a7, cortex-a8, cortex-a9, cortex-a15, krait, denver. Use generic for devices that do not have a CPU similar to any of the supported cpu variants.")
@ -47,7 +58,6 @@ include $(cpu_variant_mk)
 libc_common_additional_dependencies += $(cpu_variant_mk)

 cpu_variant_mk :=
-endif


 libc_crt_target_cflags_arm := \
--- a/libc/arch-arm/bionic/__aeabi.c
+++ b/libc/arch-arm/bionic/__aeabi.c
@ -51,62 +51,34 @@ extern int __cxa_atexit(void (*)(void*), void*, void*);
 */

 int __attribute__((weak))
-__aeabi_atexit_impl(void *object, void (*destructor) (void *), void *dso_handle) {
-    return __cxa_atexit(destructor, object, dso_handle);
-}
-
-int __attribute__((weak))
-__aeabi_atexit_impl2(void *object, void (*destructor) (void *), void *dso_handle) {
+__aeabi_atexit(void *object, void (*destructor) (void *), void *dso_handle) {
    return __cxa_atexit(destructor, object, dso_handle);
 }


-void __attribute__((weak)) __aeabi_memcpy8_impl(void *dest, const void *src, size_t n) {
+void __attribute__((weak))
+__aeabi_memcpy8(void *dest, const void *src, size_t n) {
    memcpy(dest, src, n);
 }

-void __attribute__((weak)) __aeabi_memcpy4_impl(void *dest, const void *src, size_t n) {
+void __attribute__((weak)) __aeabi_memcpy4(void *dest, const void *src, size_t n) {
    memcpy(dest, src, n);
 }

-void __attribute__((weak)) __aeabi_memcpy_impl(void *dest, const void *src, size_t n) {
-    memcpy(dest, src, n);
-}
-
-void __attribute__((weak)) __aeabi_memcpy8_impl2(void *dest, const void *src, size_t n) {
-    memcpy(dest, src, n);
-}
-
-void __attribute__((weak)) __aeabi_memcpy4_impl2(void *dest, const void *src, size_t n) {
-    memcpy(dest, src, n);
-}
-
-void __attribute__((weak)) __aeabi_memcpy_impl2(void *dest, const void *src, size_t n) {
+void __attribute__((weak)) __aeabi_memcpy(void *dest, const void *src, size_t n) {
    memcpy(dest, src, n);
 }


-void __attribute__((weak)) __aeabi_memmove8_impl(void *dest, const void *src, size_t n) {
+void __attribute__((weak)) __aeabi_memmove8(void *dest, const void *src, size_t n) {
    memmove(dest, src, n);
 }

-void __attribute__((weak)) __aeabi_memmove4_impl(void *dest, const void *src, size_t n) {
+void __attribute__((weak)) __aeabi_memmove4(void *dest, const void *src, size_t n) {
    memmove(dest, src, n);
 }

-void __attribute__((weak)) __aeabi_memmove_impl(void *dest, const void *src, size_t n) {
-    memmove(dest, src, n);
-}
-
-void __attribute__((weak)) __aeabi_memmove8_impl2(void *dest, const void *src, size_t n) {
-    memmove(dest, src, n);
-}
-
-void __attribute__((weak)) __aeabi_memmove4_impl2(void *dest, const void *src, size_t n) {
-    memmove(dest, src, n);
-}
-
-void __attribute__((weak)) __aeabi_memmove_impl2(void *dest, const void *src, size_t n) {
+void __attribute__((weak)) __aeabi_memmove(void *dest, const void *src, size_t n) {
    memmove(dest, src, n);
 }

@ -115,71 +87,27 @@ void __attribute__((weak)) __aeabi_memmove_impl2(void *dest, const void *src, si
 *  This allows __aeabi_memclr to tail-call __aeabi_memset
 */

-void __attribute__((weak)) __aeabi_memset8_impl(void *dest, size_t n, int c) {
+void __attribute__((weak)) __aeabi_memset8(void *dest, size_t n, int c) {
    memset(dest, c, n);
 }

-void __attribute__((weak)) __aeabi_memset4_impl(void *dest, size_t n, int c) {
+void __attribute__((weak)) __aeabi_memset4(void *dest, size_t n, int c) {
    memset(dest, c, n);
 }

-void __attribute__((weak)) __aeabi_memset_impl(void *dest, size_t n, int c) {
-    memset(dest, c, n);
-}
-
-void __attribute__((weak)) __aeabi_memset8_impl2(void *dest, size_t n, int c) {
-    memset(dest, c, n);
-}
-
-void __attribute__((weak)) __aeabi_memset4_impl2(void *dest, size_t n, int c) {
-    memset(dest, c, n);
-}
-
-void __attribute__((weak)) __aeabi_memset_impl2(void *dest, size_t n, int c) {
+void __attribute__((weak)) __aeabi_memset(void *dest, size_t n, int c) {
    memset(dest, c, n);
 }


-void __attribute__((weak)) __aeabi_memclr8_impl(void *dest, size_t n) {
-    __aeabi_memset8_impl(dest, n, 0);
+void __attribute__((weak)) __aeabi_memclr8(void *dest, size_t n) {
+    __aeabi_memset8(dest, n, 0);
 }

-void __attribute__((weak)) __aeabi_memclr4_impl(void *dest, size_t n) {
-    __aeabi_memset4_impl(dest, n, 0);
+void __attribute__((weak)) __aeabi_memclr4(void *dest, size_t n) {
+    __aeabi_memset4(dest, n, 0);
 }

-void __attribute__((weak)) __aeabi_memclr_impl(void *dest, size_t n) {
-    __aeabi_memset_impl(dest, n, 0);
+void __attribute__((weak)) __aeabi_memclr(void *dest, size_t n) {
+    __aeabi_memset(dest, n, 0);
 }
-
-void __attribute__((weak)) __aeabi_memclr8_impl2(void *dest, size_t n) {
-    __aeabi_memset8_impl(dest, n, 0);
-}
-
-void __attribute__((weak)) __aeabi_memclr4_impl2(void *dest, size_t n) {
-    __aeabi_memset4_impl(dest, n, 0);
-}
-
-void __attribute__((weak)) __aeabi_memclr_impl2(void *dest, size_t n) {
-    __aeabi_memset_impl(dest, n, 0);
-}
-
-#define __AEABI_SYMVERS(fn_name) \
-__asm__(".symver " #fn_name "_impl, " #fn_name "@@LIBC_N"); \
-__asm__(".symver " #fn_name "_impl2, " #fn_name "@LIBC_PRIVATE")
-
-__AEABI_SYMVERS(__aeabi_atexit);
-__AEABI_SYMVERS(__aeabi_memcpy8);
-__AEABI_SYMVERS(__aeabi_memcpy4);
-__AEABI_SYMVERS(__aeabi_memcpy);
-__AEABI_SYMVERS(__aeabi_memmove8);
-__AEABI_SYMVERS(__aeabi_memmove4);
-__AEABI_SYMVERS(__aeabi_memmove);
-__AEABI_SYMVERS(__aeabi_memset8);
-__AEABI_SYMVERS(__aeabi_memset4);
-__AEABI_SYMVERS(__aeabi_memset);
-__AEABI_SYMVERS(__aeabi_memclr8);
-__AEABI_SYMVERS(__aeabi_memclr4);
-__AEABI_SYMVERS(__aeabi_memclr);
-
-#undef __AEABI_SYMVERS
--- a/libc/arch-arm/bionic/__restore.S
+++ b/libc/arch-arm/bionic/__restore.S
@ -34,9 +34,7 @@
 // __restore_rt (but covered by the .fnstart/.fnend) so that although they're
 // not inside the functions from objdump's point of view, an unwinder that
 // blindly looks at the previous instruction (but is then smart enough to check
-// the unwind information to find out where it landed) gets the right answer.
-// Make sure not to have both DWARF and ARM unwind information, so only
-// use the ARM unwind information.
+// the DWARF information to find out where it landed) gets the right answer.

 // We need to place .fnstart ourselves (but we may as well keep the free .fnend).
 #undef __bionic_asm_custom_entry
@ -46,18 +44,18 @@
  .save {r0-r15}
  .pad #32
  nop
-ENTRY_PRIVATE_NO_DWARF(__restore)
+ENTRY_PRIVATE(__restore)
  // This function must have exactly this instruction sequence.
  mov r7, #__NR_sigreturn
  swi #0
-END_NO_DWARF(__restore)
+END(__restore)

  .fnstart
  .save {r0-r15}
  .pad #160
  nop
-ENTRY_PRIVATE_NO_DWARF(__restore_rt)
+ENTRY_PRIVATE(__restore_rt)
  // This function must have exactly this instruction sequence.
  mov r7, #__NR_rt_sigreturn
  swi #0
-END_NO_DWARF(__restore_rt)
+END(__restore_rt)
--- a/libc/arch-arm/bionic/exidx_dynamic.c
+++ b/libc/arch-arm/bionic/exidx_dynamic.c
@ -37,13 +37,7 @@
 * the expectation that libc will define it and call through to
 * a differently-named function in the dynamic linker.
 */
-_Unwind_Ptr __gnu_Unwind_Find_exidx_impl(_Unwind_Ptr pc, int *pcount) {
+_Unwind_Ptr __gnu_Unwind_Find_exidx(_Unwind_Ptr pc, int *pcount)
+{
    return dl_unwind_find_exidx(pc, pcount);
 }
-
-_Unwind_Ptr __gnu_Unwind_Find_exidx_impl2(_Unwind_Ptr pc, int *pcount) {
-    return dl_unwind_find_exidx(pc, pcount);
-}
-
-__asm__(".symver __gnu_Unwind_Find_exidx_impl,__gnu_Unwind_Find_exidx@LIBC_PRIVATE");
-__asm__(".symver __gnu_Unwind_Find_exidx_impl2,__gnu_Unwind_Find_exidx@@LIBC_N");
--- a/libc/arch-arm/bionic/popcount_tab.c
+++ b/libc/arch-arm/bionic/popcount_tab.c
@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2015 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-// Export this to maintain ABI compatibilty with libgcc, since compiler-rt
-// doesn't use a table-driven implementation of __popcount.
-const unsigned char __popcount_tab[256] = {
-  0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3,
-  3, 4, 3, 4, 4, 5, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5, 2, 3, 3, 4,
-  3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4,
-  4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 2, 3, 3, 4, 3, 4, 4, 5,
-  3, 4, 4, 5, 4, 5, 5, 6, 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 1, 2,
-  2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5,
-  4, 5, 5, 6, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 3, 4, 4, 5, 4, 5,
-  5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
-  3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 3, 4, 4, 5, 4, 5, 5, 6, 4, 5,
-  5, 6, 5, 6, 6, 7, 4, 5, 5, 6, 5, 6, 6, 7, 5, 6, 6, 7, 6, 7, 7, 8
-};
--- a/libc/arch-arm/bionic/setjmp.S
+++ b/libc/arch-arm/bionic/setjmp.S
@ -51,13 +51,13 @@
 // The internal structure of a jmp_buf is totally private.
 // Current layout (may change in the future):
 //
-// word   name            description
-// 0      sigflag/cookie  setjmp cookie in top 31 bits, signal mask flag in low bit
-// 1      sigmask         signal mask (not used with _setjmp / _longjmp)
-// 2      float_base      base of float registers (d8 to d15)
-// 18     float_state     floating-point status and control register
-// 19     core_base       base of core registers (r4 to r14)
-// 30     reserved        reserved entries (room to grow)
+// word   name         description
+// 0      magic        magic number
+// 1      sigmask      signal mask (not used with _setjmp / _longjmp)
+// 2      float_base   base of float registers (d8 to d15)
+// 18     float_state  floating-point status and control register
+// 19     core_base    base of core registers (r4 to r14)
+// 30     reserved     reserved entries (room to grow)
 // 64
 //
 // NOTE: float_base must be at an even word index, since the
@ -80,82 +80,33 @@ ENTRY(_setjmp)
  b sigsetjmp
 END(_setjmp)

-#define MANGLE_REGISTERS 1
-.macro m_mangle_registers reg
-#if MANGLE_REGISTERS
-  eor r4, r4, \reg
-  eor r5, r5, \reg
-  eor r6, r6, \reg
-  eor r7, r7, \reg
-  eor r8, r8, \reg
-  eor r9, r9, \reg
-  eor r10, r10, \reg
-  eor r11, r11, \reg
-  eor r12, r12, \reg
-  eor r13, r13, \reg
-  eor r14, r14, \reg
-#endif
-.endm
-
-.macro m_unmangle_registers reg
-  m_mangle_registers \reg
-.endm
-
 // int sigsetjmp(sigjmp_buf env, int save_signal_mask);
 ENTRY(sigsetjmp)
-  stmfd sp!, {r0, lr}
-  .cfi_def_cfa_offset 8
-  .cfi_rel_offset r0, 0
-  .cfi_rel_offset lr, 4
-
-  mov r0, r1
-  bl __bionic_setjmp_cookie_get
-  mov r1, r0
-
-  ldmfd sp, {r0}
-
-  // Save the setjmp cookie for later.
-  bic r2, r1, #1
-  stmfd sp!, {r2}
-  .cfi_adjust_cfa_offset 4
-
-  // Record the setjmp cookie and whether or not we're saving the signal mask.
+  // Record whether or not we're saving the signal mask.
  str r1, [r0, #(_JB_SIGFLAG * 4)]

  // Do we need to save the signal mask?
-  tst r1, #1
+  teq r1, #0
  beq 1f

-  // Align the stack.
-  sub sp, #4
-  .cfi_adjust_cfa_offset 4
+  // Get current signal mask.
+  stmfd sp!, {r0, r14}
+  .cfi_def_cfa_offset 8
+  .cfi_rel_offset r0, 0
+  .cfi_rel_offset r14, 4
+  mov r0, #0
+  bl sigblock
+  mov r1, r0
+  ldmfd sp!, {r0, r14}
+  .cfi_def_cfa_offset 0

-  // Save the current signal mask.
-  add r2, r0, #(_JB_SIGMASK * 4)
-  mov r0, #2 // SIG_SETMASK
-  mov r1, #0
-  bl sigprocmask
-
-  // Unalign the stack.
-  add sp, #4
-  .cfi_adjust_cfa_offset -4
+  // Save the signal mask.
+  str r1, [r0, #(_JB_SIGMASK * 4)]

 1:
-  ldmfd sp!, {r2}
-  .cfi_adjust_cfa_offset -4
-  ldmfd sp!, {r0, lr}
-  .cfi_adjust_cfa_offset -8
-  .cfi_restore r0
-  .cfi_restore lr
-
  // Save core registers.
  add r1, r0, #(_JB_CORE_BASE * 4)
-  m_mangle_registers r2
-
-  // ARM deprecates using sp in the register list for stmia.
-  stmia r1, {r4-r12, lr}
-  str sp, [r1, #(10 * 4)]
-  m_unmangle_registers r2
+  stmia r1, {r4-r14}

  // Save floating-point registers.
  add r1, r0, #(_JB_FLOAT_BASE * 4)
@ -171,30 +122,29 @@ END(sigsetjmp)

 // void siglongjmp(sigjmp_buf env, int value);
 ENTRY(siglongjmp)
-  stmfd sp!, {r0, r1, lr}
-  .cfi_def_cfa_offset 12
-  .cfi_rel_offset r0, 0
-  .cfi_rel_offset r1, 4
-  .cfi_rel_offset lr, 8
-
-  // Fetch the signal flag.
-  ldr r1, [r0, #(_JB_SIGFLAG * 4)]
-
  // Do we need to restore the signal mask?
-  ands r1, r1, #1
+  ldr r2, [r0, #(_JB_SIGFLAG * 4)]
+  teq r2, #0
  beq 1f

  // Restore the signal mask.
+  stmfd sp!, {r0, r1, r14}
+  .cfi_def_cfa_offset 12
+  .cfi_rel_offset r0, 0
+  .cfi_rel_offset r1, 4
+  .cfi_rel_offset r14, 8
+  sub sp, sp, #4 // Align the stack.
+  .cfi_adjust_cfa_offset 4
+
  ldr r0, [r0, #(_JB_SIGMASK * 4)]
  bl sigsetmask

-1:
-  ldmfd sp!, {r0, r1, lr}
-  .cfi_adjust_cfa_offset -12
-  .cfi_restore r0
-  .cfi_restore r1
-  .cfi_restore lr
+  add sp, sp, #4 // Unalign the stack.
+  .cfi_adjust_cfa_offset -4
+  ldmfd sp!, {r0, r1, r14}
+  .cfi_def_cfa_offset 0

+1:
  // Restore floating-point registers.
  add r2, r0, #(_JB_FLOAT_BASE * 4)
  vldmia r2, {d8-d15}
@ -204,27 +154,16 @@ ENTRY(siglongjmp)
  fmxr fpscr, r2

  // Restore core registers.
-  ldr r3, [r0, #(_JB_SIGFLAG * 4)]
-  bic r3, r3, #1
  add r2, r0, #(_JB_CORE_BASE * 4)
+  ldmia r2, {r4-r14}

-  // ARM deprecates using sp in the register list for ldmia.
-  ldmia r2, {r4-r12, lr}
-  ldr sp, [r2, #(10 * 4)]
-  m_unmangle_registers r3
-
-  // Save the return value/address and check the setjmp cookie.
-  stmfd sp!, {r1, lr}
-  .cfi_adjust_cfa_offset 8
-  .cfi_rel_offset lr, 4
-  mov r0, r3
-  bl __bionic_setjmp_cookie_check
-
-  // Restore return value/address.
-  ldmfd sp!, {r0, lr}
-  .cfi_adjust_cfa_offset -8
-  .cfi_restore lr
+  // Validate sp and r14.
+  teq sp, #0
+  teqne r14, #0
+  bleq longjmperror

+  // Set return value.
+  mov r0, r1
  teq r0, #0
  moveq r0, #1
  bx lr
--- a/libc/arch-arm/bionic/vfork.S
+++ b/libc/arch-arm/bionic/vfork.S
@ -1,46 +0,0 @@
-/*
- * Copyright (C) 2015 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-
-ENTRY(vfork)
-    // __get_tls()[TLS_SLOT_THREAD_ID]->cached_pid_ = 0
-    mrc     p15, 0, r3, c13, c0, 3
-    ldr     r3, [r3, #4]
-    mov     r0, #0
-    str     r0, [r3, #12]
-
-    mov     ip, r7
-    ldr     r7, =__NR_vfork
-    swi     #0
-    mov     r7, ip
-    cmn     r0, #(MAX_ERRNO + 1)
-    bxls    lr
-    neg     r0, r0
-    b       __set_errno_internal
-END(vfork)
--- a/libc/arch-arm/cortex-a15/bionic/__strcat_chk.S
+++ b/libc/arch-arm/cortex-a15/bionic/__strcat_chk.S
@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2015 The Android Open Source Project
+ * Copyright (C) 2013 The Android Open Source Project
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,191 @@
 * SUCH DAMAGE.
 */

-// Indicate which memcpy base file to include.
-#define MEMCPY_BASE "memcpy_base.S"
+#include <private/bionic_asm.h>
+#include <private/libc_events.h>

-#include "__strcat_chk_common.S"
+    .syntax unified
+
+    .thumb
+    .thumb_func
+
+// Get the length of src string, then get the source of the dst string.
+// Check that the two lengths together don't exceed the threshold, then
+// do a memcpy of the data.
+ENTRY(__strcat_chk)
+    pld     [r0, #0]
+    push    {r0, lr}
+    .cfi_def_cfa_offset 8
+    .cfi_rel_offset r0, 0
+    .cfi_rel_offset lr, 4
+    push    {r4, r5}
+    .cfi_adjust_cfa_offset 8
+    .cfi_rel_offset r4, 0
+    .cfi_rel_offset r5, 4
+
+    mov     lr, r2
+
+    // Save the dst register to r5
+    mov     r5, r0
+
+    // Zero out r4
+    eor     r4, r4, r4
+
+    // r1 contains the address of the string to count.
+.L_strlen_start:
+    mov     r0, r1
+    ands    r3, r1, #7
+    beq     .L_mainloop
+
+    // Align to a double word (64 bits).
+    rsb     r3, r3, #8
+    lsls    ip, r3, #31
+    beq     .L_align_to_32
+
+    ldrb    r2, [r1], #1
+    cbz     r2, .L_update_count_and_finish
+
+.L_align_to_32:
+    bcc     .L_align_to_64
+    ands    ip, r3, #2
+    beq     .L_align_to_64
+
+    ldrb    r2, [r1], #1
+    cbz     r2, .L_update_count_and_finish
+    ldrb    r2, [r1], #1
+    cbz     r2, .L_update_count_and_finish
+
+.L_align_to_64:
+    tst     r3, #4
+    beq     .L_mainloop
+    ldr     r3, [r1], #4
+
+    sub     ip, r3, #0x01010101
+    bic     ip, ip, r3
+    ands    ip, ip, #0x80808080
+    bne     .L_zero_in_second_register
+
+    .p2align 2
+.L_mainloop:
+    ldrd    r2, r3, [r1], #8
+
+    pld     [r1, #64]
+
+    sub     ip, r2, #0x01010101
+    bic     ip, ip, r2
+    ands    ip, ip, #0x80808080
+    bne     .L_zero_in_first_register
+
+    sub     ip, r3, #0x01010101
+    bic     ip, ip, r3
+    ands    ip, ip, #0x80808080
+    bne     .L_zero_in_second_register
+    b       .L_mainloop
+
+.L_update_count_and_finish:
+    sub     r3, r1, r0
+    sub     r3, r3, #1
+    b       .L_finish
+
+.L_zero_in_first_register:
+    sub     r3, r1, r0
+    lsls    r2, ip, #17
+    bne     .L_sub8_and_finish
+    bcs     .L_sub7_and_finish
+    lsls    ip, ip, #1
+    bne     .L_sub6_and_finish
+
+    sub     r3, r3, #5
+    b       .L_finish
+
+.L_sub8_and_finish:
+    sub     r3, r3, #8
+    b       .L_finish
+
+.L_sub7_and_finish:
+    sub     r3, r3, #7
+    b       .L_finish
+
+.L_sub6_and_finish:
+    sub     r3, r3, #6
+    b       .L_finish
+
+.L_zero_in_second_register:
+    sub     r3, r1, r0
+    lsls    r2, ip, #17
+    bne     .L_sub4_and_finish
+    bcs     .L_sub3_and_finish
+    lsls    ip, ip, #1
+    bne     .L_sub2_and_finish
+
+    sub     r3, r3, #1
+    b       .L_finish
+
+.L_sub4_and_finish:
+    sub     r3, r3, #4
+    b       .L_finish
+
+.L_sub3_and_finish:
+    sub     r3, r3, #3
+    b       .L_finish
+
+.L_sub2_and_finish:
+    sub     r3, r3, #2
+
+.L_finish:
+    cmp     r4, #0
+    bne     .L_strlen_done
+
+    // Time to get the dst string length.
+    mov     r1, r5
+
+    // Save the original source address to r5.
+    mov     r5, r0
+
+    // Save the current length (adding 1 for the terminator).
+    add     r4, r3, #1
+    b       .L_strlen_start
+
+    // r0 holds the pointer to the dst string.
+    // r3 holds the dst string length.
+    // r4 holds the src string length + 1.
+.L_strlen_done:
+    add     r2, r3, r4
+    cmp     r2, lr
+    bhi     __strcat_chk_failed
+
+    // Set up the registers for the memcpy code.
+    mov     r1, r5
+    pld     [r1, #64]
+    mov     r2, r4
+    add     r0, r0, r3
+    pop     {r4, r5}
+END(__strcat_chk)
+
+#define MEMCPY_BASE         __strcat_chk_memcpy_base
+#define MEMCPY_BASE_ALIGNED __strcat_chk_memcpy_base_aligned
+
+#include "memcpy_base.S"
+
+ENTRY_PRIVATE(__strcat_chk_failed)
+    .cfi_def_cfa_offset 8
+    .cfi_rel_offset r0, 0
+    .cfi_rel_offset lr, 4
+    .cfi_adjust_cfa_offset 8
+    .cfi_rel_offset r4, 0
+    .cfi_rel_offset r5, 4
+
+    ldr     r0, error_message
+    ldr     r1, error_code
+1:
+    add     r0, pc
+    bl      __fortify_chk_fail
+error_code:
+    .word   BIONIC_EVENT_STRCAT_BUFFER_OVERFLOW
+error_message:
+    .word   error_string-(1b+4)
+END(__strcat_chk_failed)
+
+    .data
+error_string:
+    .string "strcat: prevented write past end of buffer"
--- a/libc/arch-arm/cortex-a15/bionic/__strcat_chk_common.S
+++ b/libc/arch-arm/cortex-a15/bionic/__strcat_chk_common.S
@ -1,212 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <private/libc_events.h>
-
-    .syntax unified
-
-    .thumb
-    .thumb_func
-
-// Get the length of src string, then get the source of the dst string.
-// Check that the two lengths together don't exceed the threshold, then
-// do a memcpy of the data.
-ENTRY(__strcat_chk)
-    pld     [r0, #0]
-    push    {r0, lr}
-    .cfi_def_cfa_offset 8
-    .cfi_rel_offset r0, 0
-    .cfi_rel_offset lr, 4
-    push    {r4, r5}
-    .cfi_adjust_cfa_offset 8
-    .cfi_rel_offset r4, 0
-    .cfi_rel_offset r5, 4
-
-    mov     lr, r2
-
-    // Save the dst register to r5
-    mov     r5, r0
-
-    // Zero out r4
-    eor     r4, r4, r4
-
-    // r1 contains the address of the string to count.
-.L_strlen_start:
-    mov     r0, r1
-    ands    r3, r1, #7
-    beq     .L_mainloop
-
-    // Align to a double word (64 bits).
-    rsb     r3, r3, #8
-    lsls    ip, r3, #31
-    beq     .L_align_to_32
-
-    ldrb    r2, [r1], #1
-    cbz     r2, .L_update_count_and_finish
-
-.L_align_to_32:
-    bcc     .L_align_to_64
-    ands    ip, r3, #2
-    beq     .L_align_to_64
-
-    ldrb    r2, [r1], #1
-    cbz     r2, .L_update_count_and_finish
-    ldrb    r2, [r1], #1
-    cbz     r2, .L_update_count_and_finish
-
-.L_align_to_64:
-    tst     r3, #4
-    beq     .L_mainloop
-    ldr     r3, [r1], #4
-
-    sub     ip, r3, #0x01010101
-    bic     ip, ip, r3
-    ands    ip, ip, #0x80808080
-    bne     .L_zero_in_second_register
-
-    .p2align 2
-.L_mainloop:
-    ldrd    r2, r3, [r1], #8
-
-    pld     [r1, #64]
-
-    sub     ip, r2, #0x01010101
-    bic     ip, ip, r2
-    ands    ip, ip, #0x80808080
-    bne     .L_zero_in_first_register
-
-    sub     ip, r3, #0x01010101
-    bic     ip, ip, r3
-    ands    ip, ip, #0x80808080
-    bne     .L_zero_in_second_register
-    b       .L_mainloop
-
-.L_update_count_and_finish:
-    sub     r3, r1, r0
-    sub     r3, r3, #1
-    b       .L_finish
-
-.L_zero_in_first_register:
-    sub     r3, r1, r0
-    lsls    r2, ip, #17
-    bne     .L_sub8_and_finish
-    bcs     .L_sub7_and_finish
-    lsls    ip, ip, #1
-    bne     .L_sub6_and_finish
-
-    sub     r3, r3, #5
-    b       .L_finish
-
-.L_sub8_and_finish:
-    sub     r3, r3, #8
-    b       .L_finish
-
-.L_sub7_and_finish:
-    sub     r3, r3, #7
-    b       .L_finish
-
-.L_sub6_and_finish:
-    sub     r3, r3, #6
-    b       .L_finish
-
-.L_zero_in_second_register:
-    sub     r3, r1, r0
-    lsls    r2, ip, #17
-    bne     .L_sub4_and_finish
-    bcs     .L_sub3_and_finish
-    lsls    ip, ip, #1
-    bne     .L_sub2_and_finish
-
-    sub     r3, r3, #1
-    b       .L_finish
-
-.L_sub4_and_finish:
-    sub     r3, r3, #4
-    b       .L_finish
-
-.L_sub3_and_finish:
-    sub     r3, r3, #3
-    b       .L_finish
-
-.L_sub2_and_finish:
-    sub     r3, r3, #2
-
-.L_finish:
-    cmp     r4, #0
-    bne     .L_strlen_done
-
-    // Time to get the dst string length.
-    mov     r1, r5
-
-    // Save the original source address to r5.
-    mov     r5, r0
-
-    // Save the current length (adding 1 for the terminator).
-    add     r4, r3, #1
-    b       .L_strlen_start
-
-    // r0 holds the pointer to the dst string.
-    // r3 holds the dst string length.
-    // r4 holds the src string length + 1.
-.L_strlen_done:
-    add     r2, r3, r4
-    cmp     r2, lr
-    bhi     .L_strcat_chk_failed
-
-    // Set up the registers for the memcpy code.
-    mov     r1, r5
-    pld     [r1, #64]
-    mov     r2, r4
-    add     r0, r0, r3
-    pop     {r4, r5}
-    .cfi_adjust_cfa_offset -8
-    .cfi_restore r4
-    .cfi_restore r5
-
-#include MEMCPY_BASE
-
-    // Undo the above cfi directives
-    .cfi_adjust_cfa_offset 8
-    .cfi_rel_offset r4, 0
-    .cfi_rel_offset r5, 4
-.L_strcat_chk_failed:
-    ldr     r0, error_message
-    ldr     r1, error_code
-1:
-    add     r0, pc
-    bl      __fortify_chk_fail
-error_code:
-    .word   BIONIC_EVENT_STRCAT_BUFFER_OVERFLOW
-error_message:
-    .word   error_string-(1b+4)
-END(__strcat_chk)
-
-    .data
-error_string:
-    .string "strcat: prevented write past end of buffer"
--- a/libc/arch-arm/cortex-a15/bionic/__strcpy_chk.S
+++ b/libc/arch-arm/cortex-a15/bionic/__strcpy_chk.S
@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2015 The Android Open Source Project
+ * Copyright (C) 2013 The Android Open Source Project
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
@ -26,7 +26,155 @@
 * SUCH DAMAGE.
 */

-// Indicate which memcpy base file to include.
-#define MEMCPY_BASE "memcpy_base.S"
+#include <private/bionic_asm.h>
+#include <private/libc_events.h>

-#include "__strcpy_chk_common.S"
+    .syntax unified
+
+    .thumb
+    .thumb_func
+
+// Get the length of the source string first, then do a memcpy of the data
+// instead of a strcpy.
+ENTRY(__strcpy_chk)
+    pld     [r0, #0]
+    push    {r0, lr}
+    .cfi_def_cfa_offset 8
+    .cfi_rel_offset r0, 0
+    .cfi_rel_offset lr, 4
+
+    mov     lr, r2
+    mov     r0, r1
+
+    ands    r3, r1, #7
+    beq     .L_mainloop
+
+    // Align to a double word (64 bits).
+    rsb     r3, r3, #8
+    lsls    ip, r3, #31
+    beq     .L_align_to_32
+
+    ldrb    r2, [r0], #1
+    cbz     r2, .L_update_count_and_finish
+
+.L_align_to_32:
+    bcc     .L_align_to_64
+    ands    ip, r3, #2
+    beq     .L_align_to_64
+
+    ldrb    r2, [r0], #1
+    cbz     r2, .L_update_count_and_finish
+    ldrb    r2, [r0], #1
+    cbz     r2, .L_update_count_and_finish
+
+.L_align_to_64:
+    tst     r3, #4
+    beq     .L_mainloop
+    ldr     r3, [r0], #4
+
+    sub     ip, r3, #0x01010101
+    bic     ip, ip, r3
+    ands    ip, ip, #0x80808080
+    bne     .L_zero_in_second_register
+
+    .p2align 2
+.L_mainloop:
+    ldrd    r2, r3, [r0], #8
+
+    pld     [r0, #64]
+
+    sub     ip, r2, #0x01010101
+    bic     ip, ip, r2
+    ands    ip, ip, #0x80808080
+    bne     .L_zero_in_first_register
+
+    sub     ip, r3, #0x01010101
+    bic     ip, ip, r3
+    ands    ip, ip, #0x80808080
+    bne     .L_zero_in_second_register
+    b       .L_mainloop
+
+.L_update_count_and_finish:
+    sub     r3, r0, r1
+    sub     r3, r3, #1
+    b       .L_check_size
+
+.L_zero_in_first_register:
+    sub     r3, r0, r1
+    lsls    r2, ip, #17
+    bne     .L_sub8_and_finish
+    bcs     .L_sub7_and_finish
+    lsls    ip, ip, #1
+    bne     .L_sub6_and_finish
+
+    sub     r3, r3, #5
+    b       .L_check_size
+
+.L_sub8_and_finish:
+    sub     r3, r3, #8
+    b       .L_check_size
+
+.L_sub7_and_finish:
+    sub     r3, r3, #7
+    b       .L_check_size
+
+.L_sub6_and_finish:
+    sub     r3, r3, #6
+    b       .L_check_size
+
+.L_zero_in_second_register:
+    sub     r3, r0, r1
+    lsls    r2, ip, #17
+    bne     .L_sub4_and_finish
+    bcs     .L_sub3_and_finish
+    lsls    ip, ip, #1
+    bne     .L_sub2_and_finish
+
+    sub     r3, r3, #1
+    b       .L_check_size
+
+.L_sub4_and_finish:
+    sub     r3, r3, #4
+    b       .L_check_size
+
+.L_sub3_and_finish:
+    sub     r3, r3, #3
+    b       .L_check_size
+
+.L_sub2_and_finish:
+    sub     r3, r3, #2
+
+.L_check_size:
+    pld     [r1, #0]
+    pld     [r1, #64]
+    ldr     r0, [sp]
+    cmp     r3, lr
+    bhs     __strcpy_chk_failed
+
+    // Add 1 for copy length to get the string terminator.
+    add     r2, r3, #1
+END(__strcpy_chk)
+
+#define MEMCPY_BASE         __strcpy_chk_memcpy_base
+#define MEMCPY_BASE_ALIGNED __strcpy_chk_memcpy_base_aligned
+#include "memcpy_base.S"
+
+ENTRY_PRIVATE(__strcpy_chk_failed)
+    .cfi_def_cfa_offset 8
+    .cfi_rel_offset r0, 0
+    .cfi_rel_offset lr, 4
+
+    ldr     r0, error_message
+    ldr     r1, error_code
+1:
+    add     r0, pc
+    bl      __fortify_chk_fail
+error_code:
+    .word   BIONIC_EVENT_STRCPY_BUFFER_OVERFLOW
+error_message:
+    .word   error_string-(1b+4)
+END(__strcpy_chk_failed)
+
+    .data
+error_string:
+    .string "strcpy: prevented write past end of buffer"
--- a/libc/arch-arm/cortex-a15/bionic/__strcpy_chk_common.S
+++ b/libc/arch-arm/cortex-a15/bionic/__strcpy_chk_common.S
@ -1,173 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <private/libc_events.h>
-
-    .syntax unified
-
-    .thumb
-    .thumb_func
-
-// Get the length of the source string first, then do a memcpy of the data
-// instead of a strcpy.
-ENTRY(__strcpy_chk)
-    pld     [r0, #0]
-    push    {r0, lr}
-    .cfi_def_cfa_offset 8
-    .cfi_rel_offset r0, 0
-    .cfi_rel_offset lr, 4
-
-    mov     lr, r2
-    mov     r0, r1
-
-    ands    r3, r1, #7
-    beq     .L_mainloop
-
-    // Align to a double word (64 bits).
-    rsb     r3, r3, #8
-    lsls    ip, r3, #31
-    beq     .L_align_to_32
-
-    ldrb    r2, [r0], #1
-    cbz     r2, .L_update_count_and_finish
-
-.L_align_to_32:
-    bcc     .L_align_to_64
-    ands    ip, r3, #2
-    beq     .L_align_to_64
-
-    ldrb    r2, [r0], #1
-    cbz     r2, .L_update_count_and_finish
-    ldrb    r2, [r0], #1
-    cbz     r2, .L_update_count_and_finish
-
-.L_align_to_64:
-    tst     r3, #4
-    beq     .L_mainloop
-    ldr     r3, [r0], #4
-
-    sub     ip, r3, #0x01010101
-    bic     ip, ip, r3
-    ands    ip, ip, #0x80808080
-    bne     .L_zero_in_second_register
-
-    .p2align 2
-.L_mainloop:
-    ldrd    r2, r3, [r0], #8
-
-    pld     [r0, #64]
-
-    sub     ip, r2, #0x01010101
-    bic     ip, ip, r2
-    ands    ip, ip, #0x80808080
-    bne     .L_zero_in_first_register
-
-    sub     ip, r3, #0x01010101
-    bic     ip, ip, r3
-    ands    ip, ip, #0x80808080
-    bne     .L_zero_in_second_register
-    b       .L_mainloop
-
-.L_update_count_and_finish:
-    sub     r3, r0, r1
-    sub     r3, r3, #1
-    b       .L_check_size
-
-.L_zero_in_first_register:
-    sub     r3, r0, r1
-    lsls    r2, ip, #17
-    bne     .L_sub8_and_finish
-    bcs     .L_sub7_and_finish
-    lsls    ip, ip, #1
-    bne     .L_sub6_and_finish
-
-    sub     r3, r3, #5
-    b       .L_check_size
-
-.L_sub8_and_finish:
-    sub     r3, r3, #8
-    b       .L_check_size
-
-.L_sub7_and_finish:
-    sub     r3, r3, #7
-    b       .L_check_size
-
-.L_sub6_and_finish:
-    sub     r3, r3, #6
-    b       .L_check_size
-
-.L_zero_in_second_register:
-    sub     r3, r0, r1
-    lsls    r2, ip, #17
-    bne     .L_sub4_and_finish
-    bcs     .L_sub3_and_finish
-    lsls    ip, ip, #1
-    bne     .L_sub2_and_finish
-
-    sub     r3, r3, #1
-    b       .L_check_size
-
-.L_sub4_and_finish:
-    sub     r3, r3, #4
-    b       .L_check_size
-
-.L_sub3_and_finish:
-    sub     r3, r3, #3
-    b       .L_check_size
-
-.L_sub2_and_finish:
-    sub     r3, r3, #2
-
-.L_check_size:
-    pld     [r1, #0]
-    pld     [r1, #64]
-    ldr     r0, [sp]
-    cmp     r3, lr
-    bhs     .L_strcpy_chk_failed
-
-    // Add 1 for copy length to get the string terminator.
-    add     r2, r3, #1
-
-#include MEMCPY_BASE
-
-.L_strcpy_chk_failed:
-    ldr     r0, error_message
-    ldr     r1, error_code
-1:
-    add     r0, pc
-    bl      __fortify_chk_fail
-error_code:
-    .word   BIONIC_EVENT_STRCPY_BUFFER_OVERFLOW
-error_message:
-    .word   error_string-(1b+4)
-END(__strcpy_chk)
-
-    .data
-error_string:
-    .string "strcpy: prevented write past end of buffer"
--- a/libc/arch-arm/cortex-a15/bionic/memcpy.S
+++ b/libc/arch-arm/cortex-a15/bionic/memcpy.S
@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2015 The Android Open Source Project
+ * Copyright (C) 2008 The Android Open Source Project
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
@ -25,8 +25,79 @@
 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */
+/*
+ * Copyright (c) 2013 ARM Ltd
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the company may not be used to endorse or promote
+ *    products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */

-// Indicate which memcpy base file to include.
-#define MEMCPY_BASE "memcpy_base.S"
+// Prototype: void *memcpy (void *dst, const void *src, size_t count).

-#include "memcpy_common.S"
+#include <private/bionic_asm.h>
+#include <private/libc_events.h>
+
+        .text
+        .syntax unified
+        .fpu    neon
+
+ENTRY(__memcpy_chk)
+        cmp     r2, r3
+        bhi     __memcpy_chk_fail
+
+        // Fall through to memcpy...
+END(__memcpy_chk)
+
+ENTRY(memcpy)
+        pld     [r1, #64]
+        push    {r0, lr}
+        .cfi_def_cfa_offset 8
+        .cfi_rel_offset r0, 0
+        .cfi_rel_offset lr, 4
+END(memcpy)
+
+#define MEMCPY_BASE         __memcpy_base
+#define MEMCPY_BASE_ALIGNED __memcpy_base_aligned
+#include "memcpy_base.S"
+
+ENTRY_PRIVATE(__memcpy_chk_fail)
+        // Preserve lr for backtrace.
+        push    {lr}
+        .cfi_def_cfa_offset 4
+        .cfi_rel_offset lr, 0
+
+        ldr     r0, error_message
+        ldr     r1, error_code
+1:
+        add     r0, pc
+        bl      __fortify_chk_fail
+error_code:
+        .word   BIONIC_EVENT_MEMCPY_BUFFER_OVERFLOW
+error_message:
+        .word   error_string-(1b+8)
+END(__memcpy_chk_fail)
+
+        .data
+error_string:
+        .string "memcpy: prevented write past end of buffer"
--- a/libc/arch-arm/cortex-a15/bionic/memcpy_base.S
+++ b/libc/arch-arm/cortex-a15/bionic/memcpy_base.S
@ -53,7 +53,11 @@
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

-.L_memcpy_base:
+ENTRY_PRIVATE(MEMCPY_BASE)
+        .cfi_def_cfa_offset 8
+        .cfi_rel_offset r0, 0
+        .cfi_rel_offset lr, 4
+
        // Assumes that n >= 0, and dst, src are valid pointers.
        // For any sizes less than 832 use the neon code that doesn't
        // care about the src alignment. This avoids any checks
@ -164,6 +168,12 @@
        eor     r3, r0, r1
        ands    r3, r3, #0x3
        bne     .L_copy_unknown_alignment
+END(MEMCPY_BASE)
+
+ENTRY_PRIVATE(MEMCPY_BASE_ALIGNED)
+        .cfi_def_cfa_offset 8
+        .cfi_rel_offset r0, 0
+        .cfi_rel_offset lr, 4

        // To try and improve performance, stack layout changed,
        // i.e., not keeping the stack looking like users expect
@ -175,7 +185,7 @@
        strd    r6, r7, [sp, #-8]!
        .cfi_adjust_cfa_offset 8
        .cfi_rel_offset r6, 0
-        .cfi_rel_offset r7, 4
+        .cfi_rel_offset r7, 0
        strd    r8, r9, [sp, #-8]!
        .cfi_adjust_cfa_offset 8
        .cfi_rel_offset r8, 0
@ -281,28 +291,10 @@

        // Restore registers: optimized pop {r0, pc}
        ldrd    r8, r9, [sp], #8
-        .cfi_adjust_cfa_offset -8
-        .cfi_restore r8
-        .cfi_restore r9
        ldrd    r6, r7, [sp], #8
-        .cfi_adjust_cfa_offset -8
-        .cfi_restore r6
-        .cfi_restore r7
        ldrd    r4, r5, [sp], #8
-        .cfi_adjust_cfa_offset -8
-        .cfi_restore r4
-        .cfi_restore r5
        pop     {r0, pc}

-        // Put the cfi directives back for the below instructions.
-        .cfi_adjust_cfa_offset 24
-        .cfi_rel_offset r4, 0
-        .cfi_rel_offset r5, 4
-        .cfi_rel_offset r6, 8
-        .cfi_rel_offset r7, 12
-        .cfi_rel_offset r8, 16
-        .cfi_rel_offset r9, 20
-
 .L_dst_not_word_aligned:
        // Align dst to word.
        rsb     ip, ip, #4
@ -323,12 +315,4 @@

        // Src is guaranteed to be at least word aligned by this point.
        b       .L_word_aligned
-
-        // Undo any cfi directives from above.
-        .cfi_adjust_cfa_offset -24
-        .cfi_restore r4
-        .cfi_restore r5
-        .cfi_restore r6
-        .cfi_restore r7
-        .cfi_restore r8
-        .cfi_restore r9
+END(MEMCPY_BASE_ALIGNED)
--- a/libc/arch-arm/cortex-a15/bionic/memcpy_common.S
+++ b/libc/arch-arm/cortex-a15/bionic/memcpy_common.S
@ -1,103 +0,0 @@
-/*
- * Copyright (C) 2008 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-/*
- * Copyright (c) 2013 ARM Ltd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of the company may not be used to endorse or promote
- *    products derived from this software without specific prior written
- *    permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <private/libc_events.h>
-
-        .text
-        .syntax unified
-        .fpu    neon
-
-ENTRY(__memcpy_chk)
-        cmp     r2, r3
-        bhi     .L_memcpy_chk_fail
-
-        // Fall through to memcpy...
-END(__memcpy_chk)
-
-// Prototype: void *memcpy (void *dst, const void *src, size_t count).
-ENTRY(memcpy)
-        pld     [r1, #64]
-        push    {r0, lr}
-        .cfi_def_cfa_offset 8
-        .cfi_rel_offset r0, 0
-        .cfi_rel_offset lr, 4
-
-#include MEMCPY_BASE
-
-        // Undo the cfi instructions from above.
-        .cfi_def_cfa_offset 0
-        .cfi_restore r0
-        .cfi_restore lr
-.L_memcpy_chk_fail:
-        // Preserve lr for backtrace.
-        push    {lr}
-        .cfi_adjust_cfa_offset 4
-        .cfi_rel_offset lr, 0
-
-        ldr     r0, error_message
-        ldr     r1, error_code
-1:
-        add     r0, pc
-        bl      __fortify_chk_fail
-error_code:
-        .word   BIONIC_EVENT_MEMCPY_BUFFER_OVERFLOW
-error_message:
-        .word   error_string-(1b+8)
-END(memcpy)
-
-        .data
-error_string:
-        .string "memcpy: prevented write past end of buffer"
--- a/libc/arch-arm/cortex-a15/bionic/strcat.S
+++ b/libc/arch-arm/cortex-a15/bionic/strcat.S
@ -70,7 +70,7 @@

    .macro m_scan_byte
    ldrb    r3, [r0]
-    cbz     r3, .L_strcat_r0_scan_done
+    cbz     r3, strcat_r0_scan_done
    add     r0, #1
    .endm // m_scan_byte

@ -84,10 +84,10 @@ ENTRY(strcat)
    // Quick check to see if src is empty.
    ldrb    r2, [r1]
    pld     [r1, #0]
-    cbnz    r2, .L_strcat_continue
+    cbnz    r2, strcat_continue
    bx      lr

-.L_strcat_continue:
+strcat_continue:
    // To speed up really small dst strings, unroll checking the first 4 bytes.
    m_push
    m_scan_byte
@ -96,102 +96,95 @@ ENTRY(strcat)
    m_scan_byte

    ands    r3, r0, #7
-    beq     .L_strcat_mainloop
+    beq     strcat_mainloop

    // Align to a double word (64 bits).
    rsb     r3, r3, #8
    lsls    ip, r3, #31
-    beq     .L_strcat_align_to_32
+    beq     strcat_align_to_32

    ldrb    r5, [r0]
-    cbz     r5, .L_strcat_r0_scan_done
+    cbz     r5, strcat_r0_scan_done
    add     r0, r0, #1

-.L_strcat_align_to_32:
-    bcc     .L_strcat_align_to_64
+strcat_align_to_32:
+    bcc     strcat_align_to_64

    ldrb    r2, [r0]
-    cbz     r2, .L_strcat_r0_scan_done
+    cbz     r2, strcat_r0_scan_done
    add     r0, r0, #1
    ldrb    r4, [r0]
-    cbz     r4, .L_strcat_r0_scan_done
+    cbz     r4, strcat_r0_scan_done
    add     r0, r0, #1

-.L_strcat_align_to_64:
+strcat_align_to_64:
    tst     r3, #4
-    beq     .L_strcat_mainloop
+    beq     strcat_mainloop
    ldr     r3, [r0], #4

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .L_strcat_zero_in_second_register
-    b       .L_strcat_mainloop
+    bne     strcat_zero_in_second_register
+    b       strcat_mainloop

-.L_strcat_r0_scan_done:
+strcat_r0_scan_done:
    // For short copies, hard-code checking the first 8 bytes since this
    // new code doesn't win until after about 8 bytes.
-    m_copy_byte reg=r2, cmd=cbz, label=.L_strcpy_finish
-    m_copy_byte reg=r3, cmd=cbz, label=.L_strcpy_finish
-    m_copy_byte reg=r4, cmd=cbz, label=.L_strcpy_finish
-    m_copy_byte reg=r5, cmd=cbz, label=.L_strcpy_finish
-    m_copy_byte reg=r2, cmd=cbz, label=.L_strcpy_finish
-    m_copy_byte reg=r3, cmd=cbz, label=.L_strcpy_finish
-    m_copy_byte reg=r4, cmd=cbz, label=.L_strcpy_finish
-    m_copy_byte reg=r5, cmd=cbnz, label=.L_strcpy_continue
+    m_copy_byte reg=r2, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r3, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r4, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r5, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r2, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r3, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r4, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r5, cmd=cbnz, label=strcpy_continue

-.L_strcpy_finish:
+strcpy_finish:
    m_pop

-.L_strcpy_continue:
+strcpy_continue:
    ands    r3, r0, #7
-    beq     .L_strcpy_check_src_align
+    beq     strcpy_check_src_align

    // Align to a double word (64 bits).
    rsb     r3, r3, #8
    lsls    ip, r3, #31
-    beq     .L_strcpy_align_to_32
+    beq     strcpy_align_to_32

    ldrb    r2, [r1], #1
    strb    r2, [r0], #1
-    cbz     r2, .L_strcpy_complete
+    cbz     r2, strcpy_complete

-.L_strcpy_align_to_32:
-    bcc     .L_strcpy_align_to_64
+strcpy_align_to_32:
+    bcc     strcpy_align_to_64

    ldrb    r2, [r1], #1
    strb    r2, [r0], #1
-    cbz     r2, .L_strcpy_complete
+    cbz     r2, strcpy_complete
    ldrb    r2, [r1], #1
    strb    r2, [r0], #1
-    cbz     r2, .L_strcpy_complete
+    cbz     r2, strcpy_complete

-.L_strcpy_align_to_64:
+strcpy_align_to_64:
    tst     r3, #4
-    beq     .L_strcpy_check_src_align
-    // Read one byte at a time since we don't know the src alignment
-    // and we don't want to read into a different page.
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .L_strcpy_complete
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .L_strcpy_complete
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .L_strcpy_complete
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .L_strcpy_complete
+    beq     strcpy_check_src_align
+    ldr     r2, [r1], #4

-.L_strcpy_check_src_align:
+    sub     ip, r2, #0x01010101
+    bic     ip, ip, r2
+    ands    ip, ip, #0x80808080
+    bne     strcpy_zero_in_first_register
+    str     r2, [r0], #4
+
+strcpy_check_src_align:
    // At this point dst is aligned to a double word, check if src
    // is also aligned to a double word.
    ands    r3, r1, #7
-    bne     .L_strcpy_unaligned_copy
+    bne     strcpy_unaligned_copy

    .p2align 2
-.L_strcpy_mainloop:
+strcpy_mainloop:
    ldrd    r2, r3, [r1], #8

    pld     [r1, #64]
@ -199,128 +192,128 @@ ENTRY(strcat)
    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    strd    r2, r3, [r0], #8
-    b       .L_strcpy_mainloop
+    b       strcpy_mainloop

-.L_strcpy_complete:
+strcpy_complete:
    m_pop

-.L_strcpy_zero_in_first_register:
+strcpy_zero_in_first_register:
    lsls    lr, ip, #17
-    bne     .L_strcpy_copy1byte
-    bcs     .L_strcpy_copy2bytes
+    bne     strcpy_copy1byte
+    bcs     strcpy_copy2bytes
    lsls    ip, ip, #1
-    bne     .L_strcpy_copy3bytes
+    bne     strcpy_copy3bytes

-.L_strcpy_copy4bytes:
+strcpy_copy4bytes:
    // Copy 4 bytes to the destiniation.
    str     r2, [r0]
    m_pop

-.L_strcpy_copy1byte:
+strcpy_copy1byte:
    strb    r2, [r0]
    m_pop

-.L_strcpy_copy2bytes:
+strcpy_copy2bytes:
    strh    r2, [r0]
    m_pop

-.L_strcpy_copy3bytes:
+strcpy_copy3bytes:
    strh    r2, [r0], #2
    lsr     r2, #16
    strb    r2, [r0]
    m_pop

-.L_strcpy_zero_in_second_register:
+strcpy_zero_in_second_register:
    lsls    lr, ip, #17
-    bne     .L_strcpy_copy5bytes
-    bcs     .L_strcpy_copy6bytes
+    bne     strcpy_copy5bytes
+    bcs     strcpy_copy6bytes
    lsls    ip, ip, #1
-    bne     .L_strcpy_copy7bytes
+    bne     strcpy_copy7bytes

    // Copy 8 bytes to the destination.
    strd    r2, r3, [r0]
    m_pop

-.L_strcpy_copy5bytes:
+strcpy_copy5bytes:
    str     r2, [r0], #4
    strb    r3, [r0]
    m_pop

-.L_strcpy_copy6bytes:
+strcpy_copy6bytes:
    str     r2, [r0], #4
    strh    r3, [r0]
    m_pop

-.L_strcpy_copy7bytes:
+strcpy_copy7bytes:
    str     r2, [r0], #4
    strh    r3, [r0], #2
    lsr     r3, #16
    strb    r3, [r0]
    m_pop

-.L_strcpy_unaligned_copy:
+strcpy_unaligned_copy:
    // Dst is aligned to a double word, while src is at an unknown alignment.
    // There are 7 different versions of the unaligned copy code
    // to prevent overreading the src. The mainloop of every single version
    // will store 64 bits per loop. The difference is how much of src can
    // be read without potentially crossing a page boundary.
    tbb     [pc, r3]
-.L_strcpy_unaligned_branchtable:
+strcpy_unaligned_branchtable:
    .byte 0
-    .byte ((.L_strcpy_unalign7 - .L_strcpy_unaligned_branchtable)/2)
-    .byte ((.L_strcpy_unalign6 - .L_strcpy_unaligned_branchtable)/2)
-    .byte ((.L_strcpy_unalign5 - .L_strcpy_unaligned_branchtable)/2)
-    .byte ((.L_strcpy_unalign4 - .L_strcpy_unaligned_branchtable)/2)
-    .byte ((.L_strcpy_unalign3 - .L_strcpy_unaligned_branchtable)/2)
-    .byte ((.L_strcpy_unalign2 - .L_strcpy_unaligned_branchtable)/2)
-    .byte ((.L_strcpy_unalign1 - .L_strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign7 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign6 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign5 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign4 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign3 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign2 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign1 - strcpy_unaligned_branchtable)/2)

    .p2align 2
    // Can read 7 bytes before possibly crossing a page.
-.L_strcpy_unalign7:
+strcpy_unalign7:
    ldr     r2, [r1], #4

    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    ldrb    r3, [r1]
-    cbz     r3, .L_strcpy_unalign7_copy5bytes
+    cbz     r3, strcpy_unalign7_copy5bytes
    ldrb    r4, [r1, #1]
-    cbz     r4, .L_strcpy_unalign7_copy6bytes
+    cbz     r4, strcpy_unalign7_copy6bytes
    ldrb    r5, [r1, #2]
-    cbz     r5, .L_strcpy_unalign7_copy7bytes
+    cbz     r5, strcpy_unalign7_copy7bytes

    ldr     r3, [r1], #4
    pld     [r1, #64]

    lsrs    ip, r3, #24
    strd    r2, r3, [r0], #8
-    beq     .L_strcpy_unalign_return
-    b       .L_strcpy_unalign7
+    beq     strcpy_unalign_return
+    b       strcpy_unalign7

-.L_strcpy_unalign7_copy5bytes:
+strcpy_unalign7_copy5bytes:
    str     r2, [r0], #4
    strb    r3, [r0]
-.L_strcpy_unalign_return:
+strcpy_unalign_return:
    m_pop

-.L_strcpy_unalign7_copy6bytes:
+strcpy_unalign7_copy6bytes:
    str     r2, [r0], #4
    strb    r3, [r0], #1
    strb    r4, [r0], #1
    m_pop

-.L_strcpy_unalign7_copy7bytes:
+strcpy_unalign7_copy7bytes:
    str     r2, [r0], #4
    strb    r3, [r0], #1
    strb    r4, [r0], #1
@ -329,41 +322,41 @@ ENTRY(strcat)

    .p2align 2
    // Can read 6 bytes before possibly crossing a page.
-.L_strcpy_unalign6:
+strcpy_unalign6:
    ldr     r2, [r1], #4

    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    ldrb    r4, [r1]
-    cbz     r4, .L_strcpy_unalign_copy5bytes
+    cbz     r4, strcpy_unalign_copy5bytes
    ldrb    r5, [r1, #1]
-    cbz     r5, .L_strcpy_unalign_copy6bytes
+    cbz     r5, strcpy_unalign_copy6bytes

    ldr     r3, [r1], #4
    pld     [r1, #64]

    tst     r3, #0xff0000
-    beq     .L_strcpy_copy7bytes
+    beq     strcpy_copy7bytes
    lsrs    ip, r3, #24
    strd    r2, r3, [r0], #8
-    beq     .L_strcpy_unalign_return
-    b       .L_strcpy_unalign6
+    beq     strcpy_unalign_return
+    b       strcpy_unalign6

    .p2align 2
    // Can read 5 bytes before possibly crossing a page.
-.L_strcpy_unalign5:
+strcpy_unalign5:
    ldr     r2, [r1], #4

    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    ldrb    r4, [r1]
-    cbz     r4, .L_strcpy_unalign_copy5bytes
+    cbz     r4, strcpy_unalign_copy5bytes

    ldr     r3, [r1], #4

@ -372,17 +365,17 @@ ENTRY(strcat)
    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    strd    r2, r3, [r0], #8
-    b       .L_strcpy_unalign5
+    b       strcpy_unalign5

-.L_strcpy_unalign_copy5bytes:
+strcpy_unalign_copy5bytes:
    str     r2, [r0], #4
    strb    r4, [r0]
    m_pop

-.L_strcpy_unalign_copy6bytes:
+strcpy_unalign_copy6bytes:
    str     r2, [r0], #4
    strb    r4, [r0], #1
    strb    r5, [r0]
@ -390,13 +383,13 @@ ENTRY(strcat)

    .p2align 2
    // Can read 4 bytes before possibly crossing a page.
-.L_strcpy_unalign4:
+strcpy_unalign4:
    ldr     r2, [r1], #4

    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    ldr     r3, [r1], #4
    pld     [r1, #64]
@ -404,20 +397,20 @@ ENTRY(strcat)
    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    strd    r2, r3, [r0], #8
-    b       .L_strcpy_unalign4
+    b       strcpy_unalign4

    .p2align 2
    // Can read 3 bytes before possibly crossing a page.
-.L_strcpy_unalign3:
+strcpy_unalign3:
    ldrb    r2, [r1]
-    cbz     r2, .L_strcpy_unalign3_copy1byte
+    cbz     r2, strcpy_unalign3_copy1byte
    ldrb    r3, [r1, #1]
-    cbz     r3, .L_strcpy_unalign3_copy2bytes
+    cbz     r3, strcpy_unalign3_copy2bytes
    ldrb    r4, [r1, #2]
-    cbz     r4, .L_strcpy_unalign3_copy3bytes
+    cbz     r4, strcpy_unalign3_copy3bytes

    ldr     r2, [r1], #4
    ldr     r3, [r1], #4
@ -425,26 +418,26 @@ ENTRY(strcat)
    pld     [r1, #64]

    lsrs    lr, r2, #24
-    beq     .L_strcpy_copy4bytes
+    beq     strcpy_copy4bytes

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    strd    r2, r3, [r0], #8
-    b       .L_strcpy_unalign3
+    b       strcpy_unalign3

-.L_strcpy_unalign3_copy1byte:
+strcpy_unalign3_copy1byte:
    strb    r2, [r0]
    m_pop

-.L_strcpy_unalign3_copy2bytes:
+strcpy_unalign3_copy2bytes:
    strb    r2, [r0], #1
    strb    r3, [r0]
    m_pop

-.L_strcpy_unalign3_copy3bytes:
+strcpy_unalign3_copy3bytes:
    strb    r2, [r0], #1
    strb    r3, [r0], #1
    strb    r4, [r0]
@ -452,34 +445,34 @@ ENTRY(strcat)

    .p2align 2
    // Can read 2 bytes before possibly crossing a page.
-.L_strcpy_unalign2:
+strcpy_unalign2:
    ldrb    r2, [r1]
-    cbz     r2, .L_strcpy_unalign_copy1byte
+    cbz     r2, strcpy_unalign_copy1byte
    ldrb    r4, [r1, #1]
-    cbz     r4, .L_strcpy_unalign_copy2bytes
+    cbz     r4, strcpy_unalign_copy2bytes

    ldr     r2, [r1], #4
    ldr     r3, [r1], #4
    pld     [r1, #64]

    tst     r2, #0xff0000
-    beq     .L_strcpy_copy3bytes
+    beq     strcpy_copy3bytes
    lsrs    ip, r2, #24
-    beq     .L_strcpy_copy4bytes
+    beq     strcpy_copy4bytes

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    strd    r2, r3, [r0], #8
-    b       .L_strcpy_unalign2
+    b       strcpy_unalign2

    .p2align 2
    // Can read 1 byte before possibly crossing a page.
-.L_strcpy_unalign1:
+strcpy_unalign1:
    ldrb    r2, [r1]
-    cbz     r2, .L_strcpy_unalign_copy1byte
+    cbz     r2, strcpy_unalign_copy1byte

    ldr     r2, [r1], #4
    ldr     r3, [r1], #4
@ -489,27 +482,27 @@ ENTRY(strcat)
    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .L_strcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    strd    r2, r3, [r0], #8
-    b       .L_strcpy_unalign1
+    b       strcpy_unalign1

-.L_strcpy_unalign_copy1byte:
+strcpy_unalign_copy1byte:
    strb    r2, [r0]
    m_pop

-.L_strcpy_unalign_copy2bytes:
+strcpy_unalign_copy2bytes:
    strb    r2, [r0], #1
    strb    r4, [r0]
    m_pop

    .p2align 2
-.L_strcat_mainloop:
+strcat_mainloop:
    ldrd    r2, r3, [r0], #8

    pld     [r0, #64]
@ -517,59 +510,59 @@ ENTRY(strcat)
    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .L_strcat_zero_in_first_register
+    bne     strcat_zero_in_first_register

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .L_strcat_zero_in_second_register
-    b       .L_strcat_mainloop
+    bne     strcat_zero_in_second_register
+    b       strcat_mainloop

-.L_strcat_zero_in_first_register:
+strcat_zero_in_first_register:
    // Prefetch the src now, it's going to be used soon.
    pld     [r1, #0]
    lsls    lr, ip, #17
-    bne     .L_strcat_sub8
-    bcs     .L_strcat_sub7
+    bne     strcat_sub8
+    bcs     strcat_sub7
    lsls    ip, ip, #1
-    bne     .L_strcat_sub6
+    bne     strcat_sub6

    sub     r0, r0, #5
-    b       .L_strcat_r0_scan_done
+    b       strcat_r0_scan_done

-.L_strcat_sub8:
+strcat_sub8:
    sub     r0, r0, #8
-    b       .L_strcat_r0_scan_done
+    b       strcat_r0_scan_done

-.L_strcat_sub7:
+strcat_sub7:
    sub     r0, r0, #7
-    b       .L_strcat_r0_scan_done
+    b       strcat_r0_scan_done

-.L_strcat_sub6:
+strcat_sub6:
    sub     r0, r0, #6
-    b       .L_strcat_r0_scan_done
+    b       strcat_r0_scan_done

-.L_strcat_zero_in_second_register:
+strcat_zero_in_second_register:
    // Prefetch the src now, it's going to be used soon.
    pld     [r1, #0]
    lsls    lr, ip, #17
-    bne     .L_strcat_sub4
-    bcs     .L_strcat_sub3
+    bne     strcat_sub4
+    bcs     strcat_sub3
    lsls    ip, ip, #1
-    bne     .L_strcat_sub2
+    bne     strcat_sub2

    sub     r0, r0, #1
-    b       .L_strcat_r0_scan_done
+    b       strcat_r0_scan_done

-.L_strcat_sub4:
+strcat_sub4:
    sub     r0, r0, #4
-    b       .L_strcat_r0_scan_done
+    b       strcat_r0_scan_done

-.L_strcat_sub3:
+strcat_sub3:
    sub     r0, r0, #3
-    b       .L_strcat_r0_scan_done
+    b       strcat_r0_scan_done

-.L_strcat_sub2:
+strcat_sub2:
    sub     r0, r0, #2
-    b       .L_strcat_r0_scan_done
+    b       strcat_r0_scan_done
 END(strcat)
--- a/libc/arch-arm/cortex-a15/bionic/string_copy.S
+++ b/libc/arch-arm/cortex-a15/bionic/string_copy.S
@ -149,20 +149,13 @@ ENTRY(strcpy)
 .Lstringcopy_align_to_64:
    tst     r3, #4
    beq     .Lstringcopy_check_src_align
-    // Read one byte at a time since we don't have any idea about the alignment
-    // of the source and we don't want to read into a different page.
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .Lstringcopy_complete
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .Lstringcopy_complete
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .Lstringcopy_complete
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .Lstringcopy_complete
+    ldr     r2, [r1], #4
+
+    sub     ip, r2, #0x01010101
+    bic     ip, ip, r2
+    ands    ip, ip, #0x80808080
+    bne     .Lstringcopy_zero_in_first_register
+    str     r2, [r0], #4

 .Lstringcopy_check_src_align:
    // At this point dst is aligned to a double word, check if src
--- a/libc/arch-arm/cortex-a15/bionic/strlen.S
+++ b/libc/arch-arm/cortex-a15/bionic/strlen.S
@ -65,38 +65,38 @@ ENTRY(strlen)
    mov     r1, r0

    ands    r3, r0, #7
-    beq     .L_mainloop
+    beq     mainloop

    // Align to a double word (64 bits).
    rsb     r3, r3, #8
    lsls    ip, r3, #31
-    beq     .L_align_to_32
+    beq     align_to_32

    ldrb    r2, [r1], #1
-    cbz     r2, .L_update_count_and_return
+    cbz     r2, update_count_and_return

-.L_align_to_32:
-    bcc     .L_align_to_64
+align_to_32:
+    bcc     align_to_64
    ands    ip, r3, #2
-    beq     .L_align_to_64
+    beq     align_to_64

    ldrb    r2, [r1], #1
-    cbz     r2, .L_update_count_and_return
+    cbz     r2, update_count_and_return
    ldrb    r2, [r1], #1
-    cbz     r2, .L_update_count_and_return
+    cbz     r2, update_count_and_return

-.L_align_to_64:
+align_to_64:
    tst     r3, #4
-    beq     .L_mainloop
+    beq     mainloop
    ldr     r3, [r1], #4

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .L_zero_in_second_register
+    bne     zero_in_second_register

    .p2align 2
-.L_mainloop:
+mainloop:
    ldrd    r2, r3, [r1], #8

    pld     [r1, #64]
@ -104,62 +104,62 @@ ENTRY(strlen)
    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .L_zero_in_first_register
+    bne     zero_in_first_register

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .L_zero_in_second_register
-    b       .L_mainloop
+    bne     zero_in_second_register
+    b       mainloop

-.L_update_count_and_return:
+update_count_and_return:
    sub     r0, r1, r0
    sub     r0, r0, #1
    bx      lr

-.L_zero_in_first_register:
+zero_in_first_register:
    sub     r0, r1, r0
    lsls    r3, ip, #17
-    bne     .L_sub8_and_return
-    bcs     .L_sub7_and_return
+    bne     sub8_and_return
+    bcs     sub7_and_return
    lsls    ip, ip, #1
-    bne     .L_sub6_and_return
+    bne     sub6_and_return

    sub     r0, r0, #5
    bx      lr

-.L_sub8_and_return:
+sub8_and_return:
    sub     r0, r0, #8
    bx      lr

-.L_sub7_and_return:
+sub7_and_return:
    sub     r0, r0, #7
    bx      lr

-.L_sub6_and_return:
+sub6_and_return:
    sub     r0, r0, #6
    bx      lr

-.L_zero_in_second_register:
+zero_in_second_register:
    sub     r0, r1, r0
    lsls    r3, ip, #17
-    bne     .L_sub4_and_return
-    bcs     .L_sub3_and_return
+    bne     sub4_and_return
+    bcs     sub3_and_return
    lsls    ip, ip, #1
-    bne     .L_sub2_and_return
+    bne     sub2_and_return

    sub     r0, r0, #1
    bx      lr

-.L_sub4_and_return:
+sub4_and_return:
    sub     r0, r0, #4
    bx      lr

-.L_sub3_and_return:
+sub3_and_return:
    sub     r0, r0, #3
    bx      lr

-.L_sub2_and_return:
+sub2_and_return:
    sub     r0, r0, #2
    bx      lr
 END(strlen)
--- a/libc/arch-arm/cortex-a15/cortex-a15.mk
+++ b/libc/arch-arm/cortex-a15/cortex-a15.mk
@ -1,17 +1,3 @@
-libc_openbsd_src_files_exclude_arm += \
-    upstream-openbsd/lib/libc/string/memmove.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/strcat.c \
-
-libc_bionic_src_files_exclude_arm += \
-    arch-arm/generic/bionic/memcpy.S \
-    arch-arm/generic/bionic/memset.S \
-    arch-arm/generic/bionic/strcmp.S \
-    arch-arm/generic/bionic/strcpy.S \
-    arch-arm/generic/bionic/strlen.c \
-    bionic/__strcat_chk.cpp \
-    bionic/__strcpy_chk.cpp \
-
 libc_bionic_src_files_arm += \
    arch-arm/cortex-a15/bionic/memcpy.S \
    arch-arm/cortex-a15/bionic/memset.S \
@ -23,5 +9,8 @@ libc_bionic_src_files_arm += \
    arch-arm/cortex-a15/bionic/__strcpy_chk.S \
    arch-arm/cortex-a15/bionic/strlen.S \

+libc_bionic_src_files_arm += \
+    arch-arm/generic/bionic/memcmp.S \
+
 libc_bionic_src_files_arm += \
    arch-arm/denver/bionic/memmove.S \
--- a/libc/arch-arm/cortex-a53.a57/cortex-a53.a57.mk
+++ b/libc/arch-arm/cortex-a53.a57/cortex-a53.a57.mk
@ -1,32 +0,0 @@
-# This file represents the best optimized routines that are the middle
-# ground when running on a big/little system that is cortex-a57/cortex-a53.
-# The cortex-a7 optimized routines, and the cortex-a53 optimized routines
-# decrease performance on cortex-a57 processors by as much as 20%.
-
-libc_openbsd_src_files_exclude_arm += \
-    upstream-openbsd/lib/libc/string/memmove.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/strcat.c \
-
-libc_bionic_src_files_exclude_arm += \
-    arch-arm/generic/bionic/memcpy.S \
-    arch-arm/generic/bionic/memset.S \
-    arch-arm/generic/bionic/strcmp.S \
-    arch-arm/generic/bionic/strcpy.S \
-    arch-arm/generic/bionic/strlen.c \
-    bionic/__strcat_chk.cpp \
-    bionic/__strcpy_chk.cpp \
-
-libc_bionic_src_files_arm += \
-    arch-arm/cortex-a15/bionic/memcpy.S \
-    arch-arm/cortex-a15/bionic/memset.S \
-    arch-arm/cortex-a15/bionic/stpcpy.S \
-    arch-arm/cortex-a15/bionic/strcat.S \
-    arch-arm/cortex-a15/bionic/__strcat_chk.S \
-    arch-arm/cortex-a15/bionic/strcmp.S \
-    arch-arm/cortex-a15/bionic/strcpy.S \
-    arch-arm/cortex-a15/bionic/__strcpy_chk.S \
-    arch-arm/cortex-a15/bionic/strlen.S \
-
-libc_bionic_src_files_arm += \
-    arch-arm/denver/bionic/memmove.S \
--- a/libc/arch-arm/cortex-a53/bionic/__strcat_chk.S
+++ b/libc/arch-arm/cortex-a53/bionic/__strcat_chk.S
@ -1,32 +0,0 @@
-/*
- * Copyright (C) 2015 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-// Indicate which memcpy base file to include.
-#define MEMCPY_BASE "arch-arm/cortex-a53/bionic/memcpy_base.S"
-
-#include "arch-arm/cortex-a15/bionic/__strcat_chk_common.S"
--- a/libc/arch-arm/cortex-a53/bionic/memcpy_base.S
+++ b/libc/arch-arm/cortex-a53/bionic/memcpy_base.S
@ -1,143 +0,0 @@
-/*
- * Copyright (C) 2008 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-/*
- * Copyright (c) 2013 ARM Ltd
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of the company may not be used to endorse or promote
- *    products derived from this software without specific prior written
- *    permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-.L_memcpy_base:
-        // Assumes that n >= 0, and dst, src are valid pointers.
-        cmp     r2, #16
-        blo     .L_copy_less_than_16_unknown_align
-
-.L_copy_unknown_alignment:
-        // Unknown alignment of src and dst.
-        // Assumes that the first few bytes have already been prefetched.
-
-        // Align destination to 128 bits. The mainloop store instructions
-        // require this alignment or they will throw an exception.
-        rsb         r3, r0, #0
-        ands        r3, r3, #0xF
-        beq         2f
-
-        // Copy up to 15 bytes (count in r3).
-        sub         r2, r2, r3
-        movs        ip, r3, lsl #31
-
-        itt         mi
-        ldrbmi      lr, [r1], #1
-        strbmi      lr, [r0], #1
-        itttt       cs
-        ldrbcs      ip, [r1], #1
-        ldrbcs      lr, [r1], #1
-        strbcs      ip, [r0], #1
-        strbcs      lr, [r0], #1
-
-        movs        ip, r3, lsl #29
-        bge         1f
-        // Copies 4 bytes, dst 32 bits aligned before, at least 64 bits after.
-        vld4.8      {d0[0], d1[0], d2[0], d3[0]}, [r1]!
-        vst4.8      {d0[0], d1[0], d2[0], d3[0]}, [r0, :32]!
-1:      bcc         2f
-        // Copies 8 bytes, dst 64 bits aligned before, at least 128 bits after.
-        vld1.8      {d0}, [r1]!
-        vst1.8      {d0}, [r0, :64]!
-
-2:      // Make sure we have at least 64 bytes to copy.
-        subs        r2, r2, #64
-        blo         2f
-
-1:      // The main loop copies 64 bytes at a time.
-        vld1.8      {d0  - d3},   [r1]!
-        vld1.8      {d4  - d7},   [r1]!
-        subs        r2, r2, #64
-        vstmia      r0!, {d0 - d7}
-        pld         [r1, #(64*10)]
-        bhs         1b
-
-2:      // Fix-up the remaining count and make sure we have >= 32 bytes left.
-        adds        r2, r2, #32
-        blo         3f
-
-        // 32 bytes. These cache lines were already preloaded.
-        vld1.8      {d0 - d3},  [r1]!
-        sub         r2, r2, #32
-        vst1.8      {d0 - d3},  [r0, :128]!
-3:      // Less than 32 left.
-        add         r2, r2, #32
-        tst         r2, #0x10
-        beq         .L_copy_less_than_16_unknown_align
-        // Copies 16 bytes, destination 128 bits aligned.
-        vld1.8      {d0, d1}, [r1]!
-        vst1.8      {d0, d1}, [r0, :128]!
-
-.L_copy_less_than_16_unknown_align:
-        // Copy up to 15 bytes (count in r2).
-        movs        ip, r2, lsl #29
-        bcc         1f
-        vld1.8      {d0}, [r1]!
-        vst1.8      {d0}, [r0]!
-1:      bge         2f
-        vld4.8      {d0[0], d1[0], d2[0], d3[0]}, [r1]!
-        vst4.8      {d0[0], d1[0], d2[0], d3[0]}, [r0]!
-
-2:      // Copy 0 to 4 bytes.
-        lsls        r2, r2, #31
-        itt         ne
-        ldrbne      lr, [r1], #1
-        strbne      lr, [r0], #1
-        itttt       cs
-        ldrbcs      ip, [r1], #1
-        ldrbcs      lr, [r1]
-        strbcs      ip, [r0], #1
-        strbcs      lr, [r0]
-
-        pop         {r0, pc}
--- a/libc/arch-arm/cortex-a53/cortex-a53.mk
+++ b/libc/arch-arm/cortex-a53/cortex-a53.mk
@ -1,31 +1 @@
-libc_openbsd_src_files_exclude_arm += \
-    upstream-openbsd/lib/libc/string/memmove.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/strcat.c \
-
-libc_bionic_src_files_exclude_arm += \
-    arch-arm/generic/bionic/memcpy.S \
-    arch-arm/generic/bionic/memset.S \
-    arch-arm/generic/bionic/strcmp.S \
-    arch-arm/generic/bionic/strcpy.S \
-    arch-arm/generic/bionic/strlen.c \
-    bionic/__strcat_chk.cpp \
-    bionic/__strcpy_chk.cpp \
-
-libc_bionic_src_files_arm += \
-    arch-arm/cortex-a53/bionic/memcpy.S \
-    arch-arm/cortex-a53/bionic/__strcat_chk.S \
-    arch-arm/cortex-a53/bionic/__strcpy_chk.S \
-
-libc_bionic_src_files_arm += \
-    arch-arm/cortex-a7/bionic/memset.S \
-
-libc_bionic_src_files_arm += \
-    arch-arm/cortex-a15/bionic/stpcpy.S \
-    arch-arm/cortex-a15/bionic/strcat.S \
-    arch-arm/cortex-a15/bionic/strcmp.S \
-    arch-arm/cortex-a15/bionic/strcpy.S \
-    arch-arm/cortex-a15/bionic/strlen.S \
-
-libc_bionic_src_files_arm += \
-    arch-arm/denver/bionic/memmove.S \
+include bionic/libc/arch-arm/cortex-a7/cortex-a7.mk
--- a/libc/arch-arm/cortex-a7/bionic/memset.S
+++ b/libc/arch-arm/cortex-a7/bionic/memset.S
@ -1,180 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *  * Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- *  * Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <machine/cpu-features.h>
-#include <private/bionic_asm.h>
-#include <private/libc_events.h>
-
-        /*
-         * Optimized memset() for ARM.
-         *
-         * memset() returns its first argument.
-         */
-
-        .fpu        neon
-        .syntax     unified
-
-ENTRY(__memset_chk)
-        cmp         r2, r3
-        bls         .L_done
-
-        // Preserve lr for backtrace.
-        push        {lr}
-        .cfi_def_cfa_offset 4
-        .cfi_rel_offset lr, 0
-
-        ldr         r0, error_message
-        ldr         r1, error_code
-1:
-        add         r0, pc
-        bl          __fortify_chk_fail
-error_code:
-        .word       BIONIC_EVENT_MEMSET_BUFFER_OVERFLOW
-error_message:
-        .word       error_string-(1b+8)
-END(__memset_chk)
-
-ENTRY(bzero)
-        mov         r2, r1
-        mov         r1, #0
-.L_done:
-        // Fall through to memset...
-END(bzero)
-
-ENTRY(memset)
-        mov         r3, r0
-        // At this point only d0, d1 are going to be used below.
-        vdup.8      q0, r1
-        cmp         r2, #16
-        blo         .L_set_less_than_16_unknown_align
-
-.L_check_alignment:
-        // Align destination to a double word to avoid the store crossing
-        // a cache line boundary.
-        ands        ip, r3, #7
-        bne         .L_do_double_word_align
-
-.L_double_word_aligned:
-        // Duplicate since the less than 64 can use d2, d3.
-        vmov        q1, q0
-        subs        r2, #64
-        blo         .L_set_less_than_64
-
-        // Duplicate the copy value so that we can store 64 bytes at a time.
-        vmov        q2, q0
-        vmov        q3, q0
-
-1:      // Main loop stores 64 bytes at a time.
-        subs        r2, #64
-        vstmia      r3!, {d0 - d7}
-        bge         1b
-
-.L_set_less_than_64:
-        // Restore r2 to the count of bytes left to set.
-        add         r2, #64
-        lsls        ip, r2, #27
-        bcc         .L_set_less_than_32
-        // Set 32 bytes.
-        vstmia      r3!, {d0 - d3}
-
-.L_set_less_than_32:
-        bpl         .L_set_less_than_16
-        // Set 16 bytes.
-        vstmia      r3!, {d0, d1}
-
-.L_set_less_than_16:
-        // Less than 16 bytes to set.
-        lsls        ip, r2, #29
-        bcc         .L_set_less_than_8
-
-        // Set 8 bytes.
-        vstmia      r3!, {d0}
-
-.L_set_less_than_8:
-        bpl         .L_set_less_than_4
-        // Set 4 bytes
-        vst1.32     {d0[0]}, [r3]!
-
-.L_set_less_than_4:
-        lsls        ip, r2, #31
-        it          ne
-        strbne      r1, [r3], #1
-        itt         cs
-        strbcs      r1, [r3], #1
-        strbcs      r1, [r3]
-        bx          lr
-
-.L_do_double_word_align:
-        rsb         ip, ip, #8
-        sub         r2, r2, ip
-
-        // Do this comparison now, otherwise we'll need to save a
-        // register to the stack since we've used all available
-        // registers.
-        cmp         ip, #4
-        blo         1f
-
-        // Need to do a four byte copy.
-        movs        ip, ip, lsl #31
-        it          mi
-        strbmi      r1, [r3], #1
-        itt         cs
-        strbcs      r1, [r3], #1
-        strbcs      r1, [r3], #1
-        vst1.32     {d0[0]}, [r3]!
-        b           .L_double_word_aligned
-
-1:
-        // No four byte copy.
-        movs        ip, ip, lsl #31
-        it          mi
-        strbmi      r1, [r3], #1
-        itt         cs
-        strbcs      r1, [r3], #1
-        strbcs      r1, [r3], #1
-        b           .L_double_word_aligned
-
-.L_set_less_than_16_unknown_align:
-        // Set up to 15 bytes.
-        movs        ip, r2, lsl #29
-        bcc         1f
-        vst1.8      {d0}, [r3]!
-1:      bge         2f
-        vst1.32     {d0[0]}, [r3]!
-2:      movs        ip, r2, lsl #31
-        it          mi
-        strbmi      r1, [r3], #1
-        itt         cs
-        strbcs      r1, [r3], #1
-        strbcs      r1, [r3], #1
-        bx          lr
-END(memset)
-
-        .data
-error_string:
-        .string     "memset: prevented write past end of buffer"
--- a/libc/arch-arm/cortex-a7/cortex-a7.mk
+++ b/libc/arch-arm/cortex-a7/cortex-a7.mk
@ -1,29 +1 @@
-libc_openbsd_src_files_exclude_arm += \
-    upstream-openbsd/lib/libc/string/memmove.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/strcat.c \
-
-libc_bionic_src_files_exclude_arm += \
-    arch-arm/generic/bionic/memcpy.S \
-    arch-arm/generic/bionic/memset.S \
-    arch-arm/generic/bionic/strcmp.S \
-    arch-arm/generic/bionic/strcpy.S \
-    arch-arm/generic/bionic/strlen.c \
-    bionic/__strcat_chk.cpp \
-    bionic/__strcpy_chk.cpp \
-
-libc_bionic_src_files_arm += \
-    arch-arm/cortex-a7/bionic/memset.S \
-
-libc_bionic_src_files_arm += \
-    arch-arm/cortex-a15/bionic/memcpy.S \
-    arch-arm/cortex-a15/bionic/stpcpy.S \
-    arch-arm/cortex-a15/bionic/strcat.S \
-    arch-arm/cortex-a15/bionic/__strcat_chk.S \
-    arch-arm/cortex-a15/bionic/strcmp.S \
-    arch-arm/cortex-a15/bionic/strcpy.S \
-    arch-arm/cortex-a15/bionic/__strcpy_chk.S \
-    arch-arm/cortex-a15/bionic/strlen.S \
-
-libc_bionic_src_files_arm += \
-    arch-arm/denver/bionic/memmove.S \
+include bionic/libc/arch-arm/cortex-a15/cortex-a15.mk
--- a/libc/arch-arm/cortex-a9/bionic/memcpy_base.S
+++ b/libc/arch-arm/cortex-a9/bionic/memcpy_base.S
@ -44,7 +44,7 @@ ENTRY_PRIVATE(MEMCPY_BASE)
        /* check if buffers are aligned. If so, run arm-only version */
        eor         r3, r0, r1
        ands        r3, r3, #0x3
-        beq         MEMCPY_BASE_ALIGNED
+        beq         __memcpy_base_aligned

        /* Check the upper size limit for Neon unaligned memory access in memcpy */
        cmp         r2, #224
@ -133,7 +133,8 @@ ENTRY_PRIVATE(MEMCPY_BASE)
        strbcs      ip, [r0], #1
        strbcs      lr, [r0], #1

-        ldmfd       sp!, {r0, pc}
+        ldmfd       sp!, {r0, lr}
+        bx          lr
 END(MEMCPY_BASE)

 ENTRY_PRIVATE(MEMCPY_BASE_ALIGNED)
--- a/libc/arch-arm/cortex-a9/bionic/memset.S
+++ b/libc/arch-arm/cortex-a9/bionic/memset.S
@ -69,9 +69,12 @@ END(bzero)
 ENTRY(memset)
        // The neon memset only wins for less than 132.
        cmp         r2, #132
-        bhi         .L_memset_large_copy
+        bhi         __memset_large_copy
+
+        stmfd       sp!, {r0}
+        .cfi_def_cfa_offset 4
+        .cfi_rel_offset r0, 0

-        mov         r3, r0
        vdup.8      q0, r1

        /* make sure we have at least 32 bytes to write */
@ -81,7 +84,7 @@ ENTRY(memset)

 1:      /* The main loop writes 32 bytes at a time */
        subs        r2, r2, #32
-        vst1.8      {d0 - d3}, [r3]!
+        vst1.8      {d0 - d3}, [r0]!
        bhs         1b

 2:      /* less than 32 left */
@ -90,20 +93,22 @@ ENTRY(memset)
        beq         3f

        // writes 16 bytes, 128-bits aligned
-        vst1.8      {d0, d1}, [r3]!
+        vst1.8      {d0, d1}, [r0]!
 3:      /* write up to 15-bytes (count in r2) */
        movs        ip, r2, lsl #29
        bcc         1f
-        vst1.8      {d0}, [r3]!
+        vst1.8      {d0}, [r0]!
 1:      bge         2f
-        vst1.32     {d0[0]}, [r3]!
+        vst1.32     {d0[0]}, [r0]!
 2:      movs        ip, r2, lsl #31
-        strbmi      r1, [r3], #1
-        strbcs      r1, [r3], #1
-        strbcs      r1, [r3], #1
+        strbmi      r1, [r0], #1
+        strbcs      r1, [r0], #1
+        strbcs      r1, [r0], #1
+        ldmfd       sp!, {r0}
        bx          lr
+END(memset)

-.L_memset_large_copy:
+ENTRY_PRIVATE(__memset_large_copy)
        /* compute the offset to align the destination
         * offset = (4-(src&3))&3 = -src & 3
         */
@ -131,7 +136,8 @@ ENTRY(memset)
        strbcs      r1, [r0], #1
        strbmi      r1, [r0], #1
        subs        r2, r2, r3
-        popls       {r0, r4-r7, pc}   /* return */
+        popls       {r0, r4-r7, lr}   /* return */
+        bxls        lr

        /* align the destination to a cache-line */
        mov         r12, r1
@ -174,8 +180,9 @@ ENTRY(memset)
        strhmi      r1, [r0], #2
        movs        r2, r2, lsl #2
        strbcs      r1, [r0]
-        ldmfd       sp!, {r0, r4-r7, pc}
-END(memset)
+        ldmfd       sp!, {r0, r4-r7, lr}
+        bx          lr
+END(__memset_large_copy)

        .data
 error_string:
--- a/libc/arch-arm/cortex-a9/bionic/strcat.S
+++ b/libc/arch-arm/cortex-a9/bionic/strcat.S
@ -70,7 +70,7 @@

    .macro m_scan_byte
    ldrb    r3, [r0]
-    cbz     r3, .Lstrcat_r0_scan_done
+    cbz     r3, strcat_r0_scan_done
    add     r0, #1
    .endm // m_scan_byte

@ -84,10 +84,10 @@ ENTRY(strcat)
    // Quick check to see if src is empty.
    ldrb        r2, [r1]
    pld         [r1, #0]
-    cbnz        r2, .Lstrcat_continue
+    cbnz        r2, strcat_continue
    bx          lr

-.Lstrcat_continue:
+strcat_continue:
    // To speed up really small dst strings, unroll checking the first 4 bytes.
    m_push
    m_scan_byte
@ -96,10 +96,10 @@ ENTRY(strcat)
    m_scan_byte

    ands    r3, r0, #7
-    bne     .Lstrcat_align_src
+    bne     strcat_align_src

    .p2align 2
-.Lstrcat_mainloop:
+strcat_mainloop:
    ldmia   r0!, {r2, r3}

    pld     [r0, #64]
@ -107,28 +107,28 @@ ENTRY(strcat)
    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .Lstrcat_zero_in_first_register
+    bne     strcat_zero_in_first_register

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .Lstrcat_zero_in_second_register
-    b       .Lstrcat_mainloop
+    bne     strcat_zero_in_second_register
+    b       strcat_mainloop

-.Lstrcat_zero_in_first_register:
+strcat_zero_in_first_register:
    sub     r0, r0, #4

-.Lstrcat_zero_in_second_register:
+strcat_zero_in_second_register:
    // Check for zero in byte 0.
    tst     ip, #0x80
    it      ne
    subne   r0, r0, #4
-    bne     .Lstrcat_r0_scan_done
+    bne     strcat_r0_scan_done
    // Check for zero in byte 1.
    tst     ip, #0x8000
    it      ne
    subne   r0, r0, #3
-    bne     .Lstrcat_r0_scan_done
+    bne     strcat_r0_scan_done
    // Check for zero in byte 2.
    tst     ip, #0x800000
    it      ne
@ -137,33 +137,33 @@ ENTRY(strcat)
    // Zero is in byte 3.
    subeq   r0, r0, #1

-.Lstrcat_r0_scan_done:
+strcat_r0_scan_done:
    // Unroll the first 8 bytes that will be copied.
-    m_copy_byte reg=r2, cmd=cbz, label=.Lstrcpy_finish
-    m_copy_byte reg=r3, cmd=cbz, label=.Lstrcpy_finish
-    m_copy_byte reg=r4, cmd=cbz, label=.Lstrcpy_finish
-    m_copy_byte reg=r5, cmd=cbz, label=.Lstrcpy_finish
-    m_copy_byte reg=r2, cmd=cbz, label=.Lstrcpy_finish
-    m_copy_byte reg=r3, cmd=cbz, label=.Lstrcpy_finish
-    m_copy_byte reg=r4, cmd=cbz, label=.Lstrcpy_finish
-    m_copy_byte reg=r5, cmd=cbnz, label=.Lstrcpy_continue
+    m_copy_byte reg=r2, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r3, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r4, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r5, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r2, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r3, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r4, cmd=cbz, label=strcpy_finish
+    m_copy_byte reg=r5, cmd=cbnz, label=strcpy_continue

-.Lstrcpy_finish:
+strcpy_finish:
    m_ret   inst=pop

-.Lstrcpy_continue:
+strcpy_continue:
    pld     [r1, #0]
    ands    r3, r0, #7
-    bne     .Lstrcpy_align_dst
+    bne     strcpy_align_dst

-.Lstrcpy_check_src_align:
+strcpy_check_src_align:
    // At this point dst is aligned to a double word, check if src
    // is also aligned to a double word.
    ands    r3, r1, #7
-    bne     .Lstrcpy_unaligned_copy
+    bne     strcpy_unaligned_copy

    .p2align 2
-.Lstrcpy_mainloop:
+strcpy_mainloop:
    ldmia   r1!, {r2, r3}

    pld     [r1, #64]
@ -171,17 +171,17 @@ ENTRY(strcat)
    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    stmia   r0!, {r2, r3}
-    b       .Lstrcpy_mainloop
+    b       strcpy_mainloop

-.Lstrcpy_zero_in_first_register:
+strcpy_zero_in_first_register:
    lsls    lr, ip, #17
    itt     ne
    strbne  r2, [r0]
@ -198,7 +198,7 @@ ENTRY(strcat)
    strb    r3, [r0]
    m_ret   inst=pop

-.Lstrcpy_zero_in_second_register:
+strcpy_zero_in_second_register:
    lsls    lr, ip, #17
    ittt    ne
    stmiane r0!, {r2}
@ -218,18 +218,18 @@ ENTRY(strcat)
    strb    r4, [r0]
    m_ret   inst=pop

-.Lstrcpy_align_dst:
+strcpy_align_dst:
    // Align to a double word (64 bits).
    rsb     r3, r3, #8
    lsls    ip, r3, #31
-    beq     .Lstrcpy_align_to_32
+    beq     strcpy_align_to_32

    ldrb    r2, [r1], #1
    strb    r2, [r0], #1
-    cbz     r2, .Lstrcpy_complete
+    cbz     r2, strcpy_complete

-.Lstrcpy_align_to_32:
-    bcc     .Lstrcpy_align_to_64
+strcpy_align_to_32:
+    bcc     strcpy_align_to_64

    ldrb    r4, [r1], #1
    strb    r4, [r0], #1
@ -242,83 +242,76 @@ ENTRY(strcat)
    it      eq
    m_ret   inst=popeq

-.Lstrcpy_align_to_64:
+strcpy_align_to_64:
    tst     r3, #4
-    beq     .Lstrcpy_check_src_align
-    // Read one byte at a time since we don't know the src alignment
-    // and we don't want to read into a different page.
-    ldrb    r4, [r1], #1
-    strb    r4, [r0], #1
-    cbz     r4, .Lstrcpy_complete
-    ldrb    r5, [r1], #1
-    strb    r5, [r0], #1
-    cbz     r5, .Lstrcpy_complete
-    ldrb    r4, [r1], #1
-    strb    r4, [r0], #1
-    cbz     r4, .Lstrcpy_complete
-    ldrb    r5, [r1], #1
-    strb    r5, [r0], #1
-    cbz     r5, .Lstrcpy_complete
-    b       .Lstrcpy_check_src_align
+    beq     strcpy_check_src_align
+    ldr     r2, [r1], #4

-.Lstrcpy_complete:
+    sub     ip, r2, #0x01010101
+    bic     ip, ip, r2
+    ands    ip, ip, #0x80808080
+    bne     strcpy_zero_in_first_register
+    stmia   r0!, {r2}
+    b       strcpy_check_src_align
+
+strcpy_complete:
    m_ret   inst=pop

-.Lstrcpy_unaligned_copy:
+strcpy_unaligned_copy:
    // Dst is aligned to a double word, while src is at an unknown alignment.
    // There are 7 different versions of the unaligned copy code
    // to prevent overreading the src. The mainloop of every single version
    // will store 64 bits per loop. The difference is how much of src can
    // be read without potentially crossing a page boundary.
    tbb     [pc, r3]
-.Lstrcpy_unaligned_branchtable:
+strcpy_unaligned_branchtable:
    .byte 0
-    .byte ((.Lstrcpy_unalign7 - .Lstrcpy_unaligned_branchtable)/2)
-    .byte ((.Lstrcpy_unalign6 - .Lstrcpy_unaligned_branchtable)/2)
-    .byte ((.Lstrcpy_unalign5 - .Lstrcpy_unaligned_branchtable)/2)
-    .byte ((.Lstrcpy_unalign4 - .Lstrcpy_unaligned_branchtable)/2)
-    .byte ((.Lstrcpy_unalign3 - .Lstrcpy_unaligned_branchtable)/2)
-    .byte ((.Lstrcpy_unalign2 - .Lstrcpy_unaligned_branchtable)/2)
-    .byte ((.Lstrcpy_unalign1 - .Lstrcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign7 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign6 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign5 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign4 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign3 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign2 - strcpy_unaligned_branchtable)/2)
+    .byte ((strcpy_unalign1 - strcpy_unaligned_branchtable)/2)

    .p2align 2
    // Can read 7 bytes before possibly crossing a page.
-.Lstrcpy_unalign7:
+strcpy_unalign7:
    ldr     r2, [r1], #4

    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    ldrb    r3, [r1]
-    cbz     r3, .Lstrcpy_unalign7_copy5bytes
+    cbz     r3, strcpy_unalign7_copy5bytes
    ldrb    r4, [r1, #1]
-    cbz     r4, .Lstrcpy_unalign7_copy6bytes
+    cbz     r4, strcpy_unalign7_copy6bytes
    ldrb    r5, [r1, #2]
-    cbz     r5, .Lstrcpy_unalign7_copy7bytes
+    cbz     r5, strcpy_unalign7_copy7bytes

    ldr     r3, [r1], #4
    pld     [r1, #64]

    lsrs    ip, r3, #24
    stmia   r0!, {r2, r3}
-    beq     .Lstrcpy_unalign_return
-    b       .Lstrcpy_unalign7
+    beq     strcpy_unalign_return
+    b       strcpy_unalign7

-.Lstrcpy_unalign7_copy5bytes:
+strcpy_unalign7_copy5bytes:
    stmia   r0!, {r2}
    strb    r3, [r0]
-.Lstrcpy_unalign_return:
+strcpy_unalign_return:
    m_ret   inst=pop

-.Lstrcpy_unalign7_copy6bytes:
+strcpy_unalign7_copy6bytes:
    stmia   r0!, {r2}
    strb    r3, [r0], #1
    strb    r4, [r0], #1
    m_ret   inst=pop

-.Lstrcpy_unalign7_copy7bytes:
+strcpy_unalign7_copy7bytes:
    stmia   r0!, {r2}
    strb    r3, [r0], #1
    strb    r4, [r0], #1
@ -327,30 +320,30 @@ ENTRY(strcat)

    .p2align 2
    // Can read 6 bytes before possibly crossing a page.
-.Lstrcpy_unalign6:
+strcpy_unalign6:
    ldr     r2, [r1], #4

    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    ldrb    r4, [r1]
-    cbz     r4, .Lstrcpy_unalign_copy5bytes
+    cbz     r4, strcpy_unalign_copy5bytes
    ldrb    r5, [r1, #1]
-    cbz     r5, .Lstrcpy_unalign_copy6bytes
+    cbz     r5, strcpy_unalign_copy6bytes

    ldr     r3, [r1], #4
    pld     [r1, #64]

    tst     r3, #0xff0000
-    beq     .Lstrcpy_unalign6_copy7bytes
+    beq     strcpy_unalign6_copy7bytes
    lsrs    ip, r3, #24
    stmia   r0!, {r2, r3}
-    beq     .Lstrcpy_unalign_return
-    b       .Lstrcpy_unalign6
+    beq     strcpy_unalign_return
+    b       strcpy_unalign6

-.Lstrcpy_unalign6_copy7bytes:
+strcpy_unalign6_copy7bytes:
    stmia   r0!, {r2}
    strh    r3, [r0], #2
    lsr     r3, #16
@ -359,16 +352,16 @@ ENTRY(strcat)

    .p2align 2
    // Can read 5 bytes before possibly crossing a page.
-.Lstrcpy_unalign5:
+strcpy_unalign5:
    ldr     r2, [r1], #4

    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    ldrb    r4, [r1]
-    cbz     r4, .Lstrcpy_unalign_copy5bytes
+    cbz     r4, strcpy_unalign_copy5bytes

    ldr     r3, [r1], #4

@ -377,17 +370,17 @@ ENTRY(strcat)
    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    stmia   r0!, {r2, r3}
-    b       .Lstrcpy_unalign5
+    b       strcpy_unalign5

-.Lstrcpy_unalign_copy5bytes:
+strcpy_unalign_copy5bytes:
    stmia   r0!, {r2}
    strb    r4, [r0]
    m_ret   inst=pop

-.Lstrcpy_unalign_copy6bytes:
+strcpy_unalign_copy6bytes:
    stmia   r0!, {r2}
    strb    r4, [r0], #1
    strb    r5, [r0]
@ -395,13 +388,13 @@ ENTRY(strcat)

    .p2align 2
    // Can read 4 bytes before possibly crossing a page.
-.Lstrcpy_unalign4:
+strcpy_unalign4:
    ldmia   r1!, {r2}

    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    ldmia   r1!, {r3}
    pld     [r1, #64]
@ -409,20 +402,20 @@ ENTRY(strcat)
    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    stmia   r0!, {r2, r3}
-    b       .Lstrcpy_unalign4
+    b       strcpy_unalign4

    .p2align 2
    // Can read 3 bytes before possibly crossing a page.
-.Lstrcpy_unalign3:
+strcpy_unalign3:
    ldrb    r2, [r1]
-    cbz     r2, .Lstrcpy_unalign3_copy1byte
+    cbz     r2, strcpy_unalign3_copy1byte
    ldrb    r3, [r1, #1]
-    cbz     r3, .Lstrcpy_unalign3_copy2bytes
+    cbz     r3, strcpy_unalign3_copy2bytes
    ldrb    r4, [r1, #2]
-    cbz     r4, .Lstrcpy_unalign3_copy3bytes
+    cbz     r4, strcpy_unalign3_copy3bytes

    ldr     r2, [r1], #4
    ldr     r3, [r1], #4
@ -430,26 +423,26 @@ ENTRY(strcat)
    pld     [r1, #64]

    lsrs    lr, r2, #24
-    beq     .Lstrcpy_unalign_copy4bytes
+    beq     strcpy_unalign_copy4bytes

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    stmia   r0!, {r2, r3}
-    b       .Lstrcpy_unalign3
+    b       strcpy_unalign3

-.Lstrcpy_unalign3_copy1byte:
+strcpy_unalign3_copy1byte:
    strb    r2, [r0]
    m_ret   inst=pop

-.Lstrcpy_unalign3_copy2bytes:
+strcpy_unalign3_copy2bytes:
    strb    r2, [r0], #1
    strb    r3, [r0]
    m_ret   inst=pop

-.Lstrcpy_unalign3_copy3bytes:
+strcpy_unalign3_copy3bytes:
    strb    r2, [r0], #1
    strb    r3, [r0], #1
    strb    r4, [r0]
@ -457,34 +450,34 @@ ENTRY(strcat)

    .p2align 2
    // Can read 2 bytes before possibly crossing a page.
-.Lstrcpy_unalign2:
+strcpy_unalign2:
    ldrb    r2, [r1]
-    cbz     r2, .Lstrcpy_unalign_copy1byte
+    cbz     r2, strcpy_unalign_copy1byte
    ldrb    r3, [r1, #1]
-    cbz     r3, .Lstrcpy_unalign_copy2bytes
+    cbz     r3, strcpy_unalign_copy2bytes

    ldr     r2, [r1], #4
    ldr     r3, [r1], #4
    pld     [r1, #64]

    tst     r2, #0xff0000
-    beq     .Lstrcpy_unalign_copy3bytes
+    beq     strcpy_unalign_copy3bytes
    lsrs    ip, r2, #24
-    beq     .Lstrcpy_unalign_copy4bytes
+    beq     strcpy_unalign_copy4bytes

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    stmia   r0!, {r2, r3}
-    b       .Lstrcpy_unalign2
+    b       strcpy_unalign2

    .p2align 2
    // Can read 1 byte before possibly crossing a page.
-.Lstrcpy_unalign1:
+strcpy_unalign1:
    ldrb    r2, [r1]
-    cbz     r2, .Lstrcpy_unalign_copy1byte
+    cbz     r2, strcpy_unalign_copy1byte

    ldr     r2, [r1], #4
    ldr     r3, [r1], #4
@ -494,62 +487,62 @@ ENTRY(strcat)
    sub     ip, r2, #0x01010101
    bic     ip, ip, r2
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_first_register
+    bne     strcpy_zero_in_first_register

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .Lstrcpy_zero_in_second_register
+    bne     strcpy_zero_in_second_register

    stmia   r0!, {r2, r3}
-    b       .Lstrcpy_unalign1
+    b       strcpy_unalign1

-.Lstrcpy_unalign_copy1byte:
+strcpy_unalign_copy1byte:
    strb    r2, [r0]
    m_ret   inst=pop

-.Lstrcpy_unalign_copy2bytes:
+strcpy_unalign_copy2bytes:
    strb    r2, [r0], #1
    strb    r3, [r0]
    m_ret   inst=pop

-.Lstrcpy_unalign_copy3bytes:
+strcpy_unalign_copy3bytes:
    strh    r2, [r0], #2
    lsr     r2, #16
    strb    r2, [r0]
    m_ret   inst=pop

-.Lstrcpy_unalign_copy4bytes:
+strcpy_unalign_copy4bytes:
    stmia   r0, {r2}
    m_ret   inst=pop

-.Lstrcat_align_src:
+strcat_align_src:
    // Align to a double word (64 bits).
    rsb     r3, r3, #8
    lsls    ip, r3, #31
-    beq     .Lstrcat_align_to_32
+    beq     strcat_align_to_32
    ldrb    r2, [r0], #1
-    cbz     r2, .Lstrcat_r0_update
+    cbz     r2, strcat_r0_update

-.Lstrcat_align_to_32:
-    bcc     .Lstrcat_align_to_64
+strcat_align_to_32:
+    bcc     strcat_align_to_64
    ldrb    r2, [r0], #1
-    cbz     r2, .Lstrcat_r0_update
+    cbz     r2, strcat_r0_update
    ldrb    r2, [r0], #1
-    cbz     r2, .Lstrcat_r0_update
+    cbz     r2, strcat_r0_update

-.Lstrcat_align_to_64:
+strcat_align_to_64:
    tst     r3, #4
-    beq     .Lstrcat_mainloop
+    beq     strcat_mainloop
    ldr     r3, [r0], #4

    sub     ip, r3, #0x01010101
    bic     ip, ip, r3
    ands    ip, ip, #0x80808080
-    bne     .Lstrcat_zero_in_second_register
-    b       .Lstrcat_mainloop
+    bne     strcat_zero_in_second_register
+    b       strcat_mainloop

-.Lstrcat_r0_update:
+strcat_r0_update:
    sub     r0, r0, #1
-    b .Lstrcat_r0_scan_done
+    b strcat_r0_scan_done
 END(strcat)
--- a/libc/arch-arm/cortex-a9/bionic/string_copy.S
+++ b/libc/arch-arm/cortex-a9/bionic/string_copy.S
@ -244,20 +244,13 @@ ENTRY(strcpy)
 .Lstringcopy_align_to_64:
    tst     r3, #4
    beq     .Lstringcopy_check_src_align
-    // Read one byte at a time since we don't have any idea about the alignment
-    // of the source and we don't want to read into a different page.
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .Lstringcopy_complete
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .Lstringcopy_complete
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .Lstringcopy_complete
-    ldrb    r2, [r1], #1
-    strb    r2, [r0], #1
-    cbz     r2, .Lstringcopy_complete
+    ldr     r2, [r1], #4
+
+    sub     ip, r2, #0x01010101
+    bic     ip, ip, r2
+    ands    ip, ip, #0x80808080
+    bne     .Lstringcopy_zero_in_first_register
+    stmia   r0!, {r2}
    b       .Lstringcopy_check_src_align

 .Lstringcopy_complete:
--- a/libc/arch-arm/cortex-a9/cortex-a9.mk
+++ b/libc/arch-arm/cortex-a9/cortex-a9.mk
@ -1,18 +1,3 @@
-libc_openbsd_src_files_exclude_arm += \
-    upstream-openbsd/lib/libc/string/memmove.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/strcat.c \
-    upstream-openbsd/lib/libc/string/strcpy.c \
-
-libc_bionic_src_files_exclude_arm += \
-    arch-arm/generic/bionic/memcpy.S \
-    arch-arm/generic/bionic/memset.S \
-    arch-arm/generic/bionic/strcmp.S \
-    arch-arm/generic/bionic/strcpy.S \
-    arch-arm/generic/bionic/strlen.c \
-    bionic/__strcat_chk.cpp \
-    bionic/__strcpy_chk.cpp \
-
 libc_bionic_src_files_arm += \
    arch-arm/cortex-a9/bionic/memcpy.S \
    arch-arm/cortex-a9/bionic/memset.S \
@ -24,5 +9,8 @@ libc_bionic_src_files_arm += \
    arch-arm/cortex-a9/bionic/__strcpy_chk.S \
    arch-arm/cortex-a9/bionic/strlen.S \

+libc_bionic_src_files_arm += \
+    arch-arm/generic/bionic/memcmp.S \
+
 libc_bionic_src_files_arm += \
    arch-arm/denver/bionic/memmove.S \
--- a/libc/arch-arm/denver/denver.mk
+++ b/libc/arch-arm/denver/denver.mk
@ -1,18 +1,5 @@
-libc_openbsd_src_files_exclude_arm += \
-    upstream-openbsd/lib/libc/string/memmove.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/strcat.c \
-
-libc_bionic_src_files_exclude_arm += \
-    arch-arm/generic/bionic/memcpy.S \
-    arch-arm/generic/bionic/memset.S \
-    arch-arm/generic/bionic/strcmp.S \
-    arch-arm/generic/bionic/strcpy.S \
-    arch-arm/generic/bionic/strlen.c \
-    bionic/__strcat_chk.cpp \
-    bionic/__strcpy_chk.cpp \
-
 libc_bionic_src_files_arm += \
+    arch-arm/generic/bionic/memcmp.S \
    arch-arm/denver/bionic/memcpy.S \
    arch-arm/denver/bionic/memmove.S \
    arch-arm/denver/bionic/memset.S \
--- a/libc/arch-arm/generic/bionic/memcmp.S
+++ b/libc/arch-arm/generic/bionic/memcmp.S
@ -221,7 +221,8 @@ ENTRY(memcmp)
        bne         8b

 9:      /* restore registers and return */
-        ldmfd       sp!, {r4, pc}
+        ldmfd       sp!, {r4, lr}
+        bx          lr

 10:     /* process less than 12 bytes */
        cmp         r2, #0
--- a/libc/arch-arm/generic/bionic/memcpy.S
+++ b/libc/arch-arm/generic/bionic/memcpy.S
@ -194,7 +194,8 @@ ENTRY(memcpy)

        /* we're done! restore everything and return */
 1:      ldmfd       sp!, {r5-r11}
-        ldmfd       sp!, {r0, r4, pc}
+        ldmfd       sp!, {r0, r4, lr}
+        bx          lr

        /********************************************************************/

@ -384,7 +385,8 @@ ENTRY(memcpy)

        /* we're done! restore sp and spilled registers and return */
        add         sp,  sp, #28
-        ldmfd       sp!, {r0, r4, pc}
+        ldmfd       sp!, {r0, r4, lr}
+        bx          lr
 END(memcpy)

        // Only reached when the __memcpy_chk check fails.
--- a/libc/arch-arm/generic/bionic/memset.S
+++ b/libc/arch-arm/generic/bionic/memset.S
@ -82,7 +82,8 @@ ENTRY(memset)
        strbcs      r1, [r0], #1
        strbmi      r1, [r0], #1
        subs        r2, r2, r3
-        popls       {r0, r4-r7, pc}    /* return */
+        popls       {r0, r4-r7, lr}    /* return */
+        bxls        lr

        /* align the destination to a cache-line */
        mov         r12, r1
@ -125,7 +126,8 @@ ENTRY(memset)
        strhmi      r1, [r0], #2
        movs        r2, r2, lsl #2
        strbcs      r1, [r0]
-        ldmfd       sp!, {r0, r4-r7, pc}
+        ldmfd       sp!, {r0, r4-r7, lr}
+        bx          lr
 END(memset)

        .data
--- a/libc/arch-arm/generic/generic.mk
+++ b/libc/arch-arm/generic/generic.mk
@ -0,0 +1,14 @@
+libc_bionic_src_files_arm += \
+    arch-arm/generic/bionic/memcmp.S \
+    arch-arm/generic/bionic/memcpy.S \
+    arch-arm/generic/bionic/memset.S \
+    arch-arm/generic/bionic/strcmp.S \
+    arch-arm/generic/bionic/strcpy.S \
+    arch-arm/generic/bionic/strlen.c \
+    bionic/__strcat_chk.cpp \
+    bionic/__strcpy_chk.cpp \
+
+libc_openbsd_src_files_arm += \
+    upstream-openbsd/lib/libc/string/memmove.c \
+    upstream-openbsd/lib/libc/string/stpcpy.c \
+    upstream-openbsd/lib/libc/string/strcat.c \
--- a/libc/arch-arm/krait/bionic/__strcat_chk.S
+++ b/libc/arch-arm/krait/bionic/__strcat_chk.S
@ -40,7 +40,7 @@
 ENTRY(__strcat_chk)
    pld     [r0, #0]
    push    {r0, lr}
-    .cfi_adjust_cfa_offset 8
+    .cfi_def_cfa_offset 8
    .cfi_rel_offset r0, 0
    .cfi_rel_offset lr, 4
    push    {r4, r5}
@ -177,7 +177,7 @@ ENTRY(__strcat_chk)
 .L_strlen_done:
    add     r2, r3, r4
    cmp     r2, lr
-    bhi     .L_strcat_chk_failed
+    bhi     __strcat_chk_failed

    // Set up the registers for the memcpy code.
    mov     r1, r5
@ -185,17 +185,20 @@ ENTRY(__strcat_chk)
    mov     r2, r4
    add     r0, r0, r3
    pop     {r4, r5}
-    .cfi_adjust_cfa_offset -8
-    .cfi_restore r4
-    .cfi_restore r5
+END(__strcat_chk)

+#define MEMCPY_BASE         __strcat_chk_memcpy_base
+#define MEMCPY_BASE_ALIGNED __strcat_chk_memcpy_base_aligned
 #include "memcpy_base.S"

-    // Undo the above cfi directives.
+ENTRY_PRIVATE(__strcat_chk_failed)
+    .cfi_def_cfa_offset 8
+    .cfi_rel_offset r0, 0
+    .cfi_rel_offset lr, 4
    .cfi_adjust_cfa_offset 8
    .cfi_rel_offset r4, 0
    .cfi_rel_offset r5, 4
-.L_strcat_chk_failed:
+
    ldr     r0, error_message
    ldr     r1, error_code
 1:
@ -205,7 +208,7 @@ error_code:
    .word   BIONIC_EVENT_STRCAT_BUFFER_OVERFLOW
 error_message:
    .word   error_string-(1b+4)
-END(__strcat_chk)
+END(__strcat_chk_failed)

    .data
 error_string:
--- a/libc/arch-arm/krait/bionic/__strcpy_chk.S
+++ b/libc/arch-arm/krait/bionic/__strcpy_chk.S
@ -39,7 +39,7 @@
 ENTRY(__strcpy_chk)
    pld     [r0, #0]
    push    {r0, lr}
-    .cfi_adjust_cfa_offset 8
+    .cfi_def_cfa_offset 8
    .cfi_rel_offset r0, 0
    .cfi_rel_offset lr, 4

@ -149,14 +149,21 @@ ENTRY(__strcpy_chk)
    pld     [r1, #64]
    ldr     r0, [sp]
    cmp     r3, lr
-    bhs     .L_strcpy_chk_failed
+    bhs     __strcpy_chk_failed

    // Add 1 for copy length to get the string terminator.
    add     r2, r3, #1
+END(__strcpy_chk)

+#define MEMCPY_BASE         __strcpy_chk_memcpy_base
+#define MEMCPY_BASE_ALIGNED __strcpy_chk_memcpy_base_aligned
 #include "memcpy_base.S"

-.L_strcpy_chk_failed:
+ENTRY_PRIVATE(__strcpy_chk_failed)
+    .cfi_def_cfa_offset 8
+    .cfi_rel_offset r0, 0
+    .cfi_rel_offset lr, 4
+
    ldr     r0, error_message
    ldr     r1, error_code
 1:
@ -166,7 +173,7 @@ error_code:
    .word   BIONIC_EVENT_STRCPY_BUFFER_OVERFLOW
 error_message:
    .word   error_string-(1b+4)
-END(__strcpy_chk)
+END(__strcpy_chk_failed)

    .data
 error_string:
--- a/libc/arch-arm/krait/bionic/memcpy.S
+++ b/libc/arch-arm/krait/bionic/memcpy.S
@ -45,7 +45,7 @@

 ENTRY(__memcpy_chk)
        cmp         r2, r3
-        bhi         .L_memcpy_chk_fail
+        bhi         __memcpy_chk_fail

        // Fall through to memcpy...
 END(__memcpy_chk)
@ -53,20 +53,19 @@ END(__memcpy_chk)
 ENTRY(memcpy)
        pld     [r1, #64]
        stmfd   sp!, {r0, lr}
-        .cfi_adjust_cfa_offset 8
+        .cfi_def_cfa_offset 8
        .cfi_rel_offset r0, 0
        .cfi_rel_offset lr, 4
+END(memcpy)

+#define MEMCPY_BASE         __memcpy_base
+#define MEMCPY_BASE_ALIGNED __memcpy_base_aligned
 #include "memcpy_base.S"

-        // Undo the cfi directives from above.
-        .cfi_adjust_cfa_offset -8
-        .cfi_restore r0
-        .cfi_restore lr
-.L_memcpy_chk_fail:
+ENTRY_PRIVATE(__memcpy_chk_fail)
        // Preserve lr for backtrace.
        push    {lr}
-        .cfi_adjust_cfa_offset 4
+        .cfi_def_cfa_offset 4
        .cfi_rel_offset lr, 0

        ldr     r0, error_message
@ -78,7 +77,7 @@ error_code:
        .word   BIONIC_EVENT_MEMCPY_BUFFER_OVERFLOW
 error_message:
        .word   error_string-(1b+4)
-END(memcpy)
+END(__memcpy_chk_fail)

        .data
 error_string:
--- a/libc/arch-arm/krait/bionic/memcpy_base.S
+++ b/libc/arch-arm/krait/bionic/memcpy_base.S
@ -1,191 +1,123 @@
-/***************************************************************************
- Copyright (c) 2009-2013 The Linux Foundation. All rights reserved.
+/*
+ * Copyright (C) 2013 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */

- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are met:
-     * Redistributions of source code must retain the above copyright
-       notice, this list of conditions and the following disclaimer.
-     * Redistributions in binary form must reproduce the above copyright
-       notice, this list of conditions and the following disclaimer in the
-       documentation and/or other materials provided with the distribution.
-     * Neither the name of The Linux Foundation nor the names of its contributors may
-       be used to endorse or promote products derived from this software
-       without specific prior written permission.

- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
-  ***************************************************************************/
+/*
+ * This code assumes it is running on a processor that supports all arm v7
+ * instructions, that supports neon instructions, and that has a 32 byte
+ * cache line.
+ */

-/* Assumes neon instructions and a cache line size of 64 bytes. */
+// Assumes neon instructions and a cache line size of 32 bytes.

-#include <machine/cpu-features.h>
-#include <machine/asm.h>
+ENTRY_PRIVATE(MEMCPY_BASE)
+        .cfi_def_cfa_offset 8
+        .cfi_rel_offset r0, 0
+        .cfi_rel_offset lr, 4

-#define PLDOFFS	(10)
-#define PLDTHRESH (PLDOFFS)
-#define BBTHRESH (4096/64)
-#define PLDSIZE (64)
+        /* do we have at least 16-bytes to copy (needed for alignment below) */
+        cmp         r2, #16
+        blo         5f

-#if (PLDOFFS < 1)
-#error Routine does not support offsets less than 1
-#endif
+        /* align destination to cache-line for the write-buffer */
+        rsb         r3, r0, #0
+        ands        r3, r3, #0xF
+        beq         2f

-#if (PLDTHRESH < PLDOFFS)
-#error PLD threshold must be greater than or equal to the PLD offset
-#endif
+        /* copy up to 15-bytes (count in r3) */
+        sub         r2, r2, r3
+        movs        ip, r3, lsl #31
+        itt         mi
+        ldrbmi      lr, [r1], #1
+        strbmi      lr, [r0], #1
+        itttt       cs
+        ldrbcs      ip, [r1], #1
+        ldrbcs      lr, [r1], #1
+        strbcs      ip, [r0], #1
+        strbcs      lr, [r0], #1
+        movs        ip, r3, lsl #29
+        bge         1f
+        // copies 4 bytes, destination 32-bits aligned
+        vld4.8      {d0[0], d1[0], d2[0], d3[0]}, [r1]!
+        vst4.8      {d0[0], d1[0], d2[0], d3[0]}, [r0, :32]!
+1:      bcc         2f
+        // copies 8 bytes, destination 64-bits aligned
+        vld1.8      {d0}, [r1]!
+        vst1.8      {d0}, [r0, :64]!

-	.text
-	.fpu    neon
+2:      /* make sure we have at least 64 bytes to copy */
+        subs        r2, r2, #64
+        blo         2f

-.L_memcpy_base:
-	cmp	r2, #4
-	blt	.L_neon_lt4
-	cmp	r2, #16
-	blt	.L_neon_lt16
-	cmp	r2, #32
-	blt	.L_neon_16
-	cmp	r2, #64
-	blt	.L_neon_copy_32_a
+1:      /* The main loop copies 64 bytes at a time */
+        vld1.8      {d0  - d3},   [r1]!
+        vld1.8      {d4  - d7},   [r1]!
+        pld         [r1, #(32*8)]
+        subs        r2, r2, #64
+        vst1.8      {d0  - d3},   [r0, :128]!
+        vst1.8      {d4  - d7},   [r0, :128]!
+        bhs         1b

-	mov	r12, r2, lsr #6
-	cmp	r12, #PLDTHRESH
-	ble	.L_neon_copy_64_loop_nopld
+2:      /* fix-up the remaining count and make sure we have >= 32 bytes left */
+        adds        r2, r2, #32
+        blo         4f

-	push	{r9, r10}
-	.cfi_adjust_cfa_offset 8
-	.cfi_rel_offset r9, 0
-	.cfi_rel_offset r10, 4
+        /* Copy 32 bytes. These cache lines were already preloaded */
+        vld1.8      {d0 - d3},  [r1]!
+        sub         r2, r2, #32
+        vst1.8      {d0 - d3},  [r0, :128]!

-	cmp	r12, #BBTHRESH
-	ble	.L_neon_prime_pump
+4:      /* less than 32 left */
+        add         r2, r2, #32
+        tst         r2, #0x10
+        beq         5f
+        // copies 16 bytes, 128-bits aligned
+        vld1.8      {d0, d1}, [r1]!
+        vst1.8      {d0, d1}, [r0, :128]!

-	add	lr, r0, #0x400
-	add	r9, r1, #(PLDOFFS*PLDSIZE)
-	sub	lr, lr, r9
-	lsl	lr, lr, #21
-	lsr	lr, lr, #21
-	add	lr, lr, #(PLDOFFS*PLDSIZE)
-	cmp	r12, lr, lsr #6
-	ble	.L_neon_prime_pump
+5:      /* copy up to 15-bytes (count in r2) */
+        movs        ip, r2, lsl #29
+        bcc         1f
+        vld1.8      {d0}, [r1]!
+        vst1.8      {d0}, [r0]!
+1:      bge         2f
+        vld4.8      {d0[0], d1[0], d2[0], d3[0]}, [r1]!
+        vst4.8      {d0[0], d1[0], d2[0], d3[0]}, [r0]!
+2:      movs        ip, r2, lsl #31
+        itt         mi
+        ldrbmi      r3, [r1], #1
+        strbmi      r3, [r0], #1
+        itttt       cs
+        ldrbcs      ip, [r1], #1
+        ldrbcs      lr, [r1], #1
+        strbcs      ip, [r0], #1
+        strbcs      lr, [r0], #1

-	itt	gt
-	movgt	r9, #(PLDOFFS)
-	rsbsgt	r9, r9, lr, lsr #6
-	ble	.L_neon_prime_pump
-
-	add	r10, r1, lr
-	bic	r10, #0x3F
-
-	sub	r12, r12, lr, lsr #6
-
-	cmp	r9, r12
-	itee	le
-	suble	r12, r12, r9
-	movgt	r9, r12
-	movgt	r12, #0
-
-	pld	[r1, #((PLDOFFS-1)*PLDSIZE)]
-.L_neon_copy_64_loop_outer_doublepld:
-	pld	[r1, #((PLDOFFS)*PLDSIZE)]
-	vld1.32	{q0, q1}, [r1]!
-	vld1.32	{q2, q3}, [r1]!
-	ldr	r3, [r10]
-	subs	r9, r9, #1
-	vst1.32	{q0, q1}, [r0]!
-	vst1.32	{q2, q3}, [r0]!
-	add	r10, #64
-	bne	.L_neon_copy_64_loop_outer_doublepld
-	cmp	r12, #0
-	beq	.L_neon_pop_before_nopld
-
-	cmp	r12, #(512*1024/64)
-	blt	.L_neon_copy_64_loop_outer
-
-.L_neon_copy_64_loop_ddr:
-	vld1.32	{q0, q1}, [r1]!
-	vld1.32	{q2, q3}, [r1]!
-	pld	[r10]
-	subs	r12, r12, #1
-	vst1.32	{q0, q1}, [r0]!
-	vst1.32	{q2, q3}, [r0]!
-	add	r10, #64
-	bne	.L_neon_copy_64_loop_ddr
-	b	.L_neon_pop_before_nopld
-
-.L_neon_prime_pump:
-	mov	lr, #(PLDOFFS*PLDSIZE)
-	add	r10, r1, #(PLDOFFS*PLDSIZE)
-	bic	r10, #0x3F
-	sub	r12, r12, #PLDOFFS
-	ldr	r3, [r10, #(-1*PLDSIZE)]
-
-.L_neon_copy_64_loop_outer:
-	vld1.32	{q0, q1}, [r1]!
-	vld1.32	{q2, q3}, [r1]!
-	ldr	r3, [r10]
-	subs	r12, r12, #1
-	vst1.32	{q0, q1}, [r0]!
-	vst1.32	{q2, q3}, [r0]!
-	add	r10, #64
-	bne	.L_neon_copy_64_loop_outer
-
-.L_neon_pop_before_nopld:
-	mov	r12, lr, lsr #6
-	pop	{r9, r10}
-	.cfi_adjust_cfa_offset -8
-	.cfi_restore r9
-	.cfi_restore r10
-
-.L_neon_copy_64_loop_nopld:
-	vld1.32	{q8, q9}, [r1]!
-	vld1.32	{q10, q11}, [r1]!
-	subs	r12, r12, #1
-	vst1.32	{q8, q9}, [r0]!
-	vst1.32	{q10, q11}, [r0]!
-	bne	.L_neon_copy_64_loop_nopld
-	ands	r2, r2, #0x3f
-	beq	.L_neon_exit
-
-.L_neon_copy_32_a:
-	movs	r3, r2, lsl #27
-	bcc	.L_neon_16
-	vld1.32	{q0,q1}, [r1]!
-	vst1.32	{q0,q1}, [r0]!
-
-.L_neon_16:
-	bpl	.L_neon_lt16
-	vld1.32	{q8}, [r1]!
-	vst1.32	{q8}, [r0]!
-	ands	r2, r2, #0x0f
-	beq	.L_neon_exit
-
-.L_neon_lt16:
-	movs	r3, r2, lsl #29
-	bcc	1f
-	vld1.8	{d0}, [r1]!
-	vst1.8	{d0}, [r0]!
-1:
-	bge	.L_neon_lt4
-	vld4.8	{d0[0], d1[0], d2[0], d3[0]}, [r1]!
-	vst4.8	{d0[0], d1[0], d2[0], d3[0]}, [r0]!
-
-.L_neon_lt4:
-	movs	r2, r2, lsl #31
-	itt	cs
-	ldrhcs	r3, [r1], #2
-	strhcs	r3, [r0], #2
-	itt	mi
-	ldrbmi	r3, [r1]
-	strbmi	r3, [r0]
-
-.L_neon_exit:
-	pop	{r0, pc}
+        ldmfd       sp!, {r0, lr}
+        bx          lr
+END(MEMCPY_BASE)
--- a/libc/arch-arm/krait/bionic/memset.S
+++ b/libc/arch-arm/krait/bionic/memset.S
@ -69,7 +69,10 @@ END(bzero)

 /* memset() returns its first argument.  */
 ENTRY(memset)
-        mov         r3, r0
+        stmfd       sp!, {r0}
+        .cfi_def_cfa_offset 4
+        .cfi_rel_offset r0, 0
+
        vdup.8      q0, r1

        /* make sure we have at least 32 bytes to write */
@ -79,7 +82,7 @@ ENTRY(memset)

 1:      /* The main loop writes 32 bytes at a time */
        subs        r2, r2, #32
-        vst1.8      {d0 - d3}, [r3]!
+        vst1.8      {d0 - d3}, [r0]!
        bhs         1b

 2:      /* less than 32 left */
@ -88,17 +91,18 @@ ENTRY(memset)
        beq         3f

        // writes 16 bytes, 128-bits aligned
-        vst1.8      {d0, d1}, [r3]!
+        vst1.8      {d0, d1}, [r0]!
 3:      /* write up to 15-bytes (count in r2) */
        movs        ip, r2, lsl #29
        bcc         1f
-        vst1.8      {d0}, [r3]!
+        vst1.8      {d0}, [r0]!
 1:      bge         2f
-        vst1.32     {d0[0]}, [r3]!
+        vst1.32     {d0[0]}, [r0]!
 2:      movs        ip, r2, lsl #31
-        strbmi      r1, [r3], #1
-        strbcs      r1, [r3], #1
-        strbcs      r1, [r3], #1
+        strbmi      r1, [r0], #1
+        strbcs      r1, [r0], #1
+        strbcs      r1, [r0], #1
+        ldmfd       sp!, {r0}
        bx          lr
 END(memset)

--- a/libc/arch-arm/krait/krait.mk
+++ b/libc/arch-arm/krait/krait.mk
@ -1,18 +1,3 @@
-libc_openbsd_src_files_exclude_arm += \
-    upstream-openbsd/lib/libc/string/memmove.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/strcat.c \
-
-libc_bionic_src_files_exclude_arm += \
-    arch-arm/generic/bionic/memcpy.S \
-    arch-arm/generic/bionic/memset.S \
-    arch-arm/generic/bionic/strcmp.S \
-    arch-arm/generic/bionic/strcpy.S \
-    arch-arm/generic/bionic/strlen.c \
-    bionic/__strcat_chk.cpp \
-    bionic/__strcpy_chk.cpp \
-
 libc_bionic_src_files_arm += \
    arch-arm/krait/bionic/memcpy.S \
    arch-arm/krait/bionic/memset.S \
@ -27,5 +12,8 @@ libc_bionic_src_files_arm += \
    arch-arm/cortex-a15/bionic/strcpy.S \
    arch-arm/cortex-a15/bionic/strlen.S \

+libc_bionic_src_files_arm += \
+    arch-arm/generic/bionic/memcmp.S \
+
 libc_bionic_src_files_arm += \
    arch-arm/denver/bionic/memmove.S \
--- a/libc/arch-arm/syscalls/___mremap.S
+++ b/libc/arch-arm/syscalls/___mremap.S
@ -1,23 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(___mremap)
-    mov     ip, sp
-    stmfd   sp!, {r4, r5, r6, r7}
-    .cfi_def_cfa_offset 16
-    .cfi_rel_offset r4, 0
-    .cfi_rel_offset r5, 4
-    .cfi_rel_offset r6, 8
-    .cfi_rel_offset r7, 12
-    ldmfd   ip, {r4, r5, r6}
-    ldr     r7, =__NR_mremap
-    swi     #0
-    ldmfd   sp!, {r4, r5, r6, r7}
-    .cfi_def_cfa_offset 0
-    cmn     r0, #(MAX_ERRNO + 1)
-    bxls    lr
-    neg     r0, r0
-    b       __set_errno_internal
-END(___mremap)
-.hidden ___mremap
--- a/libc/arch-arm/syscalls/__preadv64.S
+++ b/libc/arch-arm/syscalls/__preadv64.S
@ -1,22 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(__preadv64)
-    mov     ip, sp
-    stmfd   sp!, {r4, r5, r6, r7}
-    .cfi_def_cfa_offset 16
-    .cfi_rel_offset r4, 0
-    .cfi_rel_offset r5, 4
-    .cfi_rel_offset r6, 8
-    .cfi_rel_offset r7, 12
-    ldmfd   ip, {r4, r5, r6}
-    ldr     r7, =__NR_preadv
-    swi     #0
-    ldmfd   sp!, {r4, r5, r6, r7}
-    .cfi_def_cfa_offset 0
-    cmn     r0, #(MAX_ERRNO + 1)
-    bxls    lr
-    neg     r0, r0
-    b       __set_errno_internal
-END(__preadv64)
--- a/libc/arch-arm/syscalls/__pwritev64.S
+++ b/libc/arch-arm/syscalls/__pwritev64.S
@ -1,22 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(__pwritev64)
-    mov     ip, sp
-    stmfd   sp!, {r4, r5, r6, r7}
-    .cfi_def_cfa_offset 16
-    .cfi_rel_offset r4, 0
-    .cfi_rel_offset r5, 4
-    .cfi_rel_offset r6, 8
-    .cfi_rel_offset r7, 12
-    ldmfd   ip, {r4, r5, r6}
-    ldr     r7, =__NR_pwritev
-    swi     #0
-    ldmfd   sp!, {r4, r5, r6, r7}
-    .cfi_def_cfa_offset 0
-    cmn     r0, #(MAX_ERRNO + 1)
-    bxls    lr
-    neg     r0, r0
-    b       __set_errno_internal
-END(__pwritev64)
--- a/libc/arch-arm/syscalls/___flistxattr.S
+++ b/libc/arch-arm/syscalls/___flistxattr.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___flistxattr)
+ENTRY(flistxattr)
    mov     ip, r7
    ldr     r7, =__NR_flistxattr
    swi     #0
@ -11,5 +11,4 @@ ENTRY(___flistxattr)
    bxls    lr
    neg     r0, r0
    b       __set_errno_internal
-END(___flistxattr)
-.hidden ___flistxattr
+END(flistxattr)
--- a/libc/arch-arm/syscalls/mremap.S
+++ b/libc/arch-arm/syscalls/mremap.S
@ -0,0 +1,14 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(mremap)
+    mov     ip, r7
+    ldr     r7, =__NR_mremap
+    swi     #0
+    mov     r7, ip
+    cmn     r0, #(MAX_ERRNO + 1)
+    bxls    lr
+    neg     r0, r0
+    b       __set_errno_internal
+END(mremap)
--- a/libc/arch-arm/syscalls/vfork.S
+++ b/libc/arch-arm/syscalls/vfork.S
@ -0,0 +1,14 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <private/bionic_asm.h>
+
+ENTRY(vfork)
+    mov     ip, r7
+    ldr     r7, =__NR_vfork
+    swi     #0
+    mov     r7, ip
+    cmn     r0, #(MAX_ERRNO + 1)
+    bxls    lr
+    neg     r0, r0
+    b       __set_errno_internal
+END(vfork)
--- a/libc/arch-arm64/arm64.mk
+++ b/libc/arch-arm64/arm64.mk
@ -1,38 +1,32 @@
 # 64-bit arm.

 #
-# Generic arm64 optimizations, may be overriden by CPU variants.
+# Default implementations of functions that are commonly optimized.
 #

 libc_bionic_src_files_arm64 += \
-    arch-arm64/generic/bionic/memchr.S \
-    arch-arm64/generic/bionic/memcmp.S \
-    arch-arm64/generic/bionic/memcpy.S \
-    arch-arm64/generic/bionic/memmove.S \
-    arch-arm64/generic/bionic/memset.S \
-    arch-arm64/generic/bionic/stpcpy.S \
-    arch-arm64/generic/bionic/strchr.S \
-    arch-arm64/generic/bionic/strcmp.S \
-    arch-arm64/generic/bionic/strcpy.S \
-    arch-arm64/generic/bionic/strlen.S \
-    arch-arm64/generic/bionic/strncmp.S \
-    arch-arm64/generic/bionic/strnlen.S \
-    arch-arm64/generic/bionic/wmemmove.S \
+    bionic/__memset_chk.cpp \
+    bionic/__strcpy_chk.cpp \
+    bionic/__strcat_chk.cpp \
+    bionic/strrchr.cpp \

-libc_bionic_src_files_exclude_arm64 += \
-    bionic/__memcpy_chk.cpp \
-    bionic/strchr.cpp \
-    bionic/strnlen.c \
+libc_freebsd_src_files_arm64 += \
+    upstream-freebsd/lib/libc/string/wcscat.c \
+    upstream-freebsd/lib/libc/string/wcschr.c \
+    upstream-freebsd/lib/libc/string/wcscmp.c \
+    upstream-freebsd/lib/libc/string/wcscpy.c \
+    upstream-freebsd/lib/libc/string/wcslen.c \
+    upstream-freebsd/lib/libc/string/wcsrchr.c \
+    upstream-freebsd/lib/libc/string/wmemcmp.c \

-libc_freebsd_src_files_exclude_arm64 += \
-    upstream-freebsd/lib/libc/string/wmemmove.c \
-
-libc_openbsd_src_files_exclude_arm64 += \
-    upstream-openbsd/lib/libc/string/memchr.c \
-    upstream-openbsd/lib/libc/string/memmove.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/strcpy.c \
-    upstream-openbsd/lib/libc/string/strncmp.c \
+libc_openbsd_src_files_arm64 += \
+    upstream-openbsd/lib/libc/string/memrchr.c \
+    upstream-openbsd/lib/libc/string/stpncpy.c \
+    upstream-openbsd/lib/libc/string/strcat.c \
+    upstream-openbsd/lib/libc/string/strlcat.c \
+    upstream-openbsd/lib/libc/string/strlcpy.c \
+    upstream-openbsd/lib/libc/string/strncat.c \
+    upstream-openbsd/lib/libc/string/strncpy.c \

 #
 # Inherently architecture-specific code.
@ -42,6 +36,7 @@ libc_bionic_src_files_arm64 += \
    arch-arm64/bionic/__bionic_clone.S \
    arch-arm64/bionic/_exit_with_stack_teardown.S \
    arch-arm64/bionic/setjmp.S \
+    arch-arm64/bionic/__set_tls.c \
    arch-arm64/bionic/syscall.S \
    arch-arm64/bionic/vfork.S \

@ -59,7 +54,6 @@ libc_crt_target_crtbegin_so_file_arm64 := \
 ifeq ($(strip $(TARGET_CPU_VARIANT)),)
  $(warning TARGET_ARCH is arm64, but TARGET_CPU_VARIANT is not defined)
 endif
-ifneq ($(TARGET_CPU_VARIANT),generic)
 cpu_variant_mk := $(LOCAL_PATH)/arch-arm64/$(TARGET_CPU_VARIANT)/$(TARGET_CPU_VARIANT).mk
 ifeq ($(wildcard $(cpu_variant_mk)),)
 $(error "TARGET_CPU_VARIANT not set or set to an unknown value. Possible values are generic, denver64. Use generic for devices that do not have a CPU similar to any of the supported cpu variants.")
@ -68,4 +62,3 @@ include $(cpu_variant_mk)
 libc_common_additional_dependencies += $(cpu_variant_mk)

 cpu_variant_mk :=
-endif
--- a/libc/arch-arm64/bionic/setjmp.S
+++ b/libc/arch-arm64/bionic/setjmp.S
@ -52,29 +52,6 @@
 #define _JB_D10_D11     (_JB_D12_D13 + 2)
 #define _JB_D8_D9       (_JB_D10_D11 + 2)

-#define MANGLE_REGISTERS 1
-.macro m_mangle_registers reg, sp_reg
-#if MANGLE_REGISTERS
-  eor x19, x19, \reg
-  eor x20, x20, \reg
-  eor x21, x21, \reg
-  eor x22, x22, \reg
-  eor x23, x23, \reg
-  eor x24, x24, \reg
-  eor x25, x25, \reg
-  eor x26, x26, \reg
-  eor x27, x27, \reg
-  eor x28, x28, \reg
-  eor x29, x29, \reg
-  eor x30, x30, \reg
-  eor \sp_reg, \sp_reg, \reg
-#endif
-.endm
-
-.macro m_unmangle_registers reg, sp_reg
-  m_mangle_registers \reg, sp_reg=\sp_reg
-.endm
-
 ENTRY(setjmp)
  mov w1, #1
  b sigsetjmp
@ -87,47 +64,23 @@ END(_setjmp)

 // int sigsetjmp(sigjmp_buf env, int save_signal_mask);
 ENTRY(sigsetjmp)
-  stp x0, x30, [sp, #-16]!
-  .cfi_def_cfa_offset 16
-  .cfi_rel_offset x0, 0
-  .cfi_rel_offset x30, 8
-
-  // Get the cookie and store it along with the signal flag.
-  mov x0, x1
-  bl __bionic_setjmp_cookie_get
-  mov x1, x0
-  ldr x0, [sp, #0]
-  str x1, [x0, #(_JB_SIGFLAG * 8)]
+  // Record whether or not we're saving the signal mask.
+  str w1, [x0, #(_JB_SIGFLAG * 8)]

  // Do we need to save the signal mask?
-  tbz w1, #0, 1f
-
-  // Save the cookie for later.
-  stp x1, xzr, [sp, #-16]!
-  .cfi_adjust_cfa_offset 16
+  cbz w1, 1f

  // Save current signal mask.
+  stp x0, x30, [sp, #-16]!
  // The 'how' argument is ignored if new_mask is NULL.
  mov x1, #0 // NULL.
  add x2, x0, #(_JB_SIGMASK * 8) // old_mask.
  bl sigprocmask
-
-  ldp x1, xzr, [sp], #16
-  .cfi_adjust_cfa_offset -16
+  ldp x0, x30, [sp], #16

 1:
-  // Restore original x0 and lr.
-  ldp x0, x30, [sp], #16
-  .cfi_adjust_cfa_offset -16
-  .cfi_restore x0
-  .cfi_restore x30
-
-  // Mask off the signal flag bit.
-  bic x1, x1, #1
-
  // Save core registers.
  mov x10, sp
-  m_mangle_registers x1, sp_reg=x10
  stp x30, x10, [x0, #(_JB_X30_SP  * 8)]
  stp x28, x29, [x0, #(_JB_X28_X29 * 8)]
  stp x26, x27, [x0, #(_JB_X26_X27 * 8)]
@ -135,7 +88,6 @@ ENTRY(sigsetjmp)
  stp x22, x23, [x0, #(_JB_X22_X23 * 8)]
  stp x20, x21, [x0, #(_JB_X20_X21 * 8)]
  str x19,      [x0, #(_JB_X19     * 8)]
-  m_unmangle_registers x1, sp_reg=x10

  // Save floating point registers.
  stp d14, d15, [x0, #(_JB_D14_D15 * 8)]
@ -150,60 +102,30 @@ END(sigsetjmp)
 // void siglongjmp(sigjmp_buf env, int value);
 ENTRY(siglongjmp)
  // Do we need to restore the signal mask?
-  ldr x2, [x0, #(_JB_SIGFLAG * 8)]
-  tbz w2, #0, 1f
-
-  stp x0, x30, [sp, #-16]!
-  .cfi_adjust_cfa_offset 16
-  .cfi_rel_offset x0, 0
-  .cfi_rel_offset x30, 8
+  ldr w9, [x0, #(_JB_SIGFLAG * 8)]
+  cbz w9, 1f

  // Restore signal mask.
+  stp x0, x30, [sp, #-16]!
  mov x19, x1 // Save 'value'.
-
  mov x2, x0
  mov x0, #2 // SIG_SETMASK
  add x1, x2, #(_JB_SIGMASK * 8) // new_mask.
  mov x2, #0 // NULL.
  bl sigprocmask
  mov x1, x19 // Restore 'value'.
-
-  // Restore original x0 and lr.
  ldp x0, x30, [sp], #16
-  .cfi_adjust_cfa_offset -16
-  .cfi_restore x0
-  .cfi_restore x30

-  ldr x2, [x0, #(_JB_SIGFLAG * 8)]
 1:
  // Restore core registers.
-  bic x2, x2, #1
  ldp x30, x10, [x0, #(_JB_X30_SP  * 8)]
+  mov sp, x10
  ldp x28, x29, [x0, #(_JB_X28_X29 * 8)]
  ldp x26, x27, [x0, #(_JB_X26_X27 * 8)]
  ldp x24, x25, [x0, #(_JB_X24_X25 * 8)]
  ldp x22, x23, [x0, #(_JB_X22_X23 * 8)]
  ldp x20, x21, [x0, #(_JB_X20_X21 * 8)]
  ldr x19,      [x0, #(_JB_X19     * 8)]
-  m_unmangle_registers x2, sp_reg=x10
-  mov sp, x10
-
-  stp x0, x1, [sp, #-16]!
-  .cfi_adjust_cfa_offset 16
-  .cfi_rel_offset x0, 0
-  .cfi_rel_offset x1, 8
-  stp x30, xzr, [sp, #-16]!
-  .cfi_adjust_cfa_offset 16
-  .cfi_rel_offset x30, 0
-  ldr x0, [x0, #(_JB_SIGFLAG * 8)]
-  bl __bionic_setjmp_cookie_check
-  ldp x30, xzr, [sp], #16
-  .cfi_adjust_cfa_offset -16
-  .cfi_restore x30
-  ldp x0, x1, [sp], #16
-  .cfi_adjust_cfa_offset -16
-  .cfi_restore x0
-  .cfi_restore x1

  // Restore floating point registers.
  ldp d14, d15, [x0, #(_JB_D14_D15 * 8)]
@ -211,6 +133,13 @@ ENTRY(siglongjmp)
  ldp d10, d11, [x0, #(_JB_D10_D11 * 8)]
  ldp d8,  d9,  [x0, #(_JB_D8_D9   * 8)]

+  // Validate sp (sp mod 16 = 0) and lr (lr mod 4 = 0).
+  tst x30, #3
+  b.ne longjmperror
+  mov x10, sp
+  tst x10, #15
+  b.ne longjmperror
+
  // Set return value.
  cmp w1, wzr
  csinc w0, w1, wzr, ne
--- a/libc/arch-arm64/bionic/vfork.S
+++ b/libc/arch-arm64/bionic/vfork.S
@ -31,11 +31,6 @@
 #include <linux/sched.h>

 ENTRY(vfork)
-    // __get_tls()[TLS_SLOT_THREAD_ID]->cached_pid_ = 0
-    mrs     x0, tpidr_el0
-    ldr     x0, [x0, #8]
-    str     wzr, [x0, #20]
-
    mov     x0, #(CLONE_VM | CLONE_VFORK | SIGCHLD)
    mov     x1, xzr
    mov     x2, xzr
--- a/libc/arch-arm64/cortex-a53/cortex-a53.mk
+++ b/libc/arch-arm64/cortex-a53/cortex-a53.mk
@ -0,0 +1 @@
+include bionic/libc/arch-arm64/generic/generic.mk
--- a/libc/arch-arm64/denver64/denver64.mk
+++ b/libc/arch-arm64/denver64/denver64.mk
@ -1,7 +1,14 @@
 libc_bionic_src_files_arm64 += \
+    arch-arm64/generic/bionic/memchr.S \
+    arch-arm64/generic/bionic/memcmp.S \
    arch-arm64/denver64/bionic/memcpy.S \
+    arch-arm64/generic/bionic/memmove.S \
    arch-arm64/denver64/bionic/memset.S \
-
-libc_bionic_src_files_exclude_arm64 += \
-    arch-arm64/generic/bionic/memcpy.S \
-    arch-arm64/generic/bionic/memset.S \
+    arch-arm64/generic/bionic/stpcpy.S \
+    arch-arm64/generic/bionic/strchr.S \
+    arch-arm64/generic/bionic/strcmp.S \
+    arch-arm64/generic/bionic/strcpy.S \
+    arch-arm64/generic/bionic/strlen.S \
+    arch-arm64/generic/bionic/strncmp.S \
+    arch-arm64/generic/bionic/strnlen.S \
+    arch-arm64/generic/bionic/wmemmove.S
--- a/libc/arch-arm64/generic/bionic/memmove.S
+++ b/libc/arch-arm64/generic/bionic/memmove.S
@ -35,6 +35,10 @@
 #include <private/bionic_asm.h>

 /* Parameters and result.  */
+#ifdef BCOPY
+#define origdstin	x1
+#define origsrc	x0
+#endif
 #define dstin	x0
 #define src	x1
 #define count	x2
@ -55,7 +59,13 @@
 #define D_l	x13
 #define D_h	x14

-#if defined(WMEMMOVE)
+#ifdef BCOPY
+ENTRY(bcopy)
+	/* Swap src and dst so that a branch to memcpy doesn't cause issues. */
+	mov	tmp1, origsrc
+	mov	origsrc, origdstin
+	mov	origdstin, tmp1
+#elif defined(WMEMMOVE)
 ENTRY(wmemmove)
 	lsl	count, count, #2
 #else
@ -322,7 +332,9 @@ ENTRY(memmove)
 	tst	count, #0x3f
 	b.ne	.Ltail63down
 	ret
-#if defined(WMEMMOVE)
+#ifdef BCOPY
+END(bcopy)
+#elif defined(WMEMMOVE)
 END(wmemmove)
 #else
 END(memmove)
--- a/libc/arch-arm64/generic/generic.mk
+++ b/libc/arch-arm64/generic/generic.mk
@ -0,0 +1,14 @@
+libc_bionic_src_files_arm64 += \
+    arch-arm64/generic/bionic/memchr.S \
+    arch-arm64/generic/bionic/memcmp.S \
+    arch-arm64/generic/bionic/memcpy.S \
+    arch-arm64/generic/bionic/memmove.S \
+    arch-arm64/generic/bionic/memset.S \
+    arch-arm64/generic/bionic/stpcpy.S \
+    arch-arm64/generic/bionic/strchr.S \
+    arch-arm64/generic/bionic/strcmp.S \
+    arch-arm64/generic/bionic/strcpy.S \
+    arch-arm64/generic/bionic/strlen.S \
+    arch-arm64/generic/bionic/strncmp.S \
+    arch-arm64/generic/bionic/strnlen.S \
+    arch-arm64/generic/bionic/wmemmove.S
--- a/libc/arch-arm64/syscalls/___flistxattr.S
+++ b/libc/arch-arm64/syscalls/___flistxattr.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___flistxattr)
+ENTRY(flistxattr)
    mov     x8, __NR_flistxattr
    svc     #0

@ -11,5 +11,4 @@ ENTRY(___flistxattr)
    b.hi    __set_errno_internal

    ret
-END(___flistxattr)
-.hidden ___flistxattr
+END(flistxattr)
--- a/libc/arch-arm64/syscalls/___mremap.S
+++ b/libc/arch-arm64/syscalls/___mremap.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___mremap)
+ENTRY(mremap)
    mov     x8, __NR_mremap
    svc     #0

@ -11,5 +11,4 @@ ENTRY(___mremap)
    b.hi    __set_errno_internal

    ret
-END(___mremap)
-.hidden ___mremap
+END(mremap)
--- a/libc/arch-arm64/syscalls/preadv.S
+++ b/libc/arch-arm64/syscalls/preadv.S
@ -1,16 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(preadv)
-    mov     x8, __NR_preadv
-    svc     #0
-
-    cmn     x0, #(MAX_ERRNO + 1)
-    cneg    x0, x0, hi
-    b.hi    __set_errno_internal
-
-    ret
-END(preadv)
-
-ALIAS_SYMBOL(preadv64, preadv)
--- a/libc/arch-arm64/syscalls/pwritev.S
+++ b/libc/arch-arm64/syscalls/pwritev.S
@ -1,16 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(pwritev)
-    mov     x8, __NR_pwritev
-    svc     #0
-
-    cmn     x0, #(MAX_ERRNO + 1)
-    cneg    x0, x0, hi
-    b.hi    __set_errno_internal
-
-    ret
-END(pwritev)
-
-ALIAS_SYMBOL(pwritev64, pwritev)
--- a/libc/arch-mips/bionic/setjmp.S
+++ b/libc/arch-mips/bionic/setjmp.S
@ -132,9 +132,10 @@
 /*     	field:		byte offset:	size:						*/
 /*     	dynam filler	(0*4)		   0-4 bytes of rounddown filler, DON'T TOUCH!!
 						often overlays user storage!!		*/
-#define	SC_FPSR_OFFSET	(1*4)		/* 4 bytes, floating point control/status reg */
+#define	SC_MAGIC_OFFSET	(1*4)		/* 4 bytes, identify jmpbuf, first actual field */
+#define	SC_FLAG_OFFSET	(2*4)		/* 4 bytes, savesigs flag */
+#define	SC_FPSR_OFFSET	(3*4)		/* 4 bytes, floating point control/status reg */
 /* following fields are 8-byte aligned */
-#define	SC_FLAG_OFFSET	(2*4)		/* 8 bytes, cookie and savesigs flag, first actual field  */
 #define	SC_MASK_OFFSET	(4*4)		/* 16 bytes, mips32/mips64 version of sigset_t */
 #define	SC_SPARE_OFFSET	(8*4)		/* 8 bytes, reserved for future uses */

@ -165,16 +166,6 @@
 #error _JBLEN is too small
 #endif

-.macro m_mangle_reg_and_store reg, cookie, temp, offset
-	xor	\temp, \reg, \cookie
-	REG_S	\temp, \offset
-.endm
-
-.macro m_unmangle_reg_and_load reg, cookie, temp, offset
-	REG_L	\temp, \offset
-	xor	\reg, \temp, \cookie
-.endm
-
 /*
 *
 *  GPOFF and FRAMESIZE must be the same for all setjmp/longjmp routines
@ -199,46 +190,36 @@ setjmp_common:
 	li	t0, ~7
 	and	a0, t0				# round jmpbuf addr DOWN to 8-byte boundary
 #endif
+	sw	a1, SC_FLAG_OFFSET(a0)		# save savesigs flag
+	beqz	a1, 1f				# do saving of signal mask?
+
 	REG_S	ra, RAOFF(sp)			# spill state
 	REG_S	a0, A0OFF(sp)
-
-	# get the cookie and store it along with the signal flag.
-	move	a0, a1
-	jal	__bionic_setjmp_cookie_get
-	REG_L	a0, A0OFF(sp)
-
-	REG_S	v0, SC_FLAG_OFFSET(a0)		# save cookie and savesigs flag
-	andi	t0, v0, 1			# extract savesigs flag
-
-	beqz	t0, 1f				# do saving of signal mask?
-
 	# call sigprocmask(int how ignored, sigset_t* null, sigset_t* SC_MASK(a0)):
 	LA	a2, SC_MASK_OFFSET(a0)		# gets current signal mask
 	li	a0, 0				# how; ignored when new mask is null
 	li	a1, 0				# null new mask
 	jal	sigprocmask			# get current signal mask
 	REG_L	a0, A0OFF(sp)
-1:
-	REG_L	gp, GPOFF(sp)			# restore spills
 	REG_L	ra, RAOFF(sp)
-	REG_L	t0, SC_FLAG_OFFSET(a0)		# move cookie to temp reg
-
+1:
+	li	v0, 0xACEDBADE			# sigcontext magic number
+	sw	v0, SC_MAGIC_OFFSET(a0)
 	# callee-saved long-sized regs:
-	PTR_ADDU v1, sp, FRAMESZ		# save orig sp
-
-	# m_mangle_reg_and_store reg, cookie, temp, offset
-	m_mangle_reg_and_store	ra, t0, t1, SC_REGS+0*REGSZ(a0)
-	m_mangle_reg_and_store	s0, t0, t2, SC_REGS+1*REGSZ(a0)
-	m_mangle_reg_and_store	s1, t0, t3, SC_REGS+2*REGSZ(a0)
-	m_mangle_reg_and_store	s2, t0, t1, SC_REGS+3*REGSZ(a0)
-	m_mangle_reg_and_store	s3, t0, t2, SC_REGS+4*REGSZ(a0)
-	m_mangle_reg_and_store	s4, t0, t3, SC_REGS+5*REGSZ(a0)
-	m_mangle_reg_and_store	s5, t0, t1, SC_REGS+6*REGSZ(a0)
-	m_mangle_reg_and_store	s6, t0, t2, SC_REGS+7*REGSZ(a0)
-	m_mangle_reg_and_store	s7, t0, t3, SC_REGS+8*REGSZ(a0)
-	m_mangle_reg_and_store	s8, t0, t1, SC_REGS+9*REGSZ(a0)
-	m_mangle_reg_and_store	gp, t0, t2, SC_REGS+10*REGSZ(a0)
-	m_mangle_reg_and_store	v1, t0, t3, SC_REGS+11*REGSZ(a0)
+	REG_S	ra, SC_REGS+0*REGSZ(a0)
+	REG_S	s0, SC_REGS+1*REGSZ(a0)
+	REG_S	s1, SC_REGS+2*REGSZ(a0)
+	REG_S	s2, SC_REGS+3*REGSZ(a0)
+	REG_S	s3, SC_REGS+4*REGSZ(a0)
+	REG_S	s4, SC_REGS+5*REGSZ(a0)
+	REG_S	s5, SC_REGS+6*REGSZ(a0)
+	REG_S	s6, SC_REGS+7*REGSZ(a0)
+	REG_S	s7, SC_REGS+8*REGSZ(a0)
+	REG_S	s8, SC_REGS+9*REGSZ(a0)
+	REG_L	v0, GPOFF(sp)
+	REG_S	v0, SC_REGS+10*REGSZ(a0)	# save gp
+	PTR_ADDU v0, sp, FRAMESZ
+	REG_S	v0, SC_REGS+11*REGSZ(a0)	# save orig sp

 	cfc1	v0, $31

@ -307,41 +288,36 @@ NON_LEAF(siglongjmp, FRAMESZ, ra)
 	li	t0, ~7
 	and	a0, t0				# round jmpbuf addr DOWN to 8-byte boundary
 #endif
+	lw	v0, SC_MAGIC_OFFSET(a0)
+	li	t0, 0xACEDBADE
+	bne	v0, t0, longjmp_botch		# jump if error

-	move	s1, a1				# temp spill
-	move	s0, a0
-
-	# extract savesigs flag
-	REG_L	s2, SC_FLAG_OFFSET(s0)
-	andi	t0, s2, 1
+	lw	t0, SC_FLAG_OFFSET(a0)		# get savesigs flag
 	beqz	t0, 1f				# restore signal mask?

-	# call sigprocmask(int how SIG_SETMASK, sigset_t* SC_MASK(a0), sigset_t* null):
-	LA	a1, SC_MASK_OFFSET(s0)		# signals being restored
+	REG_S	a1, A1OFF(sp)			# temp spill
+	REG_S	a0, A0OFF(sp)
+        # call sigprocmask(int how SIG_SETMASK, sigset_t* SC_MASK(a0), sigset_t* null):
+	LA	a1, SC_MASK_OFFSET(a0)		# signals being restored
 	li	a0, 3				# mips SIG_SETMASK
 	li	a2, 0				# null
 	jal	sigprocmask			# restore signal mask
+	REG_L	a0, A0OFF(sp)
+	REG_L	a1, A1OFF(sp)
 1:
-	move	t0, s2				# get cookie to temp reg
-	move	a1, s1
-	move	a0, s0
-
 	# callee-saved long-sized regs:
-
-	# m_unmangle_reg_and_load reg, cookie, temp, offset
-	# don't restore gp yet, old value is needed for cookie_check call
-	m_unmangle_reg_and_load ra, t0, t1, SC_REGS+0*REGSZ(a0)
-	m_unmangle_reg_and_load s0, t0, t2, SC_REGS+1*REGSZ(a0)
-	m_unmangle_reg_and_load s1, t0, t3, SC_REGS+2*REGSZ(a0)
-	m_unmangle_reg_and_load s2, t0, t1, SC_REGS+3*REGSZ(a0)
-	m_unmangle_reg_and_load s3, t0, t2, SC_REGS+4*REGSZ(a0)
-	m_unmangle_reg_and_load s4, t0, t3, SC_REGS+5*REGSZ(a0)
-	m_unmangle_reg_and_load s5, t0, t1, SC_REGS+6*REGSZ(a0)
-	m_unmangle_reg_and_load s6, t0, t2, SC_REGS+7*REGSZ(a0)
-	m_unmangle_reg_and_load s7, t0, t3, SC_REGS+8*REGSZ(a0)
-	m_unmangle_reg_and_load s8, t0, t1, SC_REGS+9*REGSZ(a0)
-	m_unmangle_reg_and_load v1, t0, t2, SC_REGS+10*REGSZ(a0)
-	m_unmangle_reg_and_load sp, t0, t3, SC_REGS+11*REGSZ(a0)
+	REG_L	ra, SC_REGS+0*REGSZ(a0)
+	REG_L	s0, SC_REGS+1*REGSZ(a0)
+	REG_L	s1, SC_REGS+2*REGSZ(a0)
+	REG_L	s2, SC_REGS+3*REGSZ(a0)
+	REG_L	s3, SC_REGS+4*REGSZ(a0)
+	REG_L	s4, SC_REGS+5*REGSZ(a0)
+	REG_L	s5, SC_REGS+6*REGSZ(a0)
+	REG_L	s6, SC_REGS+7*REGSZ(a0)
+	REG_L	s7, SC_REGS+8*REGSZ(a0)
+	REG_L	s8, SC_REGS+9*REGSZ(a0)
+	REG_L	gp, SC_REGS+10*REGSZ(a0)
+	REG_L	sp, SC_REGS+11*REGSZ(a0)

 	lw	v0, SC_FPSR_OFFSET(a0)
 	ctc1	v0, $31			# restore old fr mode before fp values
@ -365,22 +341,15 @@ NON_LEAF(siglongjmp, FRAMESZ, ra)
 	l.d	$f28, SC_FPREGS+4*REGSZ_FP(a0)
 	l.d	$f30, SC_FPREGS+5*REGSZ_FP(a0)
 #endif
-
-	# check cookie
-	PTR_SUBU sp, FRAMESZ
-	REG_S	v1, GPOFF(sp)
-	REG_S	ra, RAOFF(sp)
-	REG_S	a1, A1OFF(sp)
-	move	a0, t0
-	jal	__bionic_setjmp_cookie_check
-	REG_L	gp, GPOFF(sp)
-	REG_L	ra, RAOFF(sp)
-	REG_L	a1, A1OFF(sp)
-	PTR_ADDU sp, FRAMESZ
-
-	sltiu	t0, a1, 1		# never return 0!
-	xor	v0, a1, t0
+	bne	a1, zero, 1f
+	li	a1, 1			# never return 0!
+1:
+	move	v0, a1
 	j	ra			# return to setjmp call site
+
+longjmp_botch:
+	jal	longjmperror
+	jal	abort
 END(siglongjmp)

 ALIAS_SYMBOL(longjmp, siglongjmp)
--- a/libc/arch-mips/bionic/vfork.S
+++ b/libc/arch-mips/bionic/vfork.S
@ -37,14 +37,6 @@ ENTRY(vfork)
 	.set	noreorder
 	.cpload	t9

-	// __get_tls()[TLS_SLOT_THREAD_ID]->cached_pid_ = 0
-	.set	push
-	.set	mips32r2
-	rdhwr	v0, $29			// v0 = tls; kernel trap on mips32r1
-	.set	pop
-	lw	v0, REGSZ*1(v0)		// v0 = v0[TLS_SLOT_THREAD_ID ie 1]
-	sw	$0, REGSZ*2+4(v0)	// v0->cached_pid_ = 0
-
 	li	a0, (CLONE_VM | CLONE_VFORK | SIGCHLD)
 	li	a1, 0
 	li	a2, 0
--- a/libc/arch-mips/mips.mk
+++ b/libc/arch-mips/mips.mk
@ -1,10 +1,45 @@
 # 32-bit mips.

+#
+# Default implementations of functions that are commonly optimized.
+#
+
 libc_bionic_src_files_mips += \
    arch-mips/string/memcmp.c \
    arch-mips/string/memcpy.S \
    arch-mips/string/memset.S \
    arch-mips/string/strcmp.S \
+    bionic/__memcpy_chk.cpp \
+    bionic/__memset_chk.cpp \
+    bionic/__strcpy_chk.cpp \
+    bionic/__strcat_chk.cpp \
+    bionic/strchr.cpp \
+    bionic/strnlen.c \
+    bionic/strrchr.cpp \
+
+libc_freebsd_src_files_mips += \
+    upstream-freebsd/lib/libc/string/wcscat.c \
+    upstream-freebsd/lib/libc/string/wcschr.c \
+    upstream-freebsd/lib/libc/string/wcscmp.c \
+    upstream-freebsd/lib/libc/string/wcscpy.c \
+    upstream-freebsd/lib/libc/string/wcslen.c \
+    upstream-freebsd/lib/libc/string/wcsrchr.c \
+    upstream-freebsd/lib/libc/string/wmemcmp.c \
+    upstream-freebsd/lib/libc/string/wmemmove.c \
+
+libc_openbsd_src_files_mips += \
+    upstream-openbsd/lib/libc/string/memchr.c \
+    upstream-openbsd/lib/libc/string/memmove.c \
+    upstream-openbsd/lib/libc/string/memrchr.c \
+    upstream-openbsd/lib/libc/string/stpcpy.c \
+    upstream-openbsd/lib/libc/string/stpncpy.c \
+    upstream-openbsd/lib/libc/string/strcat.c \
+    upstream-openbsd/lib/libc/string/strcpy.c \
+    upstream-openbsd/lib/libc/string/strlcat.c \
+    upstream-openbsd/lib/libc/string/strlcpy.c \
+    upstream-openbsd/lib/libc/string/strncat.c \
+    upstream-openbsd/lib/libc/string/strncmp.c \
+    upstream-openbsd/lib/libc/string/strncpy.c \

 #
 # Inherently architecture-specific code.
--- a/libc/arch-mips/syscalls/__preadv64.S
+++ b/libc/arch-mips/syscalls/__preadv64.S
@ -1,19 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(__preadv64)
-    .set noreorder
-    .cpload t9
-    li v0, __NR_preadv
-    syscall
-    bnez a3, 1f
-    move a0, v0
-    j ra
-    nop
-1:
-    la t9,__set_errno_internal
-    j t9
-    nop
-    .set reorder
-END(__preadv64)
--- a/libc/arch-mips/syscalls/__pwritev64.S
+++ b/libc/arch-mips/syscalls/__pwritev64.S
@ -1,19 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(__pwritev64)
-    .set noreorder
-    .cpload t9
-    li v0, __NR_pwritev
-    syscall
-    bnez a3, 1f
-    move a0, v0
-    j ra
-    nop
-1:
-    la t9,__set_errno_internal
-    j t9
-    nop
-    .set reorder
-END(__pwritev64)
--- a/libc/arch-mips/syscalls/___flistxattr.S
+++ b/libc/arch-mips/syscalls/___flistxattr.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___flistxattr)
+ENTRY(flistxattr)
    .set noreorder
    .cpload t9
    li v0, __NR_flistxattr
@ -16,5 +16,4 @@ ENTRY(___flistxattr)
    j t9
    nop
    .set reorder
-END(___flistxattr)
-.hidden ___flistxattr
+END(flistxattr)
--- a/libc/arch-mips/syscalls/___mremap.S
+++ b/libc/arch-mips/syscalls/___mremap.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___mremap)
+ENTRY(mremap)
    .set noreorder
    .cpload t9
    li v0, __NR_mremap
@ -16,5 +16,4 @@ ENTRY(___mremap)
    j t9
    nop
    .set reorder
-END(___mremap)
-.hidden ___mremap
+END(mremap)
--- a/libc/arch-mips64/bionic/vfork.S
+++ b/libc/arch-mips64/bionic/vfork.S
@ -46,12 +46,6 @@ LEAF(vfork,FRAMESZ)
 	PTR_SUBU sp, FRAMESZ
 #endif
 	SETUP_GP64(a5, vfork)
-
-	// __get_tls()[TLS_SLOT_THREAD_ID]->cached_pid_ = 0
-	rdhwr	v0, $29			// v0 = tls
-	REG_L	v0, REGSZ*1(v0)		// v0 = v0[TLS_SLOT_THREAD_ID ie 1]
-	sw	$0, REGSZ*2+4(v0)	// v0->cached_pid_ = 0
-
 	LI	a0, (CLONE_VM | CLONE_VFORK | SIGCHLD)
 	move	a1, $0
 	move	a2, $0
--- a/libc/arch-mips64/mips64.mk
+++ b/libc/arch-mips64/mips64.mk
@ -1,11 +1,46 @@
 # 64-bit mips.

+#
+# Default implementations of functions that are commonly optimized.
+#
+
 libc_bionic_src_files_mips64 += \
    arch-mips/string/memcmp.c \
    arch-mips/string/memcpy.S \
    arch-mips/string/memset.S \
    arch-mips/string/strcmp.S \
    arch-mips/string/strlen.c \
+    bionic/__memcpy_chk.cpp \
+    bionic/__memset_chk.cpp \
+    bionic/__strcpy_chk.cpp \
+    bionic/__strcat_chk.cpp \
+    bionic/strchr.cpp \
+    bionic/strnlen.c \
+    bionic/strrchr.cpp \
+
+libc_freebsd_src_files_mips64 += \
+    upstream-freebsd/lib/libc/string/wcscat.c \
+    upstream-freebsd/lib/libc/string/wcschr.c \
+    upstream-freebsd/lib/libc/string/wcscmp.c \
+    upstream-freebsd/lib/libc/string/wcscpy.c \
+    upstream-freebsd/lib/libc/string/wcslen.c \
+    upstream-freebsd/lib/libc/string/wcsrchr.c \
+    upstream-freebsd/lib/libc/string/wmemcmp.c \
+    upstream-freebsd/lib/libc/string/wmemmove.c \
+
+libc_openbsd_src_files_mips64 += \
+    upstream-openbsd/lib/libc/string/memchr.c \
+    upstream-openbsd/lib/libc/string/memmove.c \
+    upstream-openbsd/lib/libc/string/memrchr.c \
+    upstream-openbsd/lib/libc/string/stpcpy.c \
+    upstream-openbsd/lib/libc/string/stpncpy.c \
+    upstream-openbsd/lib/libc/string/strcat.c \
+    upstream-openbsd/lib/libc/string/strcpy.c \
+    upstream-openbsd/lib/libc/string/strlcat.c \
+    upstream-openbsd/lib/libc/string/strlcpy.c \
+    upstream-openbsd/lib/libc/string/strncat.c \
+    upstream-openbsd/lib/libc/string/strncmp.c \
+    upstream-openbsd/lib/libc/string/strncpy.c \

 #
 # Inherently architecture-specific code.
--- a/libc/arch-mips64/syscalls/___flistxattr.S
+++ b/libc/arch-mips64/syscalls/___flistxattr.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___flistxattr)
+ENTRY(flistxattr)
    .set push
    .set noreorder
    li v0, __NR_flistxattr
@ -22,5 +22,4 @@ ENTRY(___flistxattr)
    j t9
    move ra, t0
    .set pop
-END(___flistxattr)
-.hidden ___flistxattr
+END(flistxattr)
--- a/libc/arch-mips64/syscalls/___mremap.S
+++ b/libc/arch-mips64/syscalls/___mremap.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___mremap)
+ENTRY(mremap)
    .set push
    .set noreorder
    li v0, __NR_mremap
@ -22,5 +22,4 @@ ENTRY(___mremap)
    j t9
    move ra, t0
    .set pop
-END(___mremap)
-.hidden ___mremap
+END(mremap)
--- a/libc/arch-mips64/syscalls/preadv.S
+++ b/libc/arch-mips64/syscalls/preadv.S
@ -1,27 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(preadv)
-    .set push
-    .set noreorder
-    li v0, __NR_preadv
-    syscall
-    bnez a3, 1f
-    move a0, v0
-    j ra
-    nop
-1:
-    move t0, ra
-    bal     2f
-    nop
-2:
-    .cpsetup ra, t1, 2b
-    LA t9,__set_errno_internal
-    .cpreturn
-    j t9
-    move ra, t0
-    .set pop
-END(preadv)
-
-ALIAS_SYMBOL(preadv64, preadv)
--- a/libc/arch-mips64/syscalls/pwritev.S
+++ b/libc/arch-mips64/syscalls/pwritev.S
@ -1,27 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(pwritev)
-    .set push
-    .set noreorder
-    li v0, __NR_pwritev
-    syscall
-    bnez a3, 1f
-    move a0, v0
-    j ra
-    nop
-1:
-    move t0, ra
-    bal     2f
-    nop
-2:
-    .cpsetup ra, t1, 2b
-    LA t9,__set_errno_internal
-    .cpreturn
-    j t9
-    move ra, t0
-    .set pop
-END(pwritev)
-
-ALIAS_SYMBOL(pwritev64, pwritev)
--- a/libc/arch-x86/atom/atom.mk
+++ b/libc/arch-x86/atom/atom.mk
@ -1,27 +1,32 @@
 libc_bionic_src_files_x86 += \
    arch-x86/atom/string/sse2-bzero-atom.S \
+    arch-x86/atom/string/sse2-memchr-atom.S \
+    arch-x86/atom/string/sse2-memrchr-atom.S \
    arch-x86/atom/string/sse2-memset-atom.S \
+    arch-x86/atom/string/sse2-strchr-atom.S \
    arch-x86/atom/string/sse2-strlen-atom.S \
+    arch-x86/atom/string/sse2-strnlen-atom.S \
+    arch-x86/atom/string/sse2-strrchr-atom.S \
+    arch-x86/atom/string/sse2-wcschr-atom.S \
+    arch-x86/atom/string/sse2-wcsrchr-atom.S \
+    arch-x86/atom/string/sse2-wcslen-atom.S \
+    arch-x86/atom/string/sse2-wcscmp-atom.S \
    arch-x86/atom/string/ssse3-bcopy-atom.S \
    arch-x86/atom/string/ssse3-memcmp-atom.S \
    arch-x86/atom/string/ssse3-memcpy-atom.S \
    arch-x86/atom/string/ssse3-memmove-atom.S \
+    arch-x86/atom/string/ssse3-strcat-atom.S \
+    arch-x86/atom/string/ssse3-strcmp-atom.S \
    arch-x86/atom/string/ssse3-strcpy-atom.S \
+    arch-x86/atom/string/ssse3-strlcat-atom.S \
+    arch-x86/atom/string/ssse3-strlcpy-atom.S \
+    arch-x86/atom/string/ssse3-strncat-atom.S \
+    arch-x86/atom/string/ssse3-strncmp-atom.S \
    arch-x86/atom/string/ssse3-strncpy-atom.S \
+    arch-x86/atom/string/ssse3-wcscat-atom.S \
+    arch-x86/atom/string/ssse3-wcscpy-atom.S \
    arch-x86/atom/string/ssse3-wmemcmp-atom.S

-libc_bionic_src_files_exclude_x86 += \
-    arch-x86/generic/string/memcmp.S \
-
-libc_bionic_src_files_exclude_x86 += \
-    arch-x86/silvermont/string/sse2-bcopy-slm.S \
-    arch-x86/silvermont/string/sse2-bzero-slm.S \
-    arch-x86/silvermont/string/sse2-memcpy-slm.S \
-    arch-x86/silvermont/string/sse2-memmove-slm.S \
-    arch-x86/silvermont/string/sse2-memset-slm.S \
-    arch-x86/silvermont/string/sse2-strcpy-slm.S \
-    arch-x86/silvermont/string/sse2-strlen-slm.S \
-    arch-x86/silvermont/string/sse2-strncpy-slm.S \
-
-libc_freebsd_src_files_exclude_x86 += \
-    upstream-freebsd/lib/libc/string/wmemcmp.c \
+libc_bionic_src_files_x86 += \
+    arch-x86/silvermont/string/sse2-stpcpy-slm.S \
+    arch-x86/silvermont/string/sse2-stpncpy-slm.S
--- a/libc/arch-x86/bionic/setjmp.S
+++ b/libc/arch-x86/bionic/setjmp.S
@ -41,49 +41,30 @@
 #define _JB_SIGMASK 6
 #define _JB_SIGFLAG 7

-.macro m_mangle_registers reg
-  xorl \reg,%edx
-  xorl \reg,%ebx
-  xorl \reg,%esp
-  xorl \reg,%ebp
-  xorl \reg,%esi
-  xorl \reg,%edi
-.endm
-
-.macro m_unmangle_registers reg
-  m_mangle_registers \reg
-.endm
-
 ENTRY(setjmp)
  movl 4(%esp),%ecx
-  mov $1,%eax
-  jmp .L_sigsetjmp
+  movl $1,(_JB_SIGFLAG * 4)(%ecx)
+  jmp .L_sigsetjmp_signal_mask
 END(setjmp)

 ENTRY(_setjmp)
  movl 4(%esp),%ecx
-  movl $0,%eax
-  jmp .L_sigsetjmp
+  movl $0,(_JB_SIGFLAG * 4)(%ecx)
+  jmp .L_sigsetjmp_no_signal_mask
 END(_setjmp)

 ENTRY(sigsetjmp)
  movl 4(%esp),%ecx
  movl 8(%esp),%eax

-.L_sigsetjmp:
-  PIC_PROLOGUE
-  pushl %eax
-  call PIC_PLT(__bionic_setjmp_cookie_get)
-  addl $4,%esp
-  PIC_EPILOGUE
-
-  // Record the setjmp cookie and whether or not we're saving the signal mask.
+  // Record whether or not the signal mask is valid.
  movl %eax,(_JB_SIGFLAG * 4)(%ecx)

  // Do we need to save the signal mask?
-  testl $1,%eax
+  testl %eax,%eax
  jz 1f

+.L_sigsetjmp_signal_mask:
  // Get the current signal mask.
  PIC_PROLOGUE
  pushl $0
@ -95,21 +76,16 @@ ENTRY(sigsetjmp)
  movl 4(%esp),%ecx
  movl %eax,(_JB_SIGMASK * 4)(%ecx)

+.L_sigsetjmp_no_signal_mask:
 1:
-  // Fetch the setjmp cookie and clear the signal flag bit.
-  movl (_JB_SIGFLAG * 4)(%ecx),%eax
-  andl $-2,%eax
-
  // Save the callee-save registers.
  movl 0(%esp),%edx
-  m_mangle_registers %eax
  movl %edx,(_JB_EDX * 4)(%ecx)
  movl %ebx,(_JB_EBX * 4)(%ecx)
  movl %esp,(_JB_ESP * 4)(%ecx)
  movl %ebp,(_JB_EBP * 4)(%ecx)
  movl %esi,(_JB_ESI * 4)(%ecx)
  movl %edi,(_JB_EDI * 4)(%ecx)
-  m_unmangle_registers %eax

  xorl %eax,%eax
  ret
@ -118,8 +94,7 @@ END(sigsetjmp)
 ENTRY(siglongjmp)
  // Do we have a signal mask to restore?
  movl 4(%esp),%edx
-  movl (_JB_SIGFLAG * 4)(%edx), %eax
-  testl $1,%eax
+  cmpl $0,(_JB_SIGFLAG * 4)(%edx)
  jz 1f

  // Restore the signal mask.
@ -133,31 +108,12 @@ ENTRY(siglongjmp)
  // Restore the callee-save registers.
  movl 4(%esp),%edx
  movl 8(%esp),%eax
-
-  movl (_JB_SIGFLAG * 4)(%edx),%ecx
-  andl $-2,%ecx
-
-  movl %ecx,%ebx
-  movl %ecx,%esp
-  movl %ecx,%ebp
-  movl %ecx,%esi
-  movl %ecx,%edi
-  xorl (_JB_EDX * 4)(%edx),%ecx
-  xorl (_JB_EBX * 4)(%edx),%ebx
-  xorl (_JB_ESP * 4)(%edx),%esp
-  xorl (_JB_EBP * 4)(%edx),%ebp
-  xorl (_JB_ESI * 4)(%edx),%esi
-  xorl (_JB_EDI * 4)(%edx),%edi
-
-  PIC_PROLOGUE
-  pushl %eax
-  pushl %ecx
-  pushl (_JB_SIGFLAG * 4)(%edx)
-  call PIC_PLT(__bionic_setjmp_cookie_check)
-  addl $4,%esp
-  popl %ecx
-  popl %eax
-  PIC_EPILOGUE
+  movl (_JB_EDX * 4)(%edx),%ecx
+  movl (_JB_EBX * 4)(%edx),%ebx
+  movl (_JB_ESP * 4)(%edx),%esp
+  movl (_JB_EBP * 4)(%edx),%ebp
+  movl (_JB_ESI * 4)(%edx),%esi
+  movl (_JB_EDI * 4)(%edx),%edi

  testl %eax,%eax
  jnz 2f
--- a/libc/arch-x86/bionic/vfork.S
+++ b/libc/arch-x86/bionic/vfork.S
@ -34,12 +34,6 @@ ENTRY(vfork)
  popl    %ecx  // Grab the return address.
  .cfi_adjust_cfa_offset 4
  .cfi_rel_offset ecx, 0
-
-  // __get_tls()[TLS_SLOT_THREAD_ID]->cached_pid_ = 0
-  movl    %gs:0, %eax
-  movl    4(%eax), %eax
-  movl    $0, 12(%eax)
-
  movl    $__NR_vfork, %eax
  int     $0x80
  cmpl    $-MAX_ERRNO, %eax
--- a/libc/arch-x86/generic/generic.mk
+++ b/libc/arch-x86/generic/generic.mk
@ -0,0 +1,52 @@
+libc_bionic_src_files_x86 += \
+    arch-x86/atom/string/sse2-memchr-atom.S \
+    arch-x86/atom/string/sse2-memrchr-atom.S \
+    arch-x86/atom/string/sse2-strchr-atom.S \
+    arch-x86/atom/string/sse2-strnlen-atom.S \
+    arch-x86/atom/string/sse2-strrchr-atom.S \
+    arch-x86/atom/string/sse2-wcschr-atom.S \
+    arch-x86/atom/string/sse2-wcsrchr-atom.S \
+    arch-x86/atom/string/sse2-wcslen-atom.S \
+    arch-x86/atom/string/sse2-wcscmp-atom.S \
+    arch-x86/silvermont/string/sse2-bcopy-slm.S \
+    arch-x86/silvermont/string/sse2-bzero-slm.S \
+    arch-x86/silvermont/string/sse2-memcpy-slm.S \
+    arch-x86/silvermont/string/sse2-memmove-slm.S \
+    arch-x86/silvermont/string/sse2-memset-slm.S \
+    arch-x86/silvermont/string/sse2-stpcpy-slm.S \
+    arch-x86/silvermont/string/sse2-stpncpy-slm.S \
+    arch-x86/silvermont/string/sse2-strcpy-slm.S \
+    arch-x86/silvermont/string/sse2-strlen-slm.S \
+    arch-x86/silvermont/string/sse2-strncpy-slm.S
+
+ifeq ($(ARCH_X86_HAVE_SSSE3),true)
+libc_bionic_src_files_x86 += \
+    arch-x86/atom/string/ssse3-strncat-atom.S \
+    arch-x86/atom/string/ssse3-strlcat-atom.S \
+    arch-x86/atom/string/ssse3-strlcpy-atom.S \
+    arch-x86/atom/string/ssse3-strcmp-atom.S \
+    arch-x86/atom/string/ssse3-strncmp-atom.S \
+    arch-x86/atom/string/ssse3-strcat-atom.S \
+    arch-x86/atom/string/ssse3-wcscat-atom.S \
+    arch-x86/atom/string/ssse3-wcscpy-atom.S
+else
+libc_bionic_src_files_x86 += \
+    arch-x86/generic/string/strcmp.S \
+    arch-x86/generic/string/strncmp.S \
+    arch-x86/generic/string/strcat.S \
+    upstream-freebsd/lib/libc/string/wcscpy.c \
+    upstream-freebsd/lib/libc/string/wcscat.c \
+    upstream-openbsd/lib/libc/string/strlcat.c \
+    upstream-openbsd/lib/libc/string/strlcpy.c \
+    upstream-openbsd/lib/libc/string/strncat.c
+endif
+
+ifeq ($(ARCH_X86_HAVE_SSE4),true)
+ libc_bionic_src_files_x86 += \
+    arch-x86/silvermont/string/sse4-memcmp-slm.S \
+    arch-x86/silvermont/string/sse4-wmemcmp-slm.S
+else
+libc_bionic_src_files_x86 += \
+    arch-x86/generic/string/memcmp.S \
+    upstream-freebsd/lib/libc/string/wmemcmp.c
+endif
--- a/libc/arch-x86/silvermont/silvermont.mk
+++ b/libc/arch-x86/silvermont/silvermont.mk
@ -0,0 +1,32 @@
+libc_bionic_src_files_x86 += \
+    arch-x86/silvermont/string/sse2-bcopy-slm.S \
+    arch-x86/silvermont/string/sse2-bzero-slm.S \
+    arch-x86/silvermont/string/sse2-memcpy-slm.S \
+    arch-x86/silvermont/string/sse2-memmove-slm.S \
+    arch-x86/silvermont/string/sse2-memset-slm.S \
+    arch-x86/silvermont/string/sse2-stpcpy-slm.S \
+    arch-x86/silvermont/string/sse2-stpncpy-slm.S \
+    arch-x86/silvermont/string/sse2-strcpy-slm.S \
+    arch-x86/silvermont/string/sse2-strlen-slm.S \
+    arch-x86/silvermont/string/sse2-strncpy-slm.S \
+    arch-x86/silvermont/string/sse4-memcmp-slm.S \
+    arch-x86/silvermont/string/sse4-wmemcmp-slm.S
+
+libc_bionic_src_files_x86 += \
+    arch-x86/atom/string/sse2-memchr-atom.S \
+    arch-x86/atom/string/sse2-memrchr-atom.S \
+    arch-x86/atom/string/sse2-strchr-atom.S \
+    arch-x86/atom/string/sse2-strrchr-atom.S \
+    arch-x86/atom/string/sse2-strnlen-atom.S \
+    arch-x86/atom/string/sse2-wcschr-atom.S \
+    arch-x86/atom/string/sse2-wcsrchr-atom.S \
+    arch-x86/atom/string/sse2-wcslen-atom.S \
+    arch-x86/atom/string/sse2-wcscmp-atom.S \
+    arch-x86/atom/string/ssse3-strncat-atom.S \
+    arch-x86/atom/string/ssse3-strlcat-atom.S \
+    arch-x86/atom/string/ssse3-strlcpy-atom.S \
+    arch-x86/atom/string/ssse3-strcmp-atom.S \
+    arch-x86/atom/string/ssse3-strncmp-atom.S \
+    arch-x86/atom/string/ssse3-strcat-atom.S \
+    arch-x86/atom/string/ssse3-wcscat-atom.S \
+    arch-x86/atom/string/ssse3-wcscpy-atom.S
--- a/libc/arch-x86/syscalls/__preadv64.S
+++ b/libc/arch-x86/syscalls/__preadv64.S
@ -1,41 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(__preadv64)
-    pushl   %ebx
-    .cfi_def_cfa_offset 8
-    .cfi_rel_offset ebx, 0
-    pushl   %ecx
-    .cfi_adjust_cfa_offset 4
-    .cfi_rel_offset ecx, 0
-    pushl   %edx
-    .cfi_adjust_cfa_offset 4
-    .cfi_rel_offset edx, 0
-    pushl   %esi
-    .cfi_adjust_cfa_offset 4
-    .cfi_rel_offset esi, 0
-    pushl   %edi
-    .cfi_adjust_cfa_offset 4
-    .cfi_rel_offset edi, 0
-    mov     24(%esp), %ebx
-    mov     28(%esp), %ecx
-    mov     32(%esp), %edx
-    mov     36(%esp), %esi
-    mov     40(%esp), %edi
-    movl    $__NR_preadv, %eax
-    int     $0x80
-    cmpl    $-MAX_ERRNO, %eax
-    jb      1f
-    negl    %eax
-    pushl   %eax
-    call    __set_errno_internal
-    addl    $4, %esp
-1:
-    popl    %edi
-    popl    %esi
-    popl    %edx
-    popl    %ecx
-    popl    %ebx
-    ret
-END(__preadv64)
--- a/libc/arch-x86/syscalls/__pwritev64.S
+++ b/libc/arch-x86/syscalls/__pwritev64.S
@ -1,41 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-ENTRY(__pwritev64)
-    pushl   %ebx
-    .cfi_def_cfa_offset 8
-    .cfi_rel_offset ebx, 0
-    pushl   %ecx
-    .cfi_adjust_cfa_offset 4
-    .cfi_rel_offset ecx, 0
-    pushl   %edx
-    .cfi_adjust_cfa_offset 4
-    .cfi_rel_offset edx, 0
-    pushl   %esi
-    .cfi_adjust_cfa_offset 4
-    .cfi_rel_offset esi, 0
-    pushl   %edi
-    .cfi_adjust_cfa_offset 4
-    .cfi_rel_offset edi, 0
-    mov     24(%esp), %ebx
-    mov     28(%esp), %ecx
-    mov     32(%esp), %edx
-    mov     36(%esp), %esi
-    mov     40(%esp), %edi
-    movl    $__NR_pwritev, %eax
-    int     $0x80
-    cmpl    $-MAX_ERRNO, %eax
-    jb      1f
-    negl    %eax
-    pushl   %eax
-    call    __set_errno_internal
-    addl    $4, %esp
-1:
-    popl    %edi
-    popl    %esi
-    popl    %edx
-    popl    %ecx
-    popl    %ebx
-    ret
-END(__pwritev64)
--- a/libc/arch-x86/syscalls/__clock_gettime.S
+++ b/libc/arch-x86/syscalls/__clock_gettime.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(__clock_gettime)
+ENTRY(clock_gettime)
    pushl   %ebx
    .cfi_def_cfa_offset 8
    .cfi_rel_offset ebx, 0
@ -23,4 +23,4 @@ ENTRY(__clock_gettime)
    popl    %ecx
    popl    %ebx
    ret
-END(__clock_gettime)
+END(clock_gettime)
--- a/libc/arch-x86/syscalls/___flistxattr.S
+++ b/libc/arch-x86/syscalls/___flistxattr.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___flistxattr)
+ENTRY(flistxattr)
    pushl   %ebx
    .cfi_def_cfa_offset 8
    .cfi_rel_offset ebx, 0
@ -28,5 +28,4 @@ ENTRY(___flistxattr)
    popl    %ecx
    popl    %ebx
    ret
-END(___flistxattr)
-.hidden ___flistxattr
+END(flistxattr)
--- a/libc/arch-x86/syscalls/__gettimeofday.S
+++ b/libc/arch-x86/syscalls/__gettimeofday.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(__gettimeofday)
+ENTRY(gettimeofday)
    pushl   %ebx
    .cfi_def_cfa_offset 8
    .cfi_rel_offset ebx, 0
@ -23,4 +23,4 @@ ENTRY(__gettimeofday)
    popl    %ecx
    popl    %ebx
    ret
-END(__gettimeofday)
+END(gettimeofday)
--- a/libc/arch-x86/syscalls/___mremap.S
+++ b/libc/arch-x86/syscalls/___mremap.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___mremap)
+ENTRY(mremap)
    pushl   %ebx
    .cfi_def_cfa_offset 8
    .cfi_rel_offset ebx, 0
@ -15,14 +15,10 @@ ENTRY(___mremap)
    pushl   %esi
    .cfi_adjust_cfa_offset 4
    .cfi_rel_offset esi, 0
-    pushl   %edi
-    .cfi_adjust_cfa_offset 4
-    .cfi_rel_offset edi, 0
-    mov     24(%esp), %ebx
-    mov     28(%esp), %ecx
-    mov     32(%esp), %edx
-    mov     36(%esp), %esi
-    mov     40(%esp), %edi
+    mov     20(%esp), %ebx
+    mov     24(%esp), %ecx
+    mov     28(%esp), %edx
+    mov     32(%esp), %esi
    movl    $__NR_mremap, %eax
    int     $0x80
    cmpl    $-MAX_ERRNO, %eax
@ -32,11 +28,9 @@ ENTRY(___mremap)
    call    __set_errno_internal
    addl    $4, %esp
 1:
-    popl    %edi
    popl    %esi
    popl    %edx
    popl    %ecx
    popl    %ebx
    ret
-END(___mremap)
-.hidden ___mremap
+END(mremap)
--- a/libc/arch-x86/x86.mk
+++ b/libc/arch-x86/x86.mk
@ -1,103 +1,17 @@
 # 32-bit x86.

 #
-# Generic x86 optimizations, may be overriden by CPU variants.
+# Default implementations of functions that are commonly optimized.
 #

-libc_bionic_src_files_x86 += \
-    arch-x86/atom/string/sse2-memchr-atom.S \
-    arch-x86/atom/string/sse2-memrchr-atom.S \
-    arch-x86/atom/string/sse2-strchr-atom.S \
-    arch-x86/atom/string/sse2-strnlen-atom.S \
-    arch-x86/atom/string/sse2-strrchr-atom.S \
-    arch-x86/atom/string/sse2-wcschr-atom.S \
-    arch-x86/atom/string/sse2-wcsrchr-atom.S \
-    arch-x86/atom/string/sse2-wcslen-atom.S \
-    arch-x86/atom/string/sse2-wcscmp-atom.S \
-    arch-x86/silvermont/string/sse2-bcopy-slm.S \
-    arch-x86/silvermont/string/sse2-bzero-slm.S \
-    arch-x86/silvermont/string/sse2-memcpy-slm.S \
-    arch-x86/silvermont/string/sse2-memmove-slm.S \
-    arch-x86/silvermont/string/sse2-memset-slm.S \
-    arch-x86/silvermont/string/sse2-stpcpy-slm.S \
-    arch-x86/silvermont/string/sse2-stpncpy-slm.S \
-    arch-x86/silvermont/string/sse2-strcpy-slm.S \
-    arch-x86/silvermont/string/sse2-strlen-slm.S \
-    arch-x86/silvermont/string/sse2-strncpy-slm.S
+libc_common_src_files_x86 += \
+    bionic/__memcpy_chk.cpp \
+    bionic/__memset_chk.cpp \
+    bionic/__strcpy_chk.cpp \
+    bionic/__strcat_chk.cpp \

-libc_bionic_src_files_x86 += \
-    arch-x86/generic/string/memcmp.S \
-    arch-x86/generic/string/strcmp.S \
-    arch-x86/generic/string/strncmp.S \
-    arch-x86/generic/string/strcat.S
-
-ifeq ($(ARCH_X86_HAVE_SSSE3),true)
-libc_bionic_src_files_x86 += \
-    arch-x86/atom/string/ssse3-strncat-atom.S \
-    arch-x86/atom/string/ssse3-strlcat-atom.S \
-    arch-x86/atom/string/ssse3-strlcpy-atom.S \
-    arch-x86/atom/string/ssse3-strcmp-atom.S \
-    arch-x86/atom/string/ssse3-strncmp-atom.S \
-    arch-x86/atom/string/ssse3-strcat-atom.S \
-    arch-x86/atom/string/ssse3-wcscat-atom.S \
-    arch-x86/atom/string/ssse3-wcscpy-atom.S
-libc_bionic_src_files_exclude_x86 += \
-    arch-x86/generic/string/strcmp.S \
-    arch-x86/generic/string/strncmp.S \
-    arch-x86/generic/string/strcat.S
-endif
-
-ifeq ($(ARCH_X86_HAVE_SSE4),true)
-libc_bionic_src_files_x86 += \
-    arch-x86/silvermont/string/sse4-memcmp-slm.S \
-    arch-x86/silvermont/string/sse4-wmemcmp-slm.S
-libc_bionic_src_files_exclude_x86 += \
-    arch-x86/generic/string/memcmp.S
-endif
-
-#
-# Remove default implementations that we have optimized versions of.
-#
-
-libc_freebsd_src_files_exclude_x86 += \
-    upstream-freebsd/lib/libc/string/wcschr.c \
-    upstream-freebsd/lib/libc/string/wcscmp.c \
-    upstream-freebsd/lib/libc/string/wcslen.c \
-    upstream-freebsd/lib/libc/string/wcsrchr.c \
-
-ifeq ($(ARCH_X86_HAVE_SSSE3),true)
-libc_freebsd_src_files_exclude_x86 += \
-    upstream-freebsd/lib/libc/string/wcscat.c \
-    upstream-freebsd/lib/libc/string/wcscpy.c
-endif
-
-ifeq ($(ARCH_X86_HAVE_SSE4),true)
-libc_freebsd_src_files_exclude_x86 += \
-    upstream-freebsd/lib/libc/string/wmemcmp.c
-endif
-
-libc_openbsd_src_files_exclude_x86 += \
-    upstream-openbsd/lib/libc/string/memchr.c \
-    upstream-openbsd/lib/libc/string/memmove.c \
-    upstream-openbsd/lib/libc/string/memrchr.c \
-    upstream-openbsd/lib/libc/string/stpcpy.c \
-    upstream-openbsd/lib/libc/string/stpncpy.c \
-    upstream-openbsd/lib/libc/string/strcat.c \
-    upstream-openbsd/lib/libc/string/strcpy.c \
-    upstream-openbsd/lib/libc/string/strncmp.c \
-    upstream-openbsd/lib/libc/string/strncpy.c \
-
-ifeq ($(ARCH_X86_HAVE_SSSE3),true)
-libc_openbsd_src_files_exclude_x86 += \
-    upstream-openbsd/lib/libc/string/strlcat.c \
-    upstream-openbsd/lib/libc/string/strlcpy.c \
-    upstream-openbsd/lib/libc/string/strncat.c
-endif
-
-libc_bionic_src_files_exclude_x86 += \
-    bionic/strchr.cpp \
-    bionic/strnlen.c \
-    bionic/strrchr.cpp \
+libc_freebsd_src_files_x86 += \
+    upstream-freebsd/lib/libc/string/wmemmove.c \

 #
 # Inherently architecture-specific functions.
@ -109,20 +23,19 @@ libc_bionic_src_files_x86 += \
    arch-x86/bionic/libgcc_compat.c \
    arch-x86/bionic/__restore.S \
    arch-x86/bionic/setjmp.S \
+    arch-x86/bionic/__set_tls.c \
    arch-x86/bionic/syscall.S \
    arch-x86/bionic/vfork.S \

 ## ARCH variant specific source files
 arch_variant_mk := $(LOCAL_PATH)/arch-x86/$(TARGET_ARCH_VARIANT)/$(TARGET_ARCH_VARIANT).mk
 ifeq ($(wildcard $(arch_variant_mk)),)
-    arch_variant_mk :=
+    arch_variant_mk := $(LOCAL_PATH)/arch-x86/generic/generic.mk
 endif
-ifneq ($(arch_variant_mk),)
 include $(arch_variant_mk)
 libc_common_additional_dependencies += $(arch_variant_mk)

 arch_variant_mk :=
-endif

 libc_crt_target_cflags_x86 := \
    -m32 \
--- a/libc/arch-x86_64/bionic/setjmp.S
+++ b/libc/arch-x86_64/bionic/setjmp.S
@ -50,25 +50,6 @@
 #define _JB_SIGMASK 9
 #define _JB_SIGMASK_RT 10 // sigprocmask will write here too.

-#define MANGLE_REGISTERS 1
-.macro m_mangle_registers reg
-#if MANGLE_REGISTERS
-  xorq \reg,%rbx
-  xorq \reg,%rbp
-  xorq \reg,%r12
-  xorq \reg,%r13
-  xorq \reg,%r14
-  xorq \reg,%r15
-  xorq \reg,%rsp
-  xorq \reg,%r11
-#endif
-.endm
-
-.macro m_unmangle_registers reg
-  m_mangle_registers \reg
-.endm
-
-
 ENTRY(setjmp)
  movl $1,%esi
  jmp PIC_PLT(sigsetjmp)
@ -81,17 +62,11 @@ END(_setjmp)

 // int sigsetjmp(sigjmp_buf env, int save_signal_mask);
 ENTRY(sigsetjmp)
-  pushq %rdi
-  movq %rsi,%rdi
-  call PIC_PLT(__bionic_setjmp_cookie_get)
-  popq %rdi
-
-  // Record setjmp cookie and whether or not we're saving the signal mask.
-  movq %rax,(_JB_SIGFLAG * 8)(%rdi)
-  pushq %rax
+  // Record whether or not we're saving the signal mask.
+  movl %esi,(_JB_SIGFLAG * 8)(%rdi)

  // Do we need to save the signal mask?
-  testq $1,%rax
+  testl %esi,%esi
  jz 2f

  // Save current signal mask.
@ -104,10 +79,7 @@ ENTRY(sigsetjmp)

 2:
  // Save the callee-save registers.
-  popq %rax
-  andq $-2,%rax
  movq (%rsp),%r11
-  m_mangle_registers %rax
  movq %rbx,(_JB_RBX * 8)(%rdi)
  movq %rbp,(_JB_RBP * 8)(%rdi)
  movq %r12,(_JB_R12 * 8)(%rdi)
@ -116,7 +88,6 @@ ENTRY(sigsetjmp)
  movq %r15,(_JB_R15 * 8)(%rdi)
  movq %rsp,(_JB_RSP * 8)(%rdi)
  movq %r11,(_JB_PC  * 8)(%rdi)
-  m_unmangle_registers %rax

  xorl %eax,%eax
  ret
@ -128,9 +99,7 @@ ENTRY(siglongjmp)
  pushq %rsi // Push 'value'.

  // Do we need to restore the signal mask?
-  movq (_JB_SIGFLAG * 8)(%rdi), %rdi
-  pushq %rdi // Push cookie
-  testq $1, %rdi
+  cmpl $0,(_JB_SIGFLAG * 8)(%rdi)
  jz 2f

  // Restore the signal mask.
@ -140,10 +109,6 @@ ENTRY(siglongjmp)
  call PIC_PLT(sigprocmask)

 2:
-  // Fetch the setjmp cookie and clear the signal flag bit.
-  popq %rcx
-  andq $-2, %rcx
-
  popq %rax // Pop 'value'.

  // Restore the callee-save registers.
@ -155,17 +120,7 @@ ENTRY(siglongjmp)
  movq (_JB_RSP * 8)(%r12),%rsp
  movq (_JB_PC  * 8)(%r12),%r11
  movq (_JB_R12 * 8)(%r12),%r12
-  m_unmangle_registers %rcx

-  // Check the cookie.
-  pushq %rax
-  pushq %r11
-  movq %rcx, %rdi
-  call PIC_PLT(__bionic_setjmp_cookie_check)
-  popq %r11
-  popq %rax
-
-  // Return 1 if value is 0.
  testl %eax,%eax
  jnz 1f
  incl %eax
--- a/libc/arch-x86_64/bionic/vfork.S
+++ b/libc/arch-x86_64/bionic/vfork.S
@ -32,12 +32,6 @@

 ENTRY(vfork)
  popq    %rdi  // Grab the return address.
-
-  // __get_tls()[TLS_SLOT_THREAD_ID]->cached_pid_ = 0
-  mov    %fs:0, %rax
-  mov    8(%rax), %rax
-  movl   $0, 20(%rax)
-
  movl    $__NR_vfork, %eax
  syscall
  pushq   %rdi  // Restore the return address.
--- a/libc/arch-x86_64/string/sse2-memmove-slm.S
+++ b/libc/arch-x86_64/string/sse2-memmove-slm.S
@ -91,6 +91,9 @@ name:		\
 	.section .text.sse2,"ax",@progbits
 ENTRY (MEMMOVE)
 	ENTRANCE
+#ifdef USE_AS_BCOPY
+	xchg	%rsi, %rdi
+#endif
 	mov	%rdi, %rax

 /* Check whether we should copy backward or forward.  */
--- a/libc/arch-x86_64/syscalls/___flistxattr.S
+++ b/libc/arch-x86_64/syscalls/___flistxattr.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___flistxattr)
+ENTRY(flistxattr)
    movl    $__NR_flistxattr, %eax
    syscall
    cmpq    $-MAX_ERRNO, %rax
@ -12,5 +12,4 @@ ENTRY(___flistxattr)
    call    __set_errno_internal
 1:
    ret
-END(___flistxattr)
-.hidden ___flistxattr
+END(flistxattr)
--- a/libc/arch-x86_64/syscalls/___mremap.S
+++ b/libc/arch-x86_64/syscalls/___mremap.S
@ -2,7 +2,7 @@

 #include <private/bionic_asm.h>

-ENTRY(___mremap)
+ENTRY(mremap)
    movq    %rcx, %r10
    movl    $__NR_mremap, %eax
    syscall
@ -13,5 +13,4 @@ ENTRY(___mremap)
    call    __set_errno_internal
 1:
    ret
-END(___mremap)
-.hidden ___mremap
+END(mremap)
--- a/Show More
+++ b/Show More
				`@ -0,0 +1 @@`
				`include bionic/libc/arch-arm64/generic/generic.mk`