update video/dsscomp.h

Change-Id: I9da47f7fb7f34f9c4baa860bb767cb8fd4f8020c
Signed-off-by: Erik Gilling <konkers@android.com>

libc/arch-arm/bionic/atexit.S

@@ -37,16 +37,10 @@
 	.eabi_attribute 26, 2
 	.eabi_attribute 30, 4
 	.eabi_attribute 18, 4
-	.code	16
-	.section	.text.atexit,"ax",%progbits
-	.align	2
-	.global	atexit
 	.hidden	atexit
 	.code	16
 	.thumb_func
-	.type	atexit, %function
+ENTRY(atexit)
-atexit:
-	.fnstart
 .LFB0:
 	.save	{r4, lr}
 	push	{r4, lr}
@@ -64,6 +58,5 @@ atexit:
 .L3:
 	.word	__dso_handle-(.LPIC0+4)
 .LFE0:
-	.fnend
+END(atexit)
-	.size	atexit, .-atexit
 #endif

libc/arch-arm/bionic/memcpy.S

@@ -34,16 +34,11 @@
         .text
         .fpu    neon
 
-        .global memcpy
-        .type memcpy, %function
-        .align 4
-
 /* a prefetch distance of 4 cache-lines works best experimentally */
 #define CACHE_LINE_SIZE     64
 #define PREFETCH_DISTANCE   (CACHE_LINE_SIZE*4)
 
-memcpy:
+ENTRY(memcpy)
-        .fnstart
         .save       {r0, lr}
         stmfd       sp!, {r0, lr}
 

libc/arch-arm/bionic/strcmp.S

@@ -28,13 +28,10 @@
  */
 
 #include <machine/cpu-features.h>
+#include <machine/asm.h>
 
 	.text
 
-	.global strcmp
-	.type strcmp, %function
-	.align 4
-
 #ifdef __ARMEB__
 #define SHFT2LSB lsl
 #define SHFT2LSBEQ lsleq
@@ -54,8 +51,7 @@
 #define magic1(REG) REG
 #define magic2(REG) REG, lsl #7
 
-strcmp:
+ENTRY(strcmp)
-	.fnstart
 	PLD(r0, #0)
 	PLD(r1, #0)
 	eor	r2, r0, r1
@@ -136,7 +132,6 @@ strcmp:
 #endif
 	ldr	r4, [sp], #4
 	bx	lr
-	.fnend
 
 .Lstrcmp_unaligned:
 	wp1 .req r0
@@ -319,3 +314,4 @@ strcmp:
 	ldr	r4, [sp], #4
 	ldr	r5, [sp], #4
 	bx	lr
+END(strcmp)

libc/kernel/common/media/soc2030.h

@@ -22,10 +22,11 @@
 #define SOC2030_IOCTL_SET_EFFECT _IOWR('o', 6, unsigned int)
 #define SOC2030_IOCTL_SET_WHITEBALANCE _IOWR('o', 7, unsigned int)
 #define SOC2030_IOCTL_SET_EXP_COMP _IOWR('o', 8, int)
+#define SOC2030_IOCTL_SET_LOCK _IOWR('o', 9, struct soc2030_lock)
 
 #define SOC2030_POLL_WAITMS 50
 #define SOC2030_MAX_RETRIES 3
-#define SOC2030_POLL_RETRIES 5
+#define SOC2030_POLL_RETRIES 7
 
 #define SOC2030_MAX_PRIVATE_SIZE 1024
 #define SOC2030_MAX_NUM_MODES 6
@@ -45,8 +46,21 @@ enum {
  WRITE_VAR_DATA,
  POLL_VAR_DATA,
  DELAY_MS,
+ WRITE_REG_VAR1,
+ WRITE_REG_VAR2,
+ WRITE_REG_VAR3,
+ WRITE_REG_VAR4,
+ READ_REG_VAR1,
+ READ_REG_VAR2,
+ READ_REG_VAR3,
+ READ_REG_VAR4,
 };
 
+#define REG_VAR1 (READ_REG_VAR1 - READ_REG_VAR1)
+#define REG_VAR2 (READ_REG_VAR2 - READ_REG_VAR1)
+#define REG_VAR3 (READ_REG_VAR3 - READ_REG_VAR1)
+#define REG_VAR4 (READ_REG_VAR4 - READ_REG_VAR1)
+
 enum {
  EFFECT_NONE,
  EFFECT_BW,
@@ -74,6 +88,14 @@ struct soc2030_regs {
  __u16 val;
 };
 
+struct soc2030_lock {
+        __u8 aelock;
+        __u8 aerelock;
+        __u8 awblock;
+        __u8 awbrelock;
+        __u8 previewactive;
+};
+
 struct soc2030_mode {
  int xres;
  int yres;
@@ -82,5 +104,3 @@ struct soc2030_mode {
 };
 
 #endif
-
-

libc/kernel/common/video/dsscomp.h

@@ -228,129 +228,145 @@ enum omapdss_buffer_type {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  OMAP_DSS_BUFTYPE_TILER_PAGE,
 };
-struct dss2_ovl_info {
+enum omapdss_buffer_addressing_type {
- struct dss2_ovl_cfg cfg;
+ OMAP_DSS_BUFADDR_DIRECT,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ OMAP_DSS_BUFADDR_BYTYPE,
+ OMAP_DSS_BUFADDR_ION,
+ OMAP_DSS_BUFADDR_GRALLOC,
+ OMAP_DSS_BUFADDR_OVL_IX,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ OMAP_DSS_BUFADDR_LAYER_IX,
+ OMAP_DSS_BUFADDR_FB,
+};
+struct dss2_ovl_info {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ struct dss2_ovl_cfg cfg;
+ enum omapdss_buffer_addressing_type addressing;
  union {
  struct {
- void *address;
- __u16 ba_type;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
- __u16 uv_type;
+ void *address;
+ void *uv_address;
  };
  struct {
- __u32 ba;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ enum omapdss_buffer_type ba_type;
+ enum omapdss_buffer_type uv_type;
+ };
+ struct {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u32 ba;
  __u32 uv;
  };
  };
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct dss2_mgr_info {
  __u32 ix;
  __u32 default_color;
- enum omap_dss_trans_key_type trans_key_type;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ enum omap_dss_trans_key_type trans_key_type;
  __u32 trans_key;
  struct omap_dss_cpr_coefs cpr_coefs;
  __u8 trans_enabled;
- __u8 interlaced;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u8 interlaced;
  __u8 alpha_blending;
  __u8 cpr_enabled;
  __u8 swap_rb;
-} __attribute__ ((aligned(4)));
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+} __attribute__ ((aligned(4)));
 enum dsscomp_setup_mode {
  DSSCOMP_SETUP_MODE_APPLY = (1 << 0),
  DSSCOMP_SETUP_MODE_DISPLAY = (1 << 1),
- DSSCOMP_SETUP_MODE_CAPTURE = (1 << 2),
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ DSSCOMP_SETUP_MODE_CAPTURE = (1 << 2),
  DSSCOMP_SETUP_APPLY = DSSCOMP_SETUP_MODE_APPLY,
  DSSCOMP_SETUP_DISPLAY =
  DSSCOMP_SETUP_MODE_APPLY | DSSCOMP_SETUP_MODE_DISPLAY,
- DSSCOMP_SETUP_CAPTURE =
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ DSSCOMP_SETUP_CAPTURE =
  DSSCOMP_SETUP_MODE_APPLY | DSSCOMP_SETUP_MODE_CAPTURE,
  DSSCOMP_SETUP_DISPLAY_CAPTURE =
  DSSCOMP_SETUP_DISPLAY | DSSCOMP_SETUP_CAPTURE,
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 struct dsscomp_setup_mgr_data {
  __u32 sync_id;
  struct dss2_rect_t win;
- enum dsscomp_setup_mode mode;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ enum dsscomp_setup_mode mode;
  __u16 num_ovls;
  __u16 get_sync_obj;
  struct dss2_mgr_info mgr;
- struct dss2_ovl_info ovls[0];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ struct dss2_ovl_info ovls[0];
 };
 struct dsscomp_check_ovl_data {
  enum dsscomp_setup_mode mode;
- struct dss2_mgr_info mgr;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ struct dss2_mgr_info mgr;
  struct dss2_ovl_info ovl;
 };
 struct dsscomp_setup_dispc_data {
- __u32 sync_id;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u32 sync_id;
  enum dsscomp_setup_mode mode;
  __u16 num_ovls;
  __u16 num_mgrs;
- __u16 get_sync_obj;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u16 get_sync_obj;
  struct dss2_mgr_info mgrs[3];
  struct dss2_ovl_info ovls[5];
 };
-struct dsscomp_wb_copy_data {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct dsscomp_wb_copy_data {
  struct dss2_ovl_info ovl, wb;
 };
 struct dsscomp_display_info {
- __u32 ix;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u32 ix;
  __u32 overlays_available;
  __u32 overlays_owned;
  enum omap_channel channel;
- enum omap_dss_display_state state;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ enum omap_dss_display_state state;
  __u8 enabled;
  struct omap_video_timings timings;
  struct s3d_disp_info s3d_info;
- struct dss2_mgr_info mgr;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ struct dss2_mgr_info mgr;
  __u16 width_in_mm;
  __u16 height_in_mm;
  __u32 modedb_len;
- struct dsscomp_videomode modedb[];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ struct dsscomp_videomode modedb[];
 };
 struct dsscomp_setup_display_data {
  __u32 ix;
- struct dsscomp_videomode mode;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ struct dsscomp_videomode mode;
 };
 enum dsscomp_wait_phase {
  DSSCOMP_WAIT_PROGRAMMED = 1,
- DSSCOMP_WAIT_DISPLAYED,
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ DSSCOMP_WAIT_DISPLAYED,
  DSSCOMP_WAIT_RELEASED,
 };
 struct dsscomp_wait_data {
- __u32 timeout_us;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u32 timeout_us;
  enum dsscomp_wait_phase phase;
 };
-#define DSSCOMP_SETUP_MGR _IOW('O', 128, struct dsscomp_setup_mgr_data)
+#define DSSCIOC_SETUP_MGR _IOW('O', 128, struct dsscomp_setup_mgr_data)
-#define DSSCOMP_CHECK_OVL _IOWR('O', 129, struct dsscomp_check_ovl_data)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define DSSCOMP_WB_COPY _IOW('O', 130, struct dsscomp_wb_copy_data)
+#define DSSCIOC_CHECK_OVL _IOWR('O', 129, struct dsscomp_check_ovl_data)
-#define DSSCOMP_QUERY_DISPLAY _IOWR('O', 131, struct dsscomp_display_info)
+#define DSSCIOC_WB_COPY _IOW('O', 130, struct dsscomp_wb_copy_data)
-#define DSSCOMP_WAIT _IOW('O', 132, struct dsscomp_wait_data)
+#define DSSCIOC_QUERY_DISPLAY _IOWR('O', 131, struct dsscomp_display_info)
-#define DSSCOMP_SETUP_DISPC _IOW('O', 133, struct dsscomp_setup_dispc_data)
+#define DSSCIOC_WAIT _IOW('O', 132, struct dsscomp_wait_data)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define DSSCOMP_SETUP_DISPLAY _IOW('O', 134, struct dsscomp_setup_display_data)
+#define DSSCIOC_SETUP_DISPC _IOW('O', 133, struct dsscomp_setup_dispc_data)
+#define DSSCIOC_SETUP_DISPLAY _IOW('O', 134, struct dsscomp_setup_display_data)
 #endif