Even though the control registers being read/written in fenv.c only
have 32 bits that are used, the instructions take a 64 bit register.
Make sure the inline assembler in the macros use 64 bit values.
Verified that before the change and after the change, the disassembly
is exactly the same.
In addition, add -Werror to the cflags.
Change-Id: I6603779327488c23e3aab13300edf2e02b101916
This patch fixes the ARM64 ABI for libm. fenv_t is now split in 32bit status
and 32bit control. This mirrors the AArch64 FPU control and status
registers (FPCR, FPSR).
The patch also refactors the libm implementation for ARM64 into a finer
grained control over the FPU registers.
Bionic-benchmarks has been expanded with 3 more benchmarks for floating
point operations. The new libm implementation for ARM64 performs better
over all the math benchmarks available.
Change-Id: I2a7f81d6b4e55c91f8a63a4c69614fc8b1bcf2db
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Factored out common declarations to include/fenv.h and pushed
the implementation to .c files.
Bug: 11050744
Change-Id: I446b13cc4bc599d328343a8d392b07de280f6304
