The defines HAVE_32_BYTE_CACHE_LINES and ARCH_ARM_USE_NON_NEON_MEMCPY
are not used by any code. The previous memcpy code that used these
has been split into different architecture versions to avoid the need
for them.
Bug: 8005082
Merge from internal master.
(cherry-picked from commit 6e1a5cf31b)
Change-Id: Ib18fc3f4131b21cdbd19b9dde7697ac25d066fcf
In the old code, the index was a file to itself, so it made sense to
read until you hit the end of the file. In the new code, the index is
followed by hundreds of KiB of data, so we need to just search the
index.
Bug: 8368791
Change-Id: Icf5f8b5516cf3a93679fa849c9f6cd1cb100e0f1
Move arch specific code for arm, mips, x86 into separate
makefiles.
In addition, add different arm cpu versions of memcpy/memset.
Bug: 8005082
Merge from internal master (acdde8c1cf).
Change-Id: I04f3d0715104fab618e1abf7cf8f7eec9bec79df
This uses the new strcmp.a15.S code as the basis for new versions
of strcmp.S.
The cortex-a15 code is the performance optimized version of strcmp.a15.S
taken with only the addition of a few pld instructions.
The cortex-a9 code is the same as the cortex-a15 code except that the
unaligned strcmp code was taken from the original strcmp.S.
The krait code is the same as the cortex-a15 code except that one path
in the unaligned strcmp code was taken from the original strcmp.S code
(the 2 byte overlap case).
The generic code is the original unmodified strmp.S from the bionic
subdirectory.
All three new versions underwent these test cases:
Strings the same, all same size:
- Both pointers double word aligned.
- One pointer double word aligned, one pointer word aligned.
- Both pointers word aligned.
- One pointer double word aligned, one pointer 1 off a word alignment.
- One pointer double word aligned, one pointer 2 off a word alignment.
- One pointer double word aligned, one pointer 3 off a word alignment.
- One pointer word aligned, one pointer 1 off a word alignment.
- One pointer word aligned, one pointer 2 off a word alignment.
- One pointer word aligned, one pointer 3 off a word alignment.
For all cases where it made sense, the two pointers were also tested
swapped.
Different strings, all same size:
- Single difference at double word boundary.
- Single difference at word boudary.
- Single difference at 1 off a word alignment.
- Single difference at 2 off a word alignment.
- Single difference at 3 off a word alignment.
Different sized strings, strings the same until the end:
- Shorter string ends on a double word boundary.
- Shorter string ends on word boundary.
- Shorter string ends at 1 off a word boundary.
- Shorter string ends at 2 off a word boundary.
- Shorter string ends at 3 off a word boundary.
For all different cases, run them through the same pointer alignment
cases when the strings are the same size.
For all cases the two pointers were also tested swapped.
Bug: 8005082
Change-Id: I5f3dc02b48afba2cb9c13332ab45c828ff171a1c
Normally, the C library implicitly caches your timezone by virtue
of the fact that the prehistoric API assumes a single timezone for
the entire process.
The unfortunate mktime_tz and localtime_tz extensions work around
this, but represent timezones as strings to their callers, so code
that makes heavy use of these needs a cache to be able to perform
acceptably until it can hopefully one day be rewritten to use
java.util.Calendar or icu4c.
Bug: 8270865
Change-Id: I92e3964e86dc33ceac925f819cc5e26ff4203f50
From the release notes:
Changes affecting current and future time stamps:
Haiti uses US daylight-saving rules this year, and presumably future years.
This changes time stamps starting today. (Thanks to Steffen Thorsen.)
Paraguay will end DST on March 24 this year.
(Thanks to Steffen Thorsen.) For now, assume it's just this year.
Morocco does not observe DST during Ramadan;
try to predict Ramadan in Morocco as best we can.
(Thanks to Erik Homoet for the heads-up.)
Change-Id: I98d5290ea5a1d9fb1eeddab1c9e72135dc9e4bd1
This gets us back to using vfork now our ARM vfork assembler stub is
fixed, and adds the missing thread safety for the 'pidlist'.
Bug: 5335385
Change-Id: Ib08bfa65b2cb9fa695717aae629ea14816bf988d
From the release notes:
Chile's 2013 rules, and we guess rules for 2014 and later, will be
the same as 2012, namely Apr Sun>=23 03:00 UTC to Sep Sun>=2 04:00 UTC.
(Thanks to Steffen Thorsen and Robert Elz.)
New Zones Asia/Khandyga, Asia/Ust-Nera, Europe/Busingen.
(Thanks to Tobias Conradi and Arthur David Olson.)
Change-Id: I351e04b3348420ad7df7c648963c235b534033d2
This is actually a slightly newer upstream version than the one I
originally pulled. Hopefully now it's in upstream-freebsd it will
be easier to track upstream, though I still need to sit down and
write the necessary scripts at some point.
Bug: 5110679
Change-Id: I87e563f0f95aa8e68b45578e2a8f448bbf827a33
The defines HAVE_32_BYTE_CACHE_LINES and ARCH_ARM_USE_NON_NEON_MEMCPY
are not used by any code. The previous memcpy code that used these
has been split into different architecture versions to avoid the need
for them.
Bug: 8005082
(cherry picked from commit 6e1a5cf31b)
Change-Id: I69654d47db1458136782b5504290f620e924ee75
Don't pull in unnecessary header files. AFAIK, I've fixed all
the code which didn't include the correct header files.
Change-Id: If0b7bba74e77cb24a0cf9ce8968aa07400855e58
The attached patch provides a new implementation of strcmp for ARM,
using LDRD instead of LDR whenever possible.
For older architectures that do not support LDRD, this implementation
uses the same algorithm as before.
Testing and benchmarking:
* Validation: successfully passes a test that compares different strings
of length 1-128 and offsets 0-8 from a word boundary. Checked on
qemu/A15/A9, ARM/Thumb mode, Big/Little Endian.
* Integration with gcc: no regression on qemu for arm-none-eabi --with-cpu
a15/a9 --with-mode arm/thumb.
Change-Id: I9e230e1b99dbdc9119b69ee858a89038c516a4ea
Signed-off-by: Vassilis Laganakos <vasileios.laganakos@arm.com>
The strategy for large block sizes is LDRD and STRD with offset addressing,
where the main loop copies 64 bytes in every iteration, (i.e., 8 calls to
LDRD and STRD pairs), interleaving load and stores (i.e., the pairs of LDRD
and STRD of the same data are consecutive instructions), and the writeback
of an updated address is a separate instruction, which allows us to write
back the accumulated update once per iteration.
This strategy is implemented in memcpy.S. In some configurations, a plain
version of memcpy (included from memcpy-stub.c) is used instead of the
optimized one.
Validation:
* Correctness: checked memcpy using a test harness for block sizes
ranging between 1 to 128, and source and destination buffers alignment
ranging in { 0,1,2,3,4,8,12 } bytes each.
* Performance: benchmarking on Cortex-A15 FPGA indicates that this strategy
is better for A15 than the strategy used by glibc and even slightly better
than using NEON. Benchmarking on Cortex-A9 bare metal and Linux shows
that the proposed strategy is reasonable: not as fast as the version of
memcpy from glibc (which is the best open source strategy for A9), but
comparable with csl and bionic.
* Integration with GCC: no regression for arm-none-eabi --with-cpu
cortex-a15 and cortex-a9.
Change-Id: Ied56354d8992c62ae3e02d582a2bd55585d814b9
Signed-off-by: Vassilis Laganakos <vasileios.laganakos@arm.com>
Move arch specific code for arm, mips, x86 into separate
makefiles.
In addition, add different arm cpu versions of memcpy/memset.
Bug: 8005082
(cherry picked from commit acdde8c1cf)
Change-Id: I0108d432af9f6283ae99adfc92a3399e5ab3e31d
Stricter input parameters help avoid ugly casting when passing
pointers to immutable protobuf data.
While at it: an int return was dropped from 2 functions whose users
never used the result; one of the return paths was returning an
uninitialized value.
Size_t for portablity and warning supression, misc warnings addressed.
Change-Id: I2d5cbdaf0c9b6c4621a7d397772da13da5dc0943
The defines HAVE_32_BYTE_CACHE_LINES and ARCH_ARM_USE_NON_NEON_MEMCPY
are not used by any code. The previous memcpy code that used these
has been split into different architecture versions to avoid the need
for them.
Bug: 8005082
Change-Id: I14e0368c5bb4c3a80e72520f7cfd97e359918cce
Move arch specific code for arm, mips, x86 into separate
makefiles.
In addition, add different arm cpu versions of memcpy/memset.
Bug: 8005082
Change-Id: I04f3d0715104fab618e1abf7cf8f7eec9bec79df
Per "man capset", sys/capability.h is the appropriate header file
for the capget / capset definition, not unistd.h. Fixed.
As a short term hack, continue to include sys/capability.h in
unistd.h, until we can fix all the code which uses capget / capset.
Change-Id: I6e7cf55955d761ca785a14c5e4b7a44125d8fc15
The old scandir implementation didn't take into account the varying
size of directory entries, and didn't correctly clean up on its
error exits.
Bug: 7339844
Change-Id: Ib40e3564709752241a3119a496cbb2192e3f9abe
