am ab537ae5: am 2e6c5fc4: Merge "Remove _flush_cache(2) for mips64."

* commit 'ab537ae574ba675d3b313c544f5cf5de0c6e77e7':
  Remove _flush_cache(2) for mips64.

libc/SYSCALLS.TXT

@@ -315,7 +315,7 @@ int     __set_tls:__ARM_NR_set_tls(void*)                                 arm
 int     cacheflush:__ARM_NR_cacheflush(long start, long end, long flags)  arm
 
 # MIPS-specific
-int     _flush_cache:cacheflush(char* addr, const int nbytes, const int op) mips,mips64
+int     _flush_cache:cacheflush(char* addr, const int nbytes, const int op) mips
 int     __set_tls:set_thread_area(void*) mips,mips64
 
 # x86-specific

libc/arch-mips64/syscalls/_flush_cache.S

@@ -1,27 +0,0 @@
-/* Generated by gensyscalls.py. Do not edit. */
-
-#include <private/bionic_asm.h>
-
-    .hidden __set_errno
-
-ENTRY(_flush_cache)
-    .set push
-    .set noreorder
-    li v0, __NR_cacheflush
-    syscall
-    bnez a3, 1f
-    move a0, v0
-    j ra
-    nop
-1:
-    move t0, ra
-    bal     2f
-    nop
-2:
-    .cpsetup ra, t1, 2b
-    LA t9,__set_errno
-    .cpreturn
-    j t9
-    move ra, t0
-    .set pop
-END(_flush_cache)

libc/include/sys/cachectl.h

@@ -31,6 +31,5 @@
 #ifdef __mips__
 #include <asm/cachectl.h>
 extern int __cachectl (void *addr, __const int nbytes, __const int op);
-extern int _flush_cache (char *addr, __const int nbytes, __const int op);
 #endif
 #endif /* sys/cachectl.h */