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Merge changes I2e8af44e,Ie9250a0e into jb-mr1-dev

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* changes:
  update msm_mdp.h header to support vsync
  update processed msm_camera.h and msm_isp.h
This commit is contained in:
Iliyan Malchev 2012-08-14 15:40:21 -07:00 committed by Android (Google) Code Review
commit df88d88f56
3 changed files with 578 additions and 482 deletions
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198
libc/kernel/common/linux/msm_mdp.h
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@ -37,236 +37,276 @@
#define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int) #define MSMFB_OVERLAY_UNSET _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, struct msmfb_overlay_data) #define MSMFB_OVERLAY_PLAY _IOW(MSMFB_IOCTL_MAGIC, 137, struct msmfb_overlay_data)
#define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY
#define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, struct mdp_page_protection) #define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, struct mdp_page_protection)
#define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, struct mdp_page_protection) #define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, struct mdp_page_protection)
#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, struct mdp_overlay)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSMFB_OVERLAY_GET _IOR(MSMFB_IOCTL_MAGIC, 140, struct mdp_overlay)
#define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int) #define MSMFB_OVERLAY_PLAY_ENABLE _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int)
#define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, struct msmfb_overlay_blt) #define MSMFB_OVERLAY_BLT _IOWR(MSMFB_IOCTL_MAGIC, 142, struct msmfb_overlay_blt)
#define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int) #define MSMFB_OVERLAY_BLT_OFFSET _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, struct mdp_histogram_start_req)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSMFB_HISTOGRAM_START _IOR(MSMFB_IOCTL_MAGIC, 144, struct mdp_histogram_start_req)
#define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int) #define MSMFB_HISTOGRAM_STOP _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
#define MSMFB_NOTIFY_UPDATE _IOW(MSMFB_IOCTL_MAGIC, 146, unsigned int) #define MSMFB_NOTIFY_UPDATE _IOW(MSMFB_IOCTL_MAGIC, 146, unsigned int)
#define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, struct msmfb_overlay_3d) #define MSMFB_OVERLAY_3D _IOWR(MSMFB_IOCTL_MAGIC, 147, struct msmfb_overlay_3d)
#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, struct msmfb_mixer_info_req)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, struct msmfb_mixer_info_req)
#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, struct msmfb_overlay_data) #define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, struct msmfb_overlay_data)
#define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150) #define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
#define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151) #define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151)
#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
#define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, struct msmfb_data) #define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, struct msmfb_data)
#define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, struct msmfb_data) #define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, struct msmfb_data)
#define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155) #define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
#define FB_TYPE_3D_PANEL 0x10101010 #define FB_TYPE_3D_PANEL 0x10101010
#define MDP_IMGTYPE2_START 0x10000 #define MDP_IMGTYPE2_START 0x10000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSMFB_DRIVER_VERSION 0xF9E8D701 #define MSMFB_DRIVER_VERSION 0xF9E8D701
enum { enum {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
NOTIFY_UPDATE_START, NOTIFY_UPDATE_START,
NOTIFY_UPDATE_STOP, NOTIFY_UPDATE_STOP,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
enum { enum {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_RGB_565, MDP_RGB_565,
MDP_XRGB_8888, MDP_XRGB_8888,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_Y_CBCR_H2V2, MDP_Y_CBCR_H2V2,
MDP_Y_CBCR_H2V2_ADRENO, MDP_Y_CBCR_H2V2_ADRENO,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_ARGB_8888, MDP_ARGB_8888,
MDP_RGB_888, MDP_RGB_888,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_Y_CRCB_H2V2, MDP_Y_CRCB_H2V2,
MDP_YCRYCB_H2V1, MDP_YCRYCB_H2V1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_Y_CRCB_H2V1, MDP_Y_CRCB_H2V1,
MDP_Y_CBCR_H2V1, MDP_Y_CBCR_H2V1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_Y_CRCB_H1V2, MDP_Y_CRCB_H1V2,
MDP_Y_CBCR_H1V2, MDP_Y_CBCR_H1V2,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_RGBA_8888, MDP_RGBA_8888,
MDP_BGRA_8888, MDP_BGRA_8888,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_RGBX_8888, MDP_RGBX_8888,
MDP_Y_CRCB_H2V2_TILE, MDP_Y_CRCB_H2V2_TILE,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_Y_CBCR_H2V2_TILE, MDP_Y_CBCR_H2V2_TILE,
MDP_Y_CR_CB_H2V2, MDP_Y_CR_CB_H2V2,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_Y_CR_CB_GH2V2, MDP_Y_CR_CB_GH2V2,
MDP_Y_CB_CR_H2V2, MDP_Y_CB_CR_H2V2,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_Y_CRCB_H1V1, MDP_Y_CRCB_H1V1,
MDP_Y_CBCR_H1V1, MDP_Y_CBCR_H1V1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_YCRCB_H1V1, MDP_YCRCB_H1V1,
MDP_YCBCR_H1V1, MDP_YCBCR_H1V1,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_BGR_565, MDP_BGR_565,
MDP_IMGTYPE_LIMIT, MDP_IMGTYPE_LIMIT,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_RGB_BORDERFILL, MDP_RGB_BORDERFILL,
MDP_FB_FORMAT = MDP_IMGTYPE2_START, MDP_FB_FORMAT = MDP_IMGTYPE2_START,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
MDP_IMGTYPE_LIMIT2 MDP_IMGTYPE_LIMIT2
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
enum { enum {
PMEM_IMG, PMEM_IMG,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
FB_IMG, FB_IMG,
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
enum { enum {
HSIC_HUE = 0, HSIC_HUE = 0,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
HSIC_SAT, HSIC_SAT,
HSIC_INT, HSIC_INT,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
HSIC_CON, HSIC_CON,
NUM_HSIC_PARAM, NUM_HSIC_PARAM,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
#define MDSS_MDP_ROT_ONLY 0x80 #define MDSS_MDP_ROT_ONLY 0x80
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDSS_MDP_RIGHT_MIXER 0x100 #define MDSS_MDP_RIGHT_MIXER 0x100
#define MDP_ROT_NOP 0 #define MDP_ROT_NOP 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_FLIP_LR 0x1 #define MDP_FLIP_LR 0x1
#define MDP_FLIP_UD 0x2 #define MDP_FLIP_UD 0x2
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_ROT_90 0x4 #define MDP_ROT_90 0x4
#define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR) #define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR) #define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
#define MDP_DITHER 0x8 #define MDP_DITHER 0x8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_BLUR 0x10 #define MDP_BLUR 0x10
#define MDP_BLEND_FG_PREMULT 0x20000 #define MDP_BLEND_FG_PREMULT 0x20000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_DEINTERLACE 0x80000000 #define MDP_DEINTERLACE 0x80000000
#define MDP_SHARPENING 0x40000000 #define MDP_SHARPENING 0x40000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_NO_DMA_BARRIER_START 0x20000000 #define MDP_NO_DMA_BARRIER_START 0x20000000
#define MDP_NO_DMA_BARRIER_END 0x10000000 #define MDP_NO_DMA_BARRIER_END 0x10000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_NO_BLIT 0x08000000 #define MDP_NO_BLIT 0x08000000
#define MDP_BLIT_WITH_DMA_BARRIERS 0x000 #define MDP_BLIT_WITH_DMA_BARRIERS 0x000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END) #define MDP_BLIT_WITH_NO_DMA_BARRIERS (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
#define MDP_BLIT_SRC_GEM 0x04000000 #define MDP_BLIT_SRC_GEM 0x04000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_BLIT_DST_GEM 0x02000000 #define MDP_BLIT_DST_GEM 0x02000000
#define MDP_BLIT_NON_CACHED 0x01000000 #define MDP_BLIT_NON_CACHED 0x01000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_OV_PIPE_SHARE 0x00800000 #define MDP_OV_PIPE_SHARE 0x00800000
#define MDP_DEINTERLACE_ODD 0x00400000 #define MDP_DEINTERLACE_ODD 0x00400000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_OV_PLAY_NOWAIT 0x00200000 #define MDP_OV_PLAY_NOWAIT 0x00200000
#define MDP_SOURCE_ROTATED_90 0x00100000 #define MDP_SOURCE_ROTATED_90 0x00100000
#define MDP_DPP_HSIC 0x00080000
#define MDP_BACKEND_COMPOSITION 0x00040000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_OVERLAY_PP_CFG_EN 0x00080000
#define MDP_BACKEND_COMPOSITION 0x00040000
#define MDP_BORDERFILL_SUPPORTED 0x00010000 #define MDP_BORDERFILL_SUPPORTED 0x00010000
#define MDP_SECURE_OVERLAY_SESSION 0x00008000 #define MDP_SECURE_OVERLAY_SESSION 0x00008000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_MEMORY_ID_TYPE_FB 0x00001000 #define MDP_MEMORY_ID_TYPE_FB 0x00001000
#define MDP_TRANSP_NOP 0xffffffff #define MDP_TRANSP_NOP 0xffffffff
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_ALPHA_NOP 0xff #define MDP_ALPHA_NOP 0xff
#define MDP_FB_PAGE_PROTECTION_NONCACHED (0) #define MDP_FB_PAGE_PROTECTION_NONCACHED (0)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1) #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE (1)
#define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2) #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3) #define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE (3)
#define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4) #define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE (4)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_FB_PAGE_PROTECTION_INVALID (5) #define MDP_FB_PAGE_PROTECTION_INVALID (5)
#define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5) #define MDP_NUM_FB_PAGE_PROTECTION_VALUES (5)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_rect { struct mdp_rect {
uint32_t x; uint32_t x;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t y; uint32_t y;
uint32_t w; uint32_t w;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t h; uint32_t h;
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_img { struct mdp_img {
uint32_t width; uint32_t width;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t height; uint32_t height;
uint32_t format; uint32_t format;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t offset; uint32_t offset;
int memory_id; int memory_id;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t priv; uint32_t priv;
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_CCS_RGB2YUV 0 #define MDP_CCS_RGB2YUV 0
#define MDP_CCS_YUV2RGB 1 #define MDP_CCS_YUV2RGB 1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_CCS_SIZE 9 #define MDP_CCS_SIZE 9
#define MDP_BV_SIZE 3 #define MDP_BV_SIZE 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_ccs { struct mdp_ccs {
int direction; int direction;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint16_t ccs[MDP_CCS_SIZE]; uint16_t ccs[MDP_CCS_SIZE];
uint16_t bv[MDP_BV_SIZE]; uint16_t bv[MDP_BV_SIZE];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
struct mdp_csc { struct mdp_csc {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
int id; int id;
uint32_t csc_mv[9]; uint32_t csc_mv[9];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t csc_pre_bv[3]; uint32_t csc_pre_bv[3];
uint32_t csc_post_bv[3]; uint32_t csc_post_bv[3];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t csc_pre_lv[6]; uint32_t csc_pre_lv[6];
uint32_t csc_post_lv[6]; uint32_t csc_post_lv[6];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
#define MDP_BLIT_REQ_VERSION 2 #define MDP_BLIT_REQ_VERSION 2
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_blit_req { struct mdp_blit_req {
struct mdp_img src; struct mdp_img src;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_img dst; struct mdp_img dst;
struct mdp_rect src_rect; struct mdp_rect src_rect;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_rect dst_rect; struct mdp_rect dst_rect;
uint32_t alpha; uint32_t alpha;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t transp_mask; uint32_t transp_mask;
uint32_t flags; uint32_t flags;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
int sharpening_strength; int sharpening_strength;
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_blit_req_list { struct mdp_blit_req_list {
uint32_t count; uint32_t count;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_blit_req req[]; struct mdp_blit_req req[];
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSMFB_DATA_VERSION 2 #define MSMFB_DATA_VERSION 2
struct msmfb_data { struct msmfb_data {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t offset; uint32_t offset;
int memory_id; int memory_id;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
int id; int id;
uint32_t flags; uint32_t flags;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t priv; uint32_t priv;
uint32_t iova; uint32_t iova;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
#define MSMFB_NEW_REQUEST -1 #define MSMFB_NEW_REQUEST -1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_overlay_data { struct msmfb_overlay_data {
uint32_t id; uint32_t id;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_data data; struct msmfb_data data;
uint32_t version_key; uint32_t version_key;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_data plane1_data; struct msmfb_data plane1_data;
struct msmfb_data plane2_data; struct msmfb_data plane2_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_data dst_data; struct msmfb_data dst_data;
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_img { struct msmfb_img {
uint32_t width; uint32_t width;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t height; uint32_t height;
uint32_t format; uint32_t format;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
#define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1 #define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_writeback_data { struct msmfb_writeback_data {
struct msmfb_data buf_info; struct msmfb_data buf_info;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_img img; struct msmfb_img img;
}; };
struct dpp_ctrl {
int8_t sharp_strength;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
int8_t hsic_params[NUM_HSIC_PARAM]; #define MDP_PP_OPS_READ 0x2
#define MDP_PP_OPS_WRITE 0x4
struct mdp_qseed_cfg {
uint32_t table_num;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t ops;
uint32_t len;
uint32_t *data;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_qseed_cfg_data {
uint32_t block;
struct mdp_qseed_cfg qseed_data;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_OVERLAY_PP_CSC_CFG 0x1
#define MDP_OVERLAY_PP_QSEED_CFG 0x2
#define MDP_CSC_FLAG_ENABLE 0x1
#define MDP_CSC_FLAG_YUV_IN 0x2
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_CSC_FLAG_YUV_OUT 0x4
struct mdp_csc_cfg {
uint32_t flags;
uint32_t csc_mv[9];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t csc_pre_bv[3];
uint32_t csc_post_bv[3];
uint32_t csc_pre_lv[6];
uint32_t csc_post_lv[6];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct mdp_csc_cfg_data {
uint32_t block;
struct mdp_csc_cfg csc_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct mdp_overlay_pp_params {
uint32_t config_ops;
struct mdp_csc_cfg csc_cfg;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_qseed_cfg qseed_cfg[2];
}; };
struct mdp_overlay { struct mdp_overlay {
struct msmfb_img src; struct msmfb_img src;
@ -282,7 +322,7 @@ struct mdp_overlay {
uint32_t id; uint32_t id;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t user_data[8]; uint32_t user_data[8];
struct dpp_ctrl dpp; struct mdp_overlay_pp_params overlay_pp_cfg;
}; };
struct msmfb_overlay_3d { struct msmfb_overlay_3d {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
@ -353,102 +393,82 @@ struct mdp_pcc_cfg_data {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_pcc_coeff r, g, b; struct mdp_pcc_coeff r, g, b;
}; };
#define MDP_CSC_FLAG_ENABLE 0x1
#define MDP_CSC_FLAG_YUV_IN 0x2
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MDP_CSC_FLAG_YUV_OUT 0x4
struct mdp_csc_cfg {
uint32_t flags;
uint32_t csc_mv[9];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t csc_pre_bv[3];
uint32_t csc_post_bv[3];
uint32_t csc_pre_lv[6];
uint32_t csc_post_lv[6];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct mdp_csc_cfg_data {
uint32_t block;
struct mdp_csc_cfg csc_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
enum { enum {
mdp_lut_igc, mdp_lut_igc,
mdp_lut_pgc,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
mdp_lut_pgc,
mdp_lut_hist, mdp_lut_hist,
mdp_lut_max, mdp_lut_max,
}; };
struct mdp_igc_lut_data {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_igc_lut_data {
uint32_t block; uint32_t block;
uint32_t len, ops; uint32_t len, ops;
uint32_t *c0_c1_data; uint32_t *c0_c1_data;
uint32_t *c2_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t *c2_data;
}; };
struct mdp_ar_gc_lut_data { struct mdp_ar_gc_lut_data {
uint32_t x_start; uint32_t x_start;
uint32_t slope;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t slope;
uint32_t offset; uint32_t offset;
}; };
struct mdp_pgc_lut_data { struct mdp_pgc_lut_data {
uint32_t block;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t block;
uint32_t flags; uint32_t flags;
uint8_t num_r_stages; uint8_t num_r_stages;
uint8_t num_g_stages; uint8_t num_g_stages;
uint8_t num_b_stages;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint8_t num_b_stages;
struct mdp_ar_gc_lut_data *r_data; struct mdp_ar_gc_lut_data *r_data;
struct mdp_ar_gc_lut_data *g_data; struct mdp_ar_gc_lut_data *g_data;
struct mdp_ar_gc_lut_data *b_data; struct mdp_ar_gc_lut_data *b_data;
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
};
struct mdp_hist_lut_data { struct mdp_hist_lut_data {
uint32_t block; uint32_t block;
uint32_t ops; uint32_t ops;
uint32_t len;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t len;
uint32_t *data; uint32_t *data;
}; };
struct mdp_lut_cfg_data { struct mdp_lut_cfg_data {
uint32_t lut_type;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t lut_type;
union { union {
struct mdp_igc_lut_data igc_lut_data; struct mdp_igc_lut_data igc_lut_data;
struct mdp_pgc_lut_data pgc_lut_data; struct mdp_pgc_lut_data pgc_lut_data;
struct mdp_hist_lut_data hist_lut_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_hist_lut_data hist_lut_data;
} data; } data;
}; };
struct mdp_qseed_cfg_data { struct mdp_bl_scale_data {
uint32_t block;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t table_num;
uint32_t ops;
uint32_t len;
uint32_t *data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t min_lvl;
uint32_t scale;
}; };
enum { enum {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
mdp_op_pcc_cfg, mdp_op_pcc_cfg,
mdp_op_csc_cfg, mdp_op_csc_cfg,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
mdp_op_lut_cfg, mdp_op_lut_cfg,
mdp_op_qseed_cfg, mdp_op_qseed_cfg,
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
mdp_bl_scale_cfg,
mdp_op_max, mdp_op_max,
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msmfb_mdp_pp { struct msmfb_mdp_pp {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t op; uint32_t op;
union { union {
struct mdp_pcc_cfg_data pcc_cfg_data; struct mdp_pcc_cfg_data pcc_cfg_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_csc_cfg_data csc_cfg_data; struct mdp_csc_cfg_data csc_cfg_data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct mdp_lut_cfg_data lut_cfg_data; struct mdp_lut_cfg_data lut_cfg_data;
struct mdp_qseed_cfg_data qseed_cfg_data; struct mdp_qseed_cfg_data qseed_cfg_data;
struct mdp_bl_scale_data bl_scale_data;
} data; } data;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };

720
libc/kernel/common/media/msm_camera.h
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142
libc/kernel/common/media/msm_isp.h
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@ -77,316 +77,334 @@
#define MSG_ID_STOP_LS_ACK 44 #define MSG_ID_STOP_LS_ACK 44
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSG_ID_OUTPUT_TERTIARY2 45 #define MSG_ID_OUTPUT_TERTIARY2 45
#define MSG_ID_STATS_BG 46
#define MSG_ID_STATS_BF 47
#define MSG_ID_STATS_BHIST 48
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_0 0 #define VFE_CMD_DUMMY_0 0
#define VFE_CMD_SET_CLK 1 #define VFE_CMD_SET_CLK 1
#define VFE_CMD_RESET 2 #define VFE_CMD_RESET 2
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_START 3 #define VFE_CMD_START 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_TEST_GEN_START 4 #define VFE_CMD_TEST_GEN_START 4
#define VFE_CMD_OPERATION_CFG 5 #define VFE_CMD_OPERATION_CFG 5
#define VFE_CMD_AXI_OUT_CFG 6 #define VFE_CMD_AXI_OUT_CFG 6
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CAMIF_CFG 7 #define VFE_CMD_CAMIF_CFG 7
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_AXI_INPUT_CFG 8 #define VFE_CMD_AXI_INPUT_CFG 8
#define VFE_CMD_BLACK_LEVEL_CFG 9 #define VFE_CMD_BLACK_LEVEL_CFG 9
#define VFE_CMD_MESH_ROLL_OFF_CFG 10 #define VFE_CMD_MESH_ROLL_OFF_CFG 10
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMUX_CFG 11 #define VFE_CMD_DEMUX_CFG 11
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_FOV_CFG 12 #define VFE_CMD_FOV_CFG 12
#define VFE_CMD_MAIN_SCALER_CFG 13 #define VFE_CMD_MAIN_SCALER_CFG 13
#define VFE_CMD_WB_CFG 14 #define VFE_CMD_WB_CFG 14
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_COLOR_COR_CFG 15 #define VFE_CMD_COLOR_COR_CFG 15
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_RGB_G_CFG 16 #define VFE_CMD_RGB_G_CFG 16
#define VFE_CMD_LA_CFG 17 #define VFE_CMD_LA_CFG 17
#define VFE_CMD_CHROMA_EN_CFG 18 #define VFE_CMD_CHROMA_EN_CFG 18
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CHROMA_SUP_CFG 19 #define VFE_CMD_CHROMA_SUP_CFG 19
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_MCE_CFG 20 #define VFE_CMD_MCE_CFG 20
#define VFE_CMD_SK_ENHAN_CFG 21 #define VFE_CMD_SK_ENHAN_CFG 21
#define VFE_CMD_ASF_CFG 22 #define VFE_CMD_ASF_CFG 22
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_S2Y_CFG 23 #define VFE_CMD_S2Y_CFG 23
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_S2CbCr_CFG 24 #define VFE_CMD_S2CbCr_CFG 24
#define VFE_CMD_CHROMA_SUBS_CFG 25 #define VFE_CMD_CHROMA_SUBS_CFG 25
#define VFE_CMD_OUT_CLAMP_CFG 26 #define VFE_CMD_OUT_CLAMP_CFG 26
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_FRAME_SKIP_CFG 27 #define VFE_CMD_FRAME_SKIP_CFG 27
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_1 28 #define VFE_CMD_DUMMY_1 28
#define VFE_CMD_DUMMY_2 29 #define VFE_CMD_DUMMY_2 29
#define VFE_CMD_DUMMY_3 30 #define VFE_CMD_DUMMY_3 30
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_UPDATE 31 #define VFE_CMD_UPDATE 31
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_BL_LVL_UPDATE 32 #define VFE_CMD_BL_LVL_UPDATE 32
#define VFE_CMD_DEMUX_UPDATE 33 #define VFE_CMD_DEMUX_UPDATE 33
#define VFE_CMD_FOV_UPDATE 34 #define VFE_CMD_FOV_UPDATE 34
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_MAIN_SCALER_UPDATE 35 #define VFE_CMD_MAIN_SCALER_UPDATE 35
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_WB_UPDATE 36 #define VFE_CMD_WB_UPDATE 36
#define VFE_CMD_COLOR_COR_UPDATE 37 #define VFE_CMD_COLOR_COR_UPDATE 37
#define VFE_CMD_RGB_G_UPDATE 38 #define VFE_CMD_RGB_G_UPDATE 38
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_LA_UPDATE 39 #define VFE_CMD_LA_UPDATE 39
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CHROMA_EN_UPDATE 40 #define VFE_CMD_CHROMA_EN_UPDATE 40
#define VFE_CMD_CHROMA_SUP_UPDATE 41 #define VFE_CMD_CHROMA_SUP_UPDATE 41
#define VFE_CMD_MCE_UPDATE 42 #define VFE_CMD_MCE_UPDATE 42
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_SK_ENHAN_UPDATE 43 #define VFE_CMD_SK_ENHAN_UPDATE 43
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_S2CbCr_UPDATE 44 #define VFE_CMD_S2CbCr_UPDATE 44
#define VFE_CMD_S2Y_UPDATE 45 #define VFE_CMD_S2Y_UPDATE 45
#define VFE_CMD_ASF_UPDATE 46 #define VFE_CMD_ASF_UPDATE 46
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_FRAME_SKIP_UPDATE 47 #define VFE_CMD_FRAME_SKIP_UPDATE 47
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CAMIF_FRAME_UPDATE 48 #define VFE_CMD_CAMIF_FRAME_UPDATE 48
#define VFE_CMD_STATS_AF_UPDATE 49 #define VFE_CMD_STATS_AF_UPDATE 49
#define VFE_CMD_STATS_AE_UPDATE 50 #define VFE_CMD_STATS_AE_UPDATE 50
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AWB_UPDATE 51 #define VFE_CMD_STATS_AWB_UPDATE 51
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_RS_UPDATE 52 #define VFE_CMD_STATS_RS_UPDATE 52
#define VFE_CMD_STATS_CS_UPDATE 53 #define VFE_CMD_STATS_CS_UPDATE 53
#define VFE_CMD_STATS_SKIN_UPDATE 54 #define VFE_CMD_STATS_SKIN_UPDATE 54
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_IHIST_UPDATE 55 #define VFE_CMD_STATS_IHIST_UPDATE 55
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_4 56 #define VFE_CMD_DUMMY_4 56
#define VFE_CMD_EPOCH1_ACK 57 #define VFE_CMD_EPOCH1_ACK 57
#define VFE_CMD_EPOCH2_ACK 58 #define VFE_CMD_EPOCH2_ACK 58
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_START_RECORDING 59 #define VFE_CMD_START_RECORDING 59
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STOP_RECORDING 60 #define VFE_CMD_STOP_RECORDING 60
#define VFE_CMD_DUMMY_5 61 #define VFE_CMD_DUMMY_5 61
#define VFE_CMD_DUMMY_6 62 #define VFE_CMD_DUMMY_6 62
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CAPTURE 63 #define VFE_CMD_CAPTURE 63
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_7 64 #define VFE_CMD_DUMMY_7 64
#define VFE_CMD_STOP 65 #define VFE_CMD_STOP 65
#define VFE_CMD_GET_HW_VERSION 66 #define VFE_CMD_GET_HW_VERSION 66
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_GET_FRAME_SKIP_COUNTS 67 #define VFE_CMD_GET_FRAME_SKIP_COUNTS 67
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_OUTPUT1_BUFFER_ENQ 68 #define VFE_CMD_OUTPUT1_BUFFER_ENQ 68
#define VFE_CMD_OUTPUT2_BUFFER_ENQ 69 #define VFE_CMD_OUTPUT2_BUFFER_ENQ 69
#define VFE_CMD_OUTPUT3_BUFFER_ENQ 70 #define VFE_CMD_OUTPUT3_BUFFER_ENQ 70
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_JPEG_OUT_BUF_ENQ 71 #define VFE_CMD_JPEG_OUT_BUF_ENQ 71
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_RAW_OUT_BUF_ENQ 72 #define VFE_CMD_RAW_OUT_BUF_ENQ 72
#define VFE_CMD_RAW_IN_BUF_ENQ 73 #define VFE_CMD_RAW_IN_BUF_ENQ 73
#define VFE_CMD_STATS_AF_ENQ 74 #define VFE_CMD_STATS_AF_ENQ 74
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AE_ENQ 75 #define VFE_CMD_STATS_AE_ENQ 75
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AWB_ENQ 76 #define VFE_CMD_STATS_AWB_ENQ 76
#define VFE_CMD_STATS_RS_ENQ 77 #define VFE_CMD_STATS_RS_ENQ 77
#define VFE_CMD_STATS_CS_ENQ 78 #define VFE_CMD_STATS_CS_ENQ 78
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_SKIN_ENQ 79 #define VFE_CMD_STATS_SKIN_ENQ 79
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_IHIST_ENQ 80 #define VFE_CMD_STATS_IHIST_ENQ 80
#define VFE_CMD_DUMMY_8 81 #define VFE_CMD_DUMMY_8 81
#define VFE_CMD_JPEG_ENC_CFG 82 #define VFE_CMD_JPEG_ENC_CFG 82
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DUMMY_9 83 #define VFE_CMD_DUMMY_9 83
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AF_START 84 #define VFE_CMD_STATS_AF_START 84
#define VFE_CMD_STATS_AF_STOP 85 #define VFE_CMD_STATS_AF_STOP 85
#define VFE_CMD_STATS_AE_START 86 #define VFE_CMD_STATS_AE_START 86
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AE_STOP 87 #define VFE_CMD_STATS_AE_STOP 87
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_AWB_START 88 #define VFE_CMD_STATS_AWB_START 88
#define VFE_CMD_STATS_AWB_STOP 89 #define VFE_CMD_STATS_AWB_STOP 89
#define VFE_CMD_STATS_RS_START 90 #define VFE_CMD_STATS_RS_START 90
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_RS_STOP 91 #define VFE_CMD_STATS_RS_STOP 91
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_CS_START 92 #define VFE_CMD_STATS_CS_START 92
#define VFE_CMD_STATS_CS_STOP 93 #define VFE_CMD_STATS_CS_STOP 93
#define VFE_CMD_STATS_SKIN_START 94 #define VFE_CMD_STATS_SKIN_START 94
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_SKIN_STOP 95 #define VFE_CMD_STATS_SKIN_STOP 95
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_IHIST_START 96 #define VFE_CMD_STATS_IHIST_START 96
#define VFE_CMD_STATS_IHIST_STOP 97 #define VFE_CMD_STATS_IHIST_STOP 97
#define VFE_CMD_DUMMY_10 98 #define VFE_CMD_DUMMY_10 98
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_SYNC_TIMER_SETTING 99 #define VFE_CMD_SYNC_TIMER_SETTING 99
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_ASYNC_TIMER_SETTING 100 #define VFE_CMD_ASYNC_TIMER_SETTING 100
#define VFE_CMD_LIVESHOT 101 #define VFE_CMD_LIVESHOT 101
#define VFE_CMD_LA_SETUP 102 #define VFE_CMD_LA_SETUP 102
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_LINEARIZATION_CFG 103 #define VFE_CMD_LINEARIZATION_CFG 103
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3 104 #define VFE_CMD_DEMOSAICV3 104
#define VFE_CMD_DEMOSAICV3_ABCC_CFG 105 #define VFE_CMD_DEMOSAICV3_ABCC_CFG 105
#define VFE_CMD_DEMOSAICV3_DBCC_CFG 106 #define VFE_CMD_DEMOSAICV3_DBCC_CFG 106
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3_DBPC_CFG 107 #define VFE_CMD_DEMOSAICV3_DBPC_CFG 107
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3_ABF_CFG 108 #define VFE_CMD_DEMOSAICV3_ABF_CFG 108
#define VFE_CMD_DEMOSAICV3_ABCC_UPDATE 109 #define VFE_CMD_DEMOSAICV3_ABCC_UPDATE 109
#define VFE_CMD_DEMOSAICV3_DBCC_UPDATE 110 #define VFE_CMD_DEMOSAICV3_DBCC_UPDATE 110
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3_DBPC_UPDATE 111 #define VFE_CMD_DEMOSAICV3_DBPC_UPDATE 111
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_XBAR_CFG 112 #define VFE_CMD_XBAR_CFG 112
#define VFE_CMD_MODULE_CFG 113 #define VFE_CMD_MODULE_CFG 113
#define VFE_CMD_ZSL 114 #define VFE_CMD_ZSL 114
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_LINEARIZATION_UPDATE 115 #define VFE_CMD_LINEARIZATION_UPDATE 115
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3_ABF_UPDATE 116 #define VFE_CMD_DEMOSAICV3_ABF_UPDATE 116
#define VFE_CMD_CLF_CFG 117 #define VFE_CMD_CLF_CFG 117
#define VFE_CMD_CLF_LUMA_UPDATE 118 #define VFE_CMD_CLF_LUMA_UPDATE 118
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CLF_CHROMA_UPDATE 119 #define VFE_CMD_CLF_CHROMA_UPDATE 119
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_PCA_ROLL_OFF_CFG 120 #define VFE_CMD_PCA_ROLL_OFF_CFG 120
#define VFE_CMD_PCA_ROLL_OFF_UPDATE 121 #define VFE_CMD_PCA_ROLL_OFF_UPDATE 121
#define VFE_CMD_GET_REG_DUMP 122 #define VFE_CMD_GET_REG_DUMP 122
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_GET_LINEARIZATON_TABLE 123 #define VFE_CMD_GET_LINEARIZATON_TABLE 123
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_GET_MESH_ROLLOFF_TABLE 124 #define VFE_CMD_GET_MESH_ROLLOFF_TABLE 124
#define VFE_CMD_GET_PCA_ROLLOFF_TABLE 125 #define VFE_CMD_GET_PCA_ROLLOFF_TABLE 125
#define VFE_CMD_GET_RGB_G_TABLE 126 #define VFE_CMD_GET_RGB_G_TABLE 126
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_GET_LA_TABLE 127 #define VFE_CMD_GET_LA_TABLE 127
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_DEMOSAICV3_UPDATE 128 #define VFE_CMD_DEMOSAICV3_UPDATE 128
#define VFE_CMD_ACTIVE_REGION_CFG 129 #define VFE_CMD_ACTIVE_REGION_CFG 129
#define VFE_CMD_COLOR_PROCESSING_CONFIG 130 #define VFE_CMD_COLOR_PROCESSING_CONFIG 130
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_WB_AEC_CONFIG 131 #define VFE_CMD_STATS_WB_AEC_CONFIG 131
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_WB_AEC_UPDATE 132 #define VFE_CMD_STATS_WB_AEC_UPDATE 132
#define VFE_CMD_Y_GAMMA_CONFIG 133 #define VFE_CMD_Y_GAMMA_CONFIG 133
#define VFE_CMD_SCALE_OUTPUT1_CONFIG 134 #define VFE_CMD_SCALE_OUTPUT1_CONFIG 134
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_SCALE_OUTPUT2_CONFIG 135 #define VFE_CMD_SCALE_OUTPUT2_CONFIG 135
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_CAPTURE_RAW 136 #define VFE_CMD_CAPTURE_RAW 136
#define VFE_CMD_STOP_LIVESHOT 137 #define VFE_CMD_STOP_LIVESHOT 137
#define VFE_CMD_RECONFIG_VFE 138 #define VFE_CMD_RECONFIG_VFE 138
#define VFE_CMD_STATS_REQBUF 139
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_ENQUEUEBUF 140
#define VFE_CMD_STATS_FLUSH_BUFQ 141
#define VFE_CMD_STATS_UNREGBUF 142
#define VFE_CMD_STATS_BG_START 143
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_BG_STOP 144
#define VFE_CMD_STATS_BF_START 145
#define VFE_CMD_STATS_BF_STOP 146
#define VFE_CMD_STATS_BHIST_START 147
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_CMD_STATS_BHIST_STOP 148
#define VFE_CMD_RESET_2 149
struct msm_isp_cmd { struct msm_isp_cmd {
int32_t id; int32_t id;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint16_t length; uint16_t length;
void *value; void *value;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
#define VPE_CMD_DUMMY_0 0 #define VPE_CMD_DUMMY_0 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VPE_CMD_INIT 1 #define VPE_CMD_INIT 1
#define VPE_CMD_DEINIT 2 #define VPE_CMD_DEINIT 2
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VPE_CMD_ENABLE 3 #define VPE_CMD_ENABLE 3
#define VPE_CMD_DISABLE 4 #define VPE_CMD_DISABLE 4
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VPE_CMD_RESET 5 #define VPE_CMD_RESET 5
#define VPE_CMD_FLUSH 6 #define VPE_CMD_FLUSH 6
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VPE_CMD_OPERATION_MODE_CFG 7 #define VPE_CMD_OPERATION_MODE_CFG 7
#define VPE_CMD_INPUT_PLANE_CFG 8 #define VPE_CMD_INPUT_PLANE_CFG 8
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VPE_CMD_OUTPUT_PLANE_CFG 9 #define VPE_CMD_OUTPUT_PLANE_CFG 9
#define VPE_CMD_INPUT_PLANE_UPDATE 10 #define VPE_CMD_INPUT_PLANE_UPDATE 10
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VPE_CMD_SCALE_CFG_TYPE 11 #define VPE_CMD_SCALE_CFG_TYPE 11
#define VPE_CMD_ZOOM 13 #define VPE_CMD_ZOOM 13
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VPE_CMD_MAX 14 #define VPE_CMD_MAX 14
#define MSM_PP_CMD_TYPE_NOT_USED 0 #define MSM_PP_CMD_TYPE_NOT_USED 0
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSM_PP_CMD_TYPE_VPE 1 #define MSM_PP_CMD_TYPE_VPE 1
#define MSM_PP_CMD_TYPE_MCTL 2 #define MSM_PP_CMD_TYPE_MCTL 2
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MCTL_CMD_DUMMY_0 0 #define MCTL_CMD_DUMMY_0 0
#define MCTL_CMD_GET_FRAME_BUFFER 1 #define MCTL_CMD_GET_FRAME_BUFFER 1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MCTL_CMD_PUT_FRAME_BUFFER 2 #define MCTL_CMD_PUT_FRAME_BUFFER 2
#define MCTL_CMD_DIVERT_FRAME_PP_PATH 3 #define MCTL_CMD_DIVERT_FRAME_PP_PATH 3
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MCTL_PP_EVENT_NOTUSED 0 #define MCTL_PP_EVENT_NOTUSED 0
#define MCTL_PP_EVENT_CMD_ACK 1 #define MCTL_PP_EVENT_CMD_ACK 1
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VPE_OPERATION_MODE_CFG_LEN 4 #define VPE_OPERATION_MODE_CFG_LEN 4
#define VPE_INPUT_PLANE_CFG_LEN 24 #define VPE_INPUT_PLANE_CFG_LEN 24
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VPE_OUTPUT_PLANE_CFG_LEN 20 #define VPE_OUTPUT_PLANE_CFG_LEN 20
#define VPE_INPUT_PLANE_UPDATE_LEN 12 #define VPE_INPUT_PLANE_UPDATE_LEN 12
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VPE_SCALER_CONFIG_LEN 260 #define VPE_SCALER_CONFIG_LEN 260
#define VPE_DIS_OFFSET_CFG_LEN 12 #define VPE_DIS_OFFSET_CFG_LEN 12
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define CAPTURE_WIDTH 1280 #define CAPTURE_WIDTH 1280
#define IMEM_Y_SIZE (CAPTURE_WIDTH*16) #define IMEM_Y_SIZE (CAPTURE_WIDTH*16)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IMEM_CBCR_SIZE (CAPTURE_WIDTH*8) #define IMEM_CBCR_SIZE (CAPTURE_WIDTH*8)
#define IMEM_Y_PING_OFFSET 0x2E000000 #define IMEM_Y_PING_OFFSET 0x2E000000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IMEM_CBCR_PING_OFFSET (IMEM_Y_PING_OFFSET + IMEM_Y_SIZE) #define IMEM_CBCR_PING_OFFSET (IMEM_Y_PING_OFFSET + IMEM_Y_SIZE)
#define IMEM_Y_PONG_OFFSET (IMEM_CBCR_PING_OFFSET + IMEM_CBCR_SIZE) #define IMEM_Y_PONG_OFFSET (IMEM_CBCR_PING_OFFSET + IMEM_CBCR_SIZE)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define IMEM_CBCR_PONG_OFFSET (IMEM_Y_PONG_OFFSET + IMEM_Y_SIZE) #define IMEM_CBCR_PONG_OFFSET (IMEM_Y_PONG_OFFSET + IMEM_Y_SIZE)
struct msm_vpe_op_mode_cfg { struct msm_vpe_op_mode_cfg {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint8_t op_mode_cfg[VPE_OPERATION_MODE_CFG_LEN]; uint8_t op_mode_cfg[VPE_OPERATION_MODE_CFG_LEN];
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msm_vpe_input_plane_cfg { struct msm_vpe_input_plane_cfg {
uint8_t input_plane_cfg[VPE_INPUT_PLANE_CFG_LEN]; uint8_t input_plane_cfg[VPE_INPUT_PLANE_CFG_LEN];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
struct msm_vpe_output_plane_cfg { struct msm_vpe_output_plane_cfg {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint8_t output_plane_cfg[VPE_OUTPUT_PLANE_CFG_LEN]; uint8_t output_plane_cfg[VPE_OUTPUT_PLANE_CFG_LEN];
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msm_vpe_input_plane_update_cfg { struct msm_vpe_input_plane_update_cfg {
uint8_t input_plane_update_cfg[VPE_INPUT_PLANE_UPDATE_LEN]; uint8_t input_plane_update_cfg[VPE_INPUT_PLANE_UPDATE_LEN];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
struct msm_vpe_scaler_cfg { struct msm_vpe_scaler_cfg {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint8_t scaler_cfg[VPE_SCALER_CONFIG_LEN]; uint8_t scaler_cfg[VPE_SCALER_CONFIG_LEN];
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msm_vpe_flush_frame_buffer { struct msm_vpe_flush_frame_buffer {
uint32_t src_buf_handle; uint32_t src_buf_handle;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t dest_buf_handle; uint32_t dest_buf_handle;
int path; int path;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
struct msm_mctl_pp_frame_buffer { struct msm_mctl_pp_frame_buffer {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t buf_handle; uint32_t buf_handle;
int path; int path;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
struct msm_mctl_pp_divert_pp { struct msm_mctl_pp_divert_pp {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
int path; int path;
int enable; int enable;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
struct msm_vpe_clock_rate { struct msm_vpe_clock_rate {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t rate; uint32_t rate;
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msm_pp_crop { struct msm_pp_crop {
uint32_t src_x; uint32_t src_x;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t src_y; uint32_t src_y;
uint32_t src_w; uint32_t src_w;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t src_h; uint32_t src_h;
uint32_t dst_x; uint32_t dst_x;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t dst_y; uint32_t dst_y;
uint32_t dst_w; uint32_t dst_w;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t dst_h; uint32_t dst_h;
uint8_t update_flag; uint8_t update_flag;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
#define MSM_MCTL_PP_VPE_FRAME_ACK (1<<0) #define MSM_MCTL_PP_VPE_FRAME_ACK (1<<0)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define MSM_MCTL_PP_VPE_FRAME_TO_APP (1<<1) #define MSM_MCTL_PP_VPE_FRAME_TO_APP (1<<1)
struct msm_mctl_pp_frame_cmd { struct msm_mctl_pp_frame_cmd {
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t cookie; uint32_t cookie;
uint8_t vpe_output_action; uint8_t vpe_output_action;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
uint32_t src_buf_handle; uint32_t src_buf_handle;
uint32_t dest_buf_handle; uint32_t dest_buf_handle;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msm_pp_crop crop; struct msm_pp_crop crop;
int path; int path;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
}; };
#define VFE_OUTPUTS_MAIN_AND_PREVIEW BIT(0) #define VFE_OUTPUTS_MAIN_AND_PREVIEW BIT(0)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_OUTPUTS_MAIN_AND_VIDEO BIT(1) #define VFE_OUTPUTS_MAIN_AND_VIDEO BIT(1)
#define VFE_OUTPUTS_MAIN_AND_THUMB BIT(2) #define VFE_OUTPUTS_MAIN_AND_THUMB BIT(2)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_OUTPUTS_THUMB_AND_MAIN BIT(3) #define VFE_OUTPUTS_THUMB_AND_MAIN BIT(3)
#define VFE_OUTPUTS_PREVIEW_AND_VIDEO BIT(4) #define VFE_OUTPUTS_PREVIEW_AND_VIDEO BIT(4)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_OUTPUTS_VIDEO_AND_PREVIEW BIT(5) #define VFE_OUTPUTS_VIDEO_AND_PREVIEW BIT(5)
#define VFE_OUTPUTS_PREVIEW BIT(6) #define VFE_OUTPUTS_PREVIEW BIT(6)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_OUTPUTS_VIDEO BIT(7) #define VFE_OUTPUTS_VIDEO BIT(7)
#define VFE_OUTPUTS_RAW BIT(8) #define VFE_OUTPUTS_RAW BIT(8)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_OUTPUTS_JPEG_AND_THUMB BIT(9) #define VFE_OUTPUTS_JPEG_AND_THUMB BIT(9)
#define VFE_OUTPUTS_THUMB_AND_JPEG BIT(10) #define VFE_OUTPUTS_THUMB_AND_JPEG BIT(10)
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define VFE_OUTPUTS_RDI0 BIT(11) #define VFE_OUTPUTS_RDI0 BIT(11)
#define VFE_OUTPUTS_RDI1 BIT(12) #define VFE_OUTPUTS_RDI1 BIT(12)
struct msm_frame_info {
uint32_t image_mode;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
struct msm_frame_info {
uint32_t inst_handle;
uint32_t path; uint32_t path;
}; };
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#endif #endif