Switch kernel header parsing to python libclang
Replace the tokenizer in cpp.py with libclang. Bug: 18937958 Change-Id: I27630904c6d2849418cd5ca3d3c612ec3078686d
This commit is contained in:
Tao Bao
@@ -21,23 +21,23 @@
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#include <linux/types.h>
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struct cyclades_monitor {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned long int_count;
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unsigned long char_count;
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unsigned long char_max;
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unsigned long char_last;
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unsigned long int_count;
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unsigned long char_count;
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unsigned long char_max;
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unsigned long char_last;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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struct cyclades_idle_stats {
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__kernel_time_t in_use;
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__kernel_time_t recv_idle;
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__kernel_time_t in_use;
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__kernel_time_t recv_idle;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__kernel_time_t xmit_idle;
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unsigned long recv_bytes;
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unsigned long xmit_bytes;
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unsigned long overruns;
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__kernel_time_t xmit_idle;
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unsigned long recv_bytes;
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unsigned long xmit_bytes;
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unsigned long overruns;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned long frame_errs;
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unsigned long parity_errs;
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unsigned long frame_errs;
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unsigned long parity_errs;
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};
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#define CYCLADES_MAGIC 0x4359
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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@@ -64,14 +64,14 @@ struct cyclades_idle_stats {
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#define CYSETWAIT 0x435912
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#define CYGETWAIT 0x435913
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#define CZIOC ('M' << 8)
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#define CZ_NBOARDS (CZIOC|0xfa)
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#define CZ_NBOARDS (CZIOC | 0xfa)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CZ_BOOT_START (CZIOC|0xfb)
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#define CZ_BOOT_DATA (CZIOC|0xfc)
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#define CZ_BOOT_END (CZIOC|0xfd)
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#define CZ_TEST (CZIOC|0xfe)
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#define CZ_BOOT_START (CZIOC | 0xfb)
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#define CZ_BOOT_DATA (CZIOC | 0xfc)
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#define CZ_BOOT_END (CZIOC | 0xfd)
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#define CZ_TEST (CZIOC | 0xfe)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define CZ_DEF_POLL (HZ/25)
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#define CZ_DEF_POLL (HZ / 25)
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#define MAX_BOARD 4
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#define MAX_DEV 256
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#define CYZ_MAX_SPEED 921600
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@@ -79,14 +79,14 @@ struct cyclades_idle_stats {
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#define CYZ_FIFO_SIZE 16
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#define CYZ_BOOT_NWORDS 0x100
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struct CYZ_BOOT_CTRL {
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unsigned short nboard;
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unsigned short nboard;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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int status[MAX_BOARD];
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int nchannel[MAX_BOARD];
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int fw_rev[MAX_BOARD];
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unsigned long offset;
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int status[MAX_BOARD];
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int nchannel[MAX_BOARD];
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int fw_rev[MAX_BOARD];
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unsigned long offset;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned long data[CYZ_BOOT_NWORDS];
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unsigned long data[CYZ_BOOT_NWORDS];
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};
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#ifndef DP_WINDOW_SIZE
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#define DP_WINDOW_SIZE (0x00080000)
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@@ -94,66 +94,66 @@ struct CYZ_BOOT_CTRL {
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#define ZE_DP_WINDOW_SIZE (0x00100000)
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#define CTRL_WINDOW_SIZE (0x00000080)
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struct CUSTOM_REG {
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__u32 fpga_id;
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__u32 fpga_id;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 fpga_version;
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__u32 cpu_start;
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__u32 cpu_stop;
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__u32 misc_reg;
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__u32 fpga_version;
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__u32 cpu_start;
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__u32 cpu_stop;
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__u32 misc_reg;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 idt_mode;
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__u32 uart_irq_status;
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__u32 clear_timer0_irq;
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__u32 clear_timer1_irq;
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__u32 idt_mode;
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__u32 uart_irq_status;
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__u32 clear_timer0_irq;
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__u32 clear_timer1_irq;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 clear_timer2_irq;
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__u32 test_register;
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__u32 test_count;
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__u32 timer_select;
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__u32 clear_timer2_irq;
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__u32 test_register;
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__u32 test_count;
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__u32 timer_select;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 pr_uart_irq_status;
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__u32 ram_wait_state;
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__u32 uart_wait_state;
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__u32 timer_wait_state;
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__u32 pr_uart_irq_status;
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__u32 ram_wait_state;
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__u32 uart_wait_state;
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__u32 timer_wait_state;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 ack_wait_state;
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__u32 ack_wait_state;
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};
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struct RUNTIME_9060 {
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__u32 loc_addr_range;
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__u32 loc_addr_range;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 loc_addr_base;
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__u32 loc_arbitr;
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__u32 endian_descr;
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__u32 loc_rom_range;
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__u32 loc_addr_base;
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__u32 loc_arbitr;
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__u32 endian_descr;
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__u32 loc_rom_range;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 loc_rom_base;
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__u32 loc_bus_descr;
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__u32 loc_range_mst;
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__u32 loc_base_mst;
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__u32 loc_rom_base;
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__u32 loc_bus_descr;
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__u32 loc_range_mst;
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__u32 loc_base_mst;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 loc_range_io;
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__u32 pci_base_mst;
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__u32 pci_conf_io;
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__u32 filler1;
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__u32 loc_range_io;
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__u32 pci_base_mst;
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__u32 pci_conf_io;
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__u32 filler1;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 filler2;
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__u32 filler3;
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__u32 filler4;
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__u32 mail_box_0;
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__u32 filler2;
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__u32 filler3;
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__u32 filler4;
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__u32 mail_box_0;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 mail_box_1;
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__u32 mail_box_2;
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__u32 mail_box_3;
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__u32 filler5;
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__u32 mail_box_1;
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__u32 mail_box_2;
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__u32 mail_box_3;
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__u32 filler5;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 filler6;
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__u32 filler7;
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__u32 filler8;
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__u32 pci_doorbell;
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__u32 filler6;
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__u32 filler7;
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__u32 filler8;
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__u32 pci_doorbell;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 loc_doorbell;
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__u32 intr_ctrl_stat;
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__u32 init_ctrl;
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__u32 loc_doorbell;
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__u32 intr_ctrl_stat;
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__u32 init_ctrl;
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};
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define WIN_RAM 0x00000001L
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@@ -176,8 +176,8 @@ struct RUNTIME_9060 {
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#define ZF_TINACT ZF_TINACT_DEF
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struct FIRM_ID {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 signature;
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__u32 zfwctrl_addr;
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__u32 signature;
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__u32 zfwctrl_addr;
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};
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#define C_OS_LINUX 0x00000030
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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@@ -299,79 +299,79 @@ struct FIRM_ID {
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#define C_CM_FATAL 0x91
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#define C_CM_HW_RESET 0x92
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struct CH_CTRL {
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__u32 op_mode;
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__u32 op_mode;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 intr_enable;
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__u32 sw_flow;
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__u32 flow_status;
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__u32 comm_baud;
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__u32 intr_enable;
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__u32 sw_flow;
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__u32 flow_status;
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__u32 comm_baud;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 comm_parity;
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__u32 comm_data_l;
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__u32 comm_flags;
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__u32 hw_flow;
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__u32 comm_parity;
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__u32 comm_data_l;
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__u32 comm_flags;
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__u32 hw_flow;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 rs_control;
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__u32 rs_status;
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__u32 flow_xon;
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__u32 flow_xoff;
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__u32 rs_control;
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__u32 rs_status;
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__u32 flow_xon;
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__u32 flow_xoff;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 hw_overflow;
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__u32 sw_overflow;
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__u32 comm_error;
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__u32 ichar;
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__u32 hw_overflow;
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__u32 sw_overflow;
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__u32 comm_error;
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__u32 ichar;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 filler[7];
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__u32 filler[7];
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};
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struct BUF_CTRL {
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__u32 flag_dma;
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__u32 flag_dma;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 tx_bufaddr;
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__u32 tx_bufsize;
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__u32 tx_threshold;
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__u32 tx_get;
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__u32 tx_bufaddr;
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__u32 tx_bufsize;
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__u32 tx_threshold;
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__u32 tx_get;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 tx_put;
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__u32 rx_bufaddr;
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__u32 rx_bufsize;
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__u32 rx_threshold;
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__u32 tx_put;
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__u32 rx_bufaddr;
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__u32 rx_bufsize;
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__u32 rx_threshold;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 rx_get;
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__u32 rx_put;
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__u32 filler[5];
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__u32 rx_get;
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__u32 rx_put;
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__u32 filler[5];
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};
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct BOARD_CTRL {
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__u32 n_channel;
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__u32 fw_version;
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__u32 op_system;
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__u32 n_channel;
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__u32 fw_version;
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__u32 op_system;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 dr_version;
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__u32 inactivity;
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__u32 hcmd_channel;
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__u32 hcmd_param;
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__u32 dr_version;
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__u32 inactivity;
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__u32 hcmd_channel;
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__u32 hcmd_param;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__u32 fwcmd_channel;
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__u32 fwcmd_param;
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__u32 zf_int_queue_addr;
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__u32 filler[6];
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__u32 fwcmd_channel;
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__u32 fwcmd_param;
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__u32 zf_int_queue_addr;
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__u32 filler[6];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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#define QUEUE_SIZE (10*MAX_CHAN)
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#define QUEUE_SIZE (10 * MAX_CHAN)
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struct INT_QUEUE {
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unsigned char intr_code[QUEUE_SIZE];
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unsigned char intr_code[QUEUE_SIZE];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned long channel[QUEUE_SIZE];
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unsigned long param[QUEUE_SIZE];
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unsigned long put;
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unsigned long get;
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unsigned long channel[QUEUE_SIZE];
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unsigned long param[QUEUE_SIZE];
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unsigned long put;
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unsigned long get;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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struct ZFW_CTRL {
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struct BOARD_CTRL board_ctrl;
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struct CH_CTRL ch_ctrl[MAX_CHAN];
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struct BOARD_CTRL board_ctrl;
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struct CH_CTRL ch_ctrl[MAX_CHAN];
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct BUF_CTRL buf_ctrl[MAX_CHAN];
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struct BUF_CTRL buf_ctrl[MAX_CHAN];
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};
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#endif
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#endif
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