From 845c778fa6ebb3ff3feaac0c268d93f4017c0cda Mon Sep 17 00:00:00 2001 From: Serban Constantinescu Date: Thu, 19 Dec 2013 11:57:10 +0000 Subject: [PATCH] ARM: Change dmb domain for bionic_atomic_barrier() This patch changes the domain that the memory barrier operates on. Assumes that the scope of bionic_atomic_barrier() does not include device memory, memory shared with the GPU or any other memory external to the processor cluster. Change-Id: I291e741c98a64c86f3a3cf99811bbf1e714ac9aa Signed-off-by: Serban Constantinescu --- libc/private/bionic_atomic_aarch64.h | 2 +- libc/private/bionic_atomic_arm.h | 4 ++-- libc/private/bionic_atomic_gcc_builtin.h | 2 +- libc/private/bionic_atomic_inline.h | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/libc/private/bionic_atomic_aarch64.h b/libc/private/bionic_atomic_aarch64.h index c5a9e2e2e..568382e90 100644 --- a/libc/private/bionic_atomic_aarch64.h +++ b/libc/private/bionic_atomic_aarch64.h @@ -17,7 +17,7 @@ #define BIONIC_ATOMIC_AARCH64_H /* For ARMv8, we can use the 'dmb' instruction directly */ -__ATOMIC_INLINE__ void __bionic_memory_barrier(void) { +__ATOMIC_INLINE__ void __bionic_memory_barrier() { __asm__ __volatile__ ( "dmb ish" : : : "memory" ); } diff --git a/libc/private/bionic_atomic_arm.h b/libc/private/bionic_atomic_arm.h index 023d66292..2156e6a99 100644 --- a/libc/private/bionic_atomic_arm.h +++ b/libc/private/bionic_atomic_arm.h @@ -16,9 +16,9 @@ #ifndef BIONIC_ATOMIC_ARM_H #define BIONIC_ATOMIC_ARM_H -__ATOMIC_INLINE__ void __bionic_memory_barrier(void) { +__ATOMIC_INLINE__ void __bionic_memory_barrier() { #if defined(ANDROID_SMP) && ANDROID_SMP == 1 - __asm__ __volatile__ ( "dmb" : : : "memory" ); + __asm__ __volatile__ ( "dmb ish" : : : "memory" ); #else /* A simple compiler barrier. */ __asm__ __volatile__ ( "" : : : "memory" ); diff --git a/libc/private/bionic_atomic_gcc_builtin.h b/libc/private/bionic_atomic_gcc_builtin.h index 9e5e5aacd..70eb861fe 100644 --- a/libc/private/bionic_atomic_gcc_builtin.h +++ b/libc/private/bionic_atomic_gcc_builtin.h @@ -25,7 +25,7 @@ * the architecture-specific assembler versions. */ -__ATOMIC_INLINE__ void __bionic_memory_barrier(void) { +__ATOMIC_INLINE__ void __bionic_memory_barrier() { __sync_synchronize(); } diff --git a/libc/private/bionic_atomic_inline.h b/libc/private/bionic_atomic_inline.h index 2bb11287a..c887e5a23 100644 --- a/libc/private/bionic_atomic_inline.h +++ b/libc/private/bionic_atomic_inline.h @@ -25,7 +25,7 @@ * * Macros defined in this header: * - * void ANDROID_MEMBAR_FULL(void) + * void ANDROID_MEMBAR_FULL() * Full memory barrier. Provides a compiler reordering barrier, and * on SMP systems emits an appropriate instruction. */